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2023-04-04Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell
Fix race condition that can cause a crash at startup. # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmQsVJoUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroPnWgf/SRc2eAtWtLDkIhjszkfK8TVeQzzS # wD0pobk/8MNyj+EW/wV+/HsR3U8oNvHsAnzB4+RKd7YGhPxHwDvqC+hNm5HS8u4g # gY+LhvwirFB7RkP0dDd4yt1BX6emylyFjUpM+QxlrwuorQ5wfRaIh77ex349rnq8 # fp8Kw53VpBWscyp3S3AYlQMRN3NGPH9JdeDtWap0AHFGA+PeBR2VCOuJ3xUJF62T # xyacGGe3JXNUcFJVKR8PMDBO1FeJgl4Y7k0idHK/mcpOPj6HYFN3EV863XdP8Foa # mv9h2DXRuIpFJEj//0GQAVDw+F8BFofjZaPeRNAoX+oE3I4CnZhVC5uG/w== # =Ttdf # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Apr 2023 17:47:22 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: kvm: dirty-ring: Fix race with vcpu creation Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04kvm: dirty-ring: Fix race with vcpu creationPeter Xu
It's possible that we want to reap a dirty ring on a vcpu that is during creation, because the vcpu is put onto list (CPU_FOREACH visible) before initialization of the structures. In this case: qemu_init_vcpu x86_cpu_realizefn cpu_exec_realizefn cpu_list_add <---- can be probed by CPU_FOREACH qemu_init_vcpu cpus_accel->create_vcpu_thread(cpu); kvm_init_vcpu map kvm_dirty_gfns <--- kvm_dirty_gfns valid Don't try to reap dirty ring on vcpus during creation or it'll crash. Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=2124756 Reported-by: Xiaohui Li <xiaohli@redhat.com> Signed-off-by: Peter Xu <peterx@redhat.com> Message-Id: <1d14deb6684bcb7de1c9633c5bd21113988cc698.1676563222.git.huangy81@chinatelecom.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2023-04-04Merge tag 'pull-tcg-20230404' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell
Revert "linux-user/arm: Take more care allocating commpage" accel/tcg: Fix jump cache set in cpu_exec_loop accel/tcg: Fix initialization of CF_PCREL in tcg_cflags tcg/sparc64: Disable direct jumps from goto_tb # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQsRwAdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8QqQf6AnUwdkp0zEUevshL # gPlns3u5RZIv/i5L1VIkYrLbaFQtwD17CfBACB2MxZI6lbPK4jT++FlDiWJ1ak7i # 4p9Q5KOAbjAxQgQXy51NbEzg5AoIYP5HEg2cnjfEg0PltRVTn0bdbBVbCG/erDXa # NfEOPtHSU+6B8jRjp0MRvFv4Y4CJ3nQ7eZ6TMI3oGOk44DOs22Fn330E8wT2vpt4 # ayJNDN8F0FZ5wGZdJIAsMSgauaGJwY/ZG1KX8TGQb7nsRn5lbpEgoOUCd0WUGdx6 # 3YsoELaZoHZhAlvVNjbOMBp3fZSH2owb08By9vU7ZMjPOnsjZQz6TuxR6NNl+04G # tPi44Q== # =+m7M # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Apr 2023 16:49:20 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20230404' of https://gitlab.com/rth7680/qemu: tcg/sparc64: Disable direct linking for goto_tb accel/tcg: Fix jump cache set in cpu_exec_loop accel/tcg: Fix overwrite problems of tcg_cflags Revert "linux-user/arm: Take more care allocating commpage" Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04Merge tag 'pull-for-8.0-040423-2' of https://gitlab.com/stsquad/qemu into ↵Peter Maydell
staging Final test and misc fixes: - add basic coverage analysis script - gdbstub only build one of libgdb_user/softmmu - don't break BSD gdb by advertising AUXV feature - add MAINTAINERS section for policy docs - update hexagon toolchain - explicitly invoke iotests with python for BSDs benefit - use system python on NetBSD - add some tests for the new KVM Xen guest support # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmQsOscACgkQ+9DbCVqe # KkSm6Af/X+vvzdlmXgGt3uw2odqV6KMfXEkds5lHZIIqQhsLvV0mrkTcIKTswWhL # JRC7jiPmn5hfwvgDy5WfcczGzELSqfBgqHsm9zqVcboTGgJfr2eMtoUlMCQi6lFR # InomhTb+VzPxuUx82oryufm7bsopG8C+HVr3ZtHNFI3usIrLlscZstkiYMueGUCb # PJ60mykfd7hegaTgwKNbUXqZ+Oy/u4W7UPWBkrR7xJzW623t7S5EWV2ZNbdJgKO6 # utY3VGikir/OcnNKy7NuXp2t3K+5KALFZW3Jbav8hVLy5biMGYUF8886B0FL2m+n # E44J67crEYNJMamtzYJ+FdkGEMrS5Q== # =yCka # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Apr 2023 15:57:11 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * tag 'pull-for-8.0-040423-2' of https://gitlab.com/stsquad/qemu: tests/avocado: Test Xen guest support under KVM gitlab: fix typo tests/vm: use the default system python for NetBSD tests/qemu-iotests: explicitly invoke 'check' via 'python' Use hexagon toolchain version 16.0.0 metadata: add .git-blame-ignore-revs MAINTAINERS: add a section for policy documents gdbstub: don't report auxv feature unless on Linux gdbstub: Only build libgdb_user.fa / libgdb_softmmu.fa if necessary scripts/coverage: initial coverage comparison script Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04Merge tag 'pull-nbd-2023-04-04' of https://repo.or.cz/qemu/ericb into stagingPeter Maydell
nbd patches for 2023-04-04 - Eric Blake: use TCP_NODELAY in nbd server, as followup to corking # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEccLMIrHEYCkn0vOqp6FrSiUnQ2oFAmQsIuAACgkQp6FrSiUn # Q2o/Vwf/UMxOlxHEEQsS5lkG6qbkL47GUxfxsXfd0yvU+ihFALrKEZrOlzYDZWKj # hww8Uqlh9lCjnTO8ekYl2eetNmDwMsV6mcCaiJ0aYZNAI87l4ekFy0Jfx58D36vv # j9HSELr09KjodoCISLDAwJCgs/GyQKmO+FzqvovbJH8nU0h24VEYgI6b5PHmII8U # LN0cm9xLO46KCTlWz7Y4Rt047rFVkh++n7l/nNjviJGm63BO2H9BCd3heea4uhdy # +7MR1Tb9VuMGe0PWews/SdZKwtCzClTCgmZw8MrrSs/39Qw2EZYXA9X64Qs97oKg # GbajABGVSrJSFkGTMhIFK9xgLZjaKQ== # =KZJ+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Apr 2023 14:15:12 BST # gpg: using RSA key 71C2CC22B1C4602927D2F3AAA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" [full] # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" [full] # gpg: aka "[jpeg image of size 6874]" [full] # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * tag 'pull-nbd-2023-04-04' of https://repo.or.cz/qemu/ericb: nbd/server: Request TCP_NODELAY Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04tcg/sparc64: Disable direct linking for goto_tbRichard Henderson
Something is wrong with this code, and also wrong with gdb on the sparc systems to which I have access, so I cannot debug it either. Disable for now, so the release is not broken. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-04accel/tcg: Fix jump cache set in cpu_exec_loopRichard Henderson
Assign pc and use store_release to assign tb. Fixes: 2dd5b7a1b91 ("accel/tcg: Move jmp-cache `CF_PCREL` checks to caller") Reported-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-04accel/tcg: Fix overwrite problems of tcg_cflagsWeiwei Li
CPUs often set CF_PCREL in tcg_cflags before qemu_init_vcpu(), in which tcg_cflags will be overwrited by tcg_cpu_init_cflags(). Fixes: 4be790263ffc ("accel/tcg: Replace `TARGET_TB_PCREL` with `CF_PCREL`") Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Weiwei Li <liweiwei@iscas.ac.cn> Signed-off-by: Junqiang Wang <wangjunqiang@iscas.ac.cn> Message-Id: <20230331150609.114401-6-liweiwei@iscas.ac.cn> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-04tests/avocado: Test Xen guest support under KVMDavid Woodhouse
Exercise guests with a few different modes for interrupt delivery. In particular we want to cover: • Xen event channel delivery via GSI to the I/O APIC • Xen event channel delivery via GSI to the i8259 PIC • MSIs routed to PIRQ event channels • GSIs routed to PIRQ event channels As well as some variants of normal non-Xen stuff like MSI to vAPIC and PCI INTx going to the I/O APIC and PIC, which ought to still work even in Xen mode. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230403134920.2132362-12-alex.bennee@linaro.org>
2023-04-04gitlab: fix typoAlex Bennée
Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230403134920.2132362-11-alex.bennee@linaro.org>
2023-04-04tests/vm: use the default system python for NetBSDDaniel P. Berrangé
Currently our NetBSD VM recipe requests instal of the python37 package and explicitly tells QEMU to use that version of python. Since the NetBSD base ISO was updated to version 9.3 though, the default system python version is 3.9 which is sufficiently new for QEMU to rely on. Rather than requesting an older python, just test against the default system python which is what most users will have. Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230329124601.822209-1-berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230403134920.2132362-10-alex.bennee@linaro.org>
2023-04-04tests/qemu-iotests: explicitly invoke 'check' via 'python'Daniel P. Berrangé
The 'check' script will use "#!/usr/bin/env python3" by default to locate python, but this doesn't work in distros which lack a bare 'python3' binary like NetBSD. We need to explicitly invoke 'check' by referring to the 'python' variable in meson, which resolves to the detected python binary that QEMU intends to use. This fixes a regression introduced by commit 51ab5f8bd795d8980351f8531e54995ff9e6d163 Author: Daniel P. Berrangé <berrange@redhat.com> Date: Wed Mar 15 17:43:23 2023 +0000 iotests: register each I/O test separately with meson Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230329124539.822022-1-berrange@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230403134920.2132362-9-alex.bennee@linaro.org>
2023-04-04Use hexagon toolchain version 16.0.0Marco Liebel
Signed-off-by: Marco Liebel <quic_mliebel@quicinc.com> Reviewed-by: Brian Cain <bcain@quicinc.com> Message-Id: <20230329142108.1199509-1-quic_mliebel@quicinc.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230403134920.2132362-8-alex.bennee@linaro.org>
2023-04-04metadata: add .git-blame-ignore-revsAlex Bennée
Someone mentioned this on IRC so I thought I would try it out with a few commits that are pure code style fixes. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230403134920.2132362-7-alex.bennee@linaro.org>
2023-04-04MAINTAINERS: add a section for policy documentsAlex Bennée
We don't update these often but now at least we have a few like minded individuals keeping reviewers eye out for changes. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230403134920.2132362-5-alex.bennee@linaro.org>
2023-04-04gdbstub: don't report auxv feature unless on LinuxAlex Bennée
The later handler if conditionally compiled only for Linux but we forgot to ensure we don't advertise it lest we confuse our BSD brethren. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Fixes: 51c623b0de ("gdbstub: add support to Xfer:auxv:read: packet") Reported-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Warner Losh <imp@bsdimp.com> Tested-by: Warner Losh <imp@bsdimp.com> Message-Id: <20230403134920.2132362-4-alex.bennee@linaro.org>
2023-04-04gdbstub: Only build libgdb_user.fa / libgdb_softmmu.fa if necessaryPhilippe Mathieu-Daudé
It is pointless to build libgdb_user.fa in a system-only build (or libgdb_softmmu.fa in a user-only build). Besides, in some restricted build configurations, some APIs might be restricted / not available. Example in a KVM-only builds where TCG is disabled: $ ninja qemu-system-x86_64 [99/2187] Compiling C object gdbstub/libgdb_user.fa.p/user.c.o FAILED: gdbstub/libgdb_user.fa.p/user.c.o ../../gdbstub/user.c: In function ‘gdb_breakpoint_insert’: ../../gdbstub/user.c:438:19: error: implicit declaration of function ‘cpu_breakpoint_insert’; did you mean ‘gdb_breakpoint_insert’? [-Werror=implicit-function-declaration] 438 | err = cpu_breakpoint_insert(cpu, addr, BP_GDB, NULL); | ^~~~~~~~~~~~~~~~~~~~~ | gdb_breakpoint_insert ../../gdbstub/user.c:438:19: error: nested extern declaration of ‘cpu_breakpoint_insert’ [-Werror=nested-externs] ../../gdbstub/user.c: In function ‘gdb_breakpoint_remove’: ../../gdbstub/user.c:459:19: error: implicit declaration of function ‘cpu_breakpoint_remove’; did you mean ‘gdb_breakpoint_remove’? [-Werror=implicit-function-declaration] 459 | err = cpu_breakpoint_remove(cpu, addr, BP_GDB); | ^~~~~~~~~~~~~~~~~~~~~ | gdb_breakpoint_remove ../../gdbstub/user.c:459:19: error: nested extern declaration of ‘cpu_breakpoint_remove’ [-Werror=nested-externs] cc1: all warnings being treated as errors ninja: build stopped: subcommand failed. Fixes: 61b2e136db ("gdbstub: only compile gdbstub twice for whole build") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230329161852.84992-1-philmd@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230403134920.2132362-3-alex.bennee@linaro.org>
2023-04-04Revert "linux-user/arm: Take more care allocating commpage"Richard Henderson
This reverts commit 4f5c67f8df7f26e559509c68c45e652709edd23f. This exposes bugs in target_mmap et al with respect to overflow with the final page of the guest address space. To be fixed in the next development cycle. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-04-04scripts/coverage: initial coverage comparison scriptAlex Bennée
This is a very rough and ready first pass at comparing gcovr's json output between two different runs. At the moment it will give you a file level diff between two runs but hopefully it wont be too hard to extend to give better insight. After generating the coverage results you run with something like: ./scripts/coverage/compare_gcov_json.py \ -a ./builds/gcov.config1/coverage.json \ -b ./builds/gcov.config2/coverage.json My hope is we can use this to remove some redundancy from testing as well as evaluate if new tests are actually providing additional coverage or just burning our precious CI time. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Cc: Kautuk Consul <kconsul@linux.vnet.ibm.com> Acked-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230403134920.2132362-2-alex.bennee@linaro.org>
2023-04-04nbd/server: Request TCP_NODELAYEric Blake
Nagle's algorithm adds latency in order to reduce network packet overhead on small packets. But when we are already using corking to merge smaller packets into transactional requests, the extra delay from TCP defaults just gets in the way (see recent commit bd2cd4a4). For reference, qemu as an NBD client already requests TCP_NODELAY (see nbd_connect() in nbd/client-connection.c); as does libnbd as a client [1], and nbdkit as a server [2]. Furthermore, the NBD spec recommends the use of TCP_NODELAY [3]. [1] https://gitlab.com/nbdkit/libnbd/-/blob/a48a1142/generator/states-connect.c#L39 [2] https://gitlab.com/nbdkit/nbdkit/-/blob/45b72f5b/server/sockets.c#L430 [3] https://github.com/NetworkBlockDevice/nbd/blob/master/doc/proto.md#protocol-phases CC: Florian Westphal <fw@strlen.de> Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <20230404004047.142086-1-eblake@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-04-04Merge tag 'pull-loongarch-20230404' of https://gitlab.com/gaosong/qemu into ↵Peter Maydell
staging pull-loongarch-20230404 # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZCwLXQAKCRBAov/yOSY+ # 3zwUA/9d2ddHxGEBTMyF45bzc9JxRF6HoILAwMLsmPWqspPgKdGuviMVewJLt5m8 # V75/BC6Sn9rhdkXALvZMRV6WQ2A16pByUaQtMYAXVsIoV8Mrpvm4GwJD1E0/cy5Q # TwDTzpDfys9WsTVj0QlCPjp0JW+KA7Y6ArMUUCdCz41L2r7mPA== # =ovw7 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 04 Apr 2023 12:34:53 BST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20230404' of https://gitlab.com/gaosong/qemu: target/loongarch: Enables plugins to get instruction codes hw/loongarch/virt: Fix virt_to_phys_addr function Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04MAINTAINERS: Remove and change David Gilbert maintainer entriesDr. David Alan Gilbert
I'm leaving Red Hat next week, so clean up the maintainer entries. 'virtiofs' is just the device code now, so is pretty small, and Stefan is still a maintainer there. 'migration' still has Juan. For 'HMP' I'll swing that over to my personal email. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Acked-by: Dr. David Alan Gilbert <dave@treblig.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Zhang Chen <chen.zhang@intel.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 20230330095524.37691-1-dgilbert@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-04target/loongarch: Enables plugins to get instruction codestanhongze
Signed-off-by: tanhongze <tanhongze@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230330124600.1523026-1-tanhongze@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-04-04hw/loongarch/virt: Fix virt_to_phys_addr functionTianrui Zhao
The virt addr should mask TARGET_PHYS_ADDR_SPACE_BITS to get the phys addr, and this is used by loading kernel elf. Signed-off-by: Tianrui Zhao <zhaotianrui@loongson.cn> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230327112313.3042829-1-zhaotianrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2023-04-03Merge tag 'pull-target-arm-20230403' of ↵Peter Maydell
https://git.linaro.org/people/pmaydell/qemu-arm into staging * target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask() * hw/arm: do not free machine->fdt in arm_load_dtb() * target/arm: Fix generated code for cpreg reads when HSTR is active * hw/ssi: Fix Linux driver init issue with xilinx_spi # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmQq+CwZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3ux4EACRzqDTA3bbmuEDC4HKFEwv # p4IrhG20iZWOQaieu7B+nrhXYakkcLxtGqG0cLFbb073B16SWRAxwli1sH+5mBNW # l7GEF8WUelSPLZUlPmfl4YGH2ak5+kXI/G92+X7uE76Bv6wOJYZC5S1iNZN67fcd # fQEfb9IcSmytCvsQLfLCvYzgpJKTuuikzkoCnT9O43qpPmUsBhSsBzyYPu0ZqsjV # OgFMGNUc80rHc1kcLoLMMJBzI5S+iurnDKD+aNkMzCjtKPGkuIljbE6fPANXFxLb # KbpVYjVIpPBAC33ZGO8NTkzqBuO7VNY0xWstfmepAsOdrorTLAOVMnC2NPsSZzOz # kLd2wTT+64eMxt+flZETuU6HF8f6K94GRWPw8dC7Aj3XUvbSso+in863XD2OIKAr # MCEm2Xi8ogb14uNx9Z4pUFIU6gKNUx8OGnWPLBngF4Kix4yP56nkbRAlg2ZII5bH # HBny6+llC1NB94MjfSorTnNkk6J8Kd4Zhw8C9+dNbaDxCUBz3oCFwLoq6Cgx97F6 # 4J4An4PGF4evrJWBo9+9qOKtKapXlEmCSYs7oVavabxCCLI92PVoz96QH+6OK7+c # h0PiqlfjPPSCnUcxsA9mr8zbp+P/ZxJbh0YI9ExP+zI03wE8gr4NMf7HYZQh0OLU # Q+HARsmaAG3FONWbnHE97A== # =oIZg # -----END PGP SIGNATURE----- # gpg: Signature made Mon 03 Apr 2023 17:00:44 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20230403' of https://git.linaro.org/people/pmaydell/qemu-arm: hw/ssi: Fix Linux driver init issue with xilinx_spi target/arm: Fix generated code for cpreg reads when HSTR is active hw/arm: do not free machine->fdt in arm_load_dtb() target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-03hw/ssi: Fix Linux driver init issue with xilinx_spiChris Rauer
The problem is that the Linux driver expects the master transaction inhibit bit(R_SPICR_MTI) to be set during driver initialization so that it can detect the fifo size but QEMU defaults it to zero out of reset. The datasheet indicates this bit is active on reset. See page 25, SPI Control Register section: https://www.xilinx.com/content/dam/xilinx/support/documents/ip_documentation/axi_quad_spi/v3_2/pg153-axi-quad-spi.pdf Signed-off-by: Chris Rauer <crauer@google.com> Message-id: 20230323182811.2641044-1-crauer@google.com Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-03target/arm: Fix generated code for cpreg reads when HSTR is activePeter Maydell
In commit 049edada we added some code to handle HSTR_EL2 traps, which we did as an inline "conditionally branch over a gen_exception_insn()". Unfortunately this fails to take account of the fact that gen_exception_insn() will set s->base.is_jmp to DISAS_NORETURN. That means that at the end of the TB we won't generate the necessary code to handle the "branched over the trap and continued normal execution" codepath. The result is that the TCG main loop thinks that we stopped execution of the TB due to a situation that only happens when icount is enabled, and hits an assertion. Explicitly set is_jmp back to DISAS_NEXT so we generate the correct code for when execution continues past this insn. Note that this only happens for cpreg reads; writes will call gen_lookup_tb() which generates a valid end-of-TB. Fixes: 049edada ("target/arm: Make HSTR_EL2 traps take priority over UNDEF-at-EL1") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1551 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230330101900.2320380-1-peter.maydell@linaro.org
2023-04-03hw/arm: do not free machine->fdt in arm_load_dtb()Markus Armbruster
At this moment, arm_load_dtb() can free machine->fdt when binfo->dtb_filename is NULL. If there's no 'dtb_filename', 'fdt' will be retrieved by binfo->get_dtb(). If get_dtb() returns machine->fdt, as is the case of machvirt_dtb() from hw/arm/virt.c, fdt now has a pointer to machine->fdt. And, in that case, the existing g_free(fdt) at the end of arm_load_dtb() will make machine->fdt point to an invalid memory region. Since monitor command 'dumpdtb' was introduced a couple of releases ago, running it with any ARM machine that uses arm_load_dtb() will crash QEMU. Let's enable all arm_load_dtb() callers to use dumpdtb properly. Instead of freeing 'fdt', assign it back to ms->fdt. Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Fixes: bf353ad55590f ("qmp/hmp, device_tree.c: introduce dumpdtb") Reported-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Message-id: 20230328165935.1512846-1-armbru@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-04-03target/arm: Fix non-TCG build failure by inlining pauth_ptr_mask()Philippe Mathieu-Daudé
aarch64_gdb_get_pauth_reg() -- although disabled since commit 5787d17a42 ("target/arm: Don't advertise aarch64-pauth.xml to gdb") is still compiled in. It calls pauth_ptr_mask() which is located in target/arm/tcg/pauth_helper.c, a TCG specific helper. To avoid a linking error when TCG is not enabled: Undefined symbols for architecture arm64: "_pauth_ptr_mask", referenced from: _aarch64_gdb_get_pauth_reg in target_arm_gdbstub64.c.o ld: symbol(s) not found for architecture arm64 clang: error: linker command failed with exit code 1 (use -v to see invocation) - Inline pauth_ptr_mask() in aarch64_gdb_get_pauth_reg() (this is the single user), - Rename pauth_ptr_mask_internal() as pauth_ptr_mask() and inline it in "internals.h", Fixes: e995d5cce4 ("target/arm: Implement gdbstub pauth extension") Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Fabiano Rosas <farosas@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230328212516.29592-1-philmd@linaro.org [PMM: reinstated doc comment] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-30Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into stagingPeter Maydell
- linux-user: . Don't use 16-bit UIDs with SPARC V9 . Pick MIPS3 CPU by default to run NaN2008 ELF binaries - HW: . Fix invalid GT64120 north bridge endianness register swap . Prevent NULL pointer dereference by SMBus devices - Buildsys: . Fix compiling with liblzfse on Darwin # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmQli+8ACgkQ4+MsLN6t # wN5GJw/8CqzhxQgp11u2ArQlz/zsXJd4d6goIAIefJK1H80FXhqblz3ZBICci0Mu # vA9CCayQ72r2NYR71QNvK6WWAJRnWbwFYH5arbvFRlCtDKV/n/DSSqsytY0Pd9eZ # YlGJQ8tjO2PNa+K6J1ElUDRDk+xPnWlocewrb/Kxjhe6zk2RXQ9AZiGDj3+4vXlj # rbPe5LpWS9zyl3TwF11wJSZOx2yX+D8JgR2klAgniZsk4NFJq1sluIFutFuU3JgQ # N5m8bR3yfe8ImKYXyu3mKSsAuoyLmM2RKrFzWLjOmgYn2JL4Glj0QWWznNWolNSQ # jJBHszcEUtwrr3ls5SiLf+I+fXbxyicqREQsvrzyy7UbaJTv0y8S+Ofg2dcqGCTD # qN89MZDHbxko+J7RnNUtNfb5glrqAvtwhx6B3T+qnyJQ/ExtGqy69tKBCAYKbCWV # YnMBVg6oP2TgcX34mC9z6iR38W2GBPfCyYXNSD2FgRRD1Gy8jCkR/RQOwaF2YNY3 # q5AInqW1I0LuLhrPOg1tRUu9PeGlEqcHs4OmqKSgTgE9JchgWCJrCtgxdgaAXkMK # LKZbpnyNni70H5hkIGXIxnw0mUUFIdWJQNMHZeTxfh99x7kuDfxhnaxS2oCgJhdi # k7RhVQybBFrcwL/cxaywKRDc5oj4aS46qYm08nP8JQIIjIbszRA= # =SOYX # -----END PGP SIGNATURE----- # gpg: Signature made Thu 30 Mar 2023 14:17:35 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'misc-fixes-20230330' of https://github.com/philmd/qemu: block/dmg: Ignore C99 prototype declaration mismatch from <lzfse.h> hw/i2c: pmbus: block uninitialised string reads tests/avocado: Enable TuxRun/mips64 (big-endian) test hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDR linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binaries linux-user/sparc: Don't use 16-bit UIDs on SPARC V9 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-30block/dmg: Ignore C99 prototype declaration mismatch from <lzfse.h>Philippe Mathieu-Daudé
When liblzfe (Apple LZFSE compression library) is present (for example installed via 'brew') on Darwin, QEMU build fails as: Has header "lzfse.h" : YES Library lzfse found: YES Dependencies lzo support : NO snappy support : NO bzip2 support : YES lzfse support : YES zstd support : YES 1.5.2 User defined options dmg : enabled lzfse : enabled [221/903] Compiling C object libblock.fa.p/block_dmg-lzfse.c.o FAILED: libblock.fa.p/block_dmg-lzfse.c.o /opt/homebrew/Cellar/lzfse/1.0/include/lzfse.h:56:43: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes] LZFSE_API size_t lzfse_encode_scratch_size(); ^ void /opt/homebrew/Cellar/lzfse/1.0/include/lzfse.h:94:43: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes] LZFSE_API size_t lzfse_decode_scratch_size(); ^ void 2 errors generated. ninja: build stopped: subcommand failed. This issue has been reported in the lzfse project in 2016: https://github.com/lzfse/lzfse/issues/3#issuecomment-226574719 Since the project seems unmaintained, simply ignore the strict-prototypes warning check for the <lzfse.h> header, similarly to how we deal with the GtkItemFactoryCallback prototype from <gtk/gtkitemfactory.h>, indirectly included by <gtk/gtk.h>. Cc: Julio Faracco <jcfaracco@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Message-Id: <20230327151349.97572-1-philmd@linaro.org>
2023-03-30hw/i2c: pmbus: block uninitialised string readsTitus Rwantare
Devices models calling pmbus_send_string can't be relied upon to send a non-zero pointer. This logs an error and doesn't segfault. Reviewed-by: Patrick Venture <venture@google.com> Signed-off-by: Titus Rwantare <titusr@google.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230322175513.1550412-5-titusr@google.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-03-30tests/avocado: Enable TuxRun/mips64 (big-endian) testPhilippe Mathieu-Daudé
Now that the previous commit ("hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDR") fixed the issue accessing the GT64120 PCI config-address register on big-endian targets, we can enable this TuxRun test. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20230223220404.63630-1-philmd@linaro.org>
2023-03-30hw/mips/gt64xxx_pci: Don't endian-swap GT_PCI0_CFGADDRJiaxun Yang
145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") converted CFGADDR/CFGDATA registers to use PCI_HOST_BRIDGE's accessor facility and enabled byte swap for both CFGADDR/CFGDATA register. However CFGADDR as a ISD internal register is not controlled by MByteSwap bit, it follows endian of all other ISD register, which means it ties to little endian. Move mapping of CFGADDR out of gt64120_update_pci_cfgdata_mapping to disable endian-swapping. Fixes: 145e2198d749 ("hw/mips/gt64xxx_pci: Endian-swap using PCI_HOST_BRIDGE MemoryRegionOps") Reported-by: Nathan Chancellor <nathan@kernel.org> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Nathan Chancellor <nathan@kernel.org> Message-Id: <20230223161958.48696-1-jiaxun.yang@flygoat.com> [PMD: !!! Note this only fixes little-endian hosts !!! ] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2023-03-30linux-user/mips: Use P5600 as default CPU to run NaN2008 ELF binariesPhilippe Mathieu-Daudé
Per the release 6.06 revision history: 5.03 August 21, 2013 • ABS2008 and NAN2008 fields of Table 5.7 “FCSR RegisterField Descriptions” were optional in release 3 and could be R/W, but as of release 5 are required, read-only, and preset by hardware. The P5600 core implements the release 5, and has the ABS2008 and NAN2008 bits set in CP1_fcr31. Therefore it is able to run ELF binaries compiled with EF_MIPS_NAN2008, such the CIP United Debian NaN2008 distribution: http://repo.oss.cipunited.com/mipsel-nan2008/README.txt In order to run such compiled binaries, select by default the P5600 core when the ELF 'MIPS_NAN2008' flag is set. Reported-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230327162444.388-1-philmd@linaro.org>
2023-03-30linux-user/sparc: Don't use 16-bit UIDs on SPARC V9Philippe Mathieu-Daudé
The 64-bit SPARC V9 syscall ABI uses 32-bit UIDs. Only enable the 16-bit UID wrappers for 32-bit SPARC (V7 and V8). Possibly missed in commit 992f48a036 ("Support for 32 bit ABI on 64 bit targets (only enabled Sparc64)"). Reported-by: Gregor Riepl <onitake@gmail.com> Tested-by: John Paul Adrian Glaubitz <glaubitz@physik.fu-berlin.de> Tested-by: Zach van Rijn <me@zv.io> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1394 Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Acked-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20230327131910.78564-1-philmd@linaro.org>
2023-03-29Merge tag 'pull-tcg-20230328' of https://gitlab.com/rth7680/qemu into stagingPeter Maydell
Use a local version of GTree [#285] Fix page_set_flags vs the last page of the address space [#1528] Re-enable gdbstub breakpoints under KVM # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmQjcLIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8rkgf/ZazodovRKxfaO622 # mGW7ywIm+hIZYmKC7ObiMKFrBoCyeXH9yOLSx42T70QstWvBMukjovLMz1+Ttbo1 # VOvpGH2B5W76l3i+muAlKxFRbBH2kMLTaL+BXtkmkL4FJ9bS8WiPApsL3lEX/q2E # 3kqaT3N3C09sWO5oVAPGTUHL0EutKhOar2VZL0+PVPFzL3BNPhnQH9QcbNvDBV3n # cx3GSXZyL7Plyi+qwsKf/3Jo+F2wr2NVf3Dqscu9T1N1kI5hSjRpwqUEJzJZ5rei # ly/gBXC/J7+WN+x+w2JlN0kWXWqC0QbDfZnj96Pd3owWZ7j4sT9zR5fcNenecxlR # 38Bo0w== # =ysF7 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 28 Mar 2023 23:56:50 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * tag 'pull-tcg-20230328' of https://gitlab.com/rth7680/qemu: softmmu: Restore use of CPU watchpoint for all accelerators softmmu/watchpoint: Add missing 'qemu/error-report.h' include softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accel linux-user/arm: Take more care allocating commpage include/exec: Change reserved_va semantics to last byte linux-user: Pass last not end to probe_guest_base accel/tcg: Pass last not end to tb_invalidate_phys_range accel/tcg: Pass last not end to tb_invalidate_phys_page_range__locked accel/tcg: Pass last not end to page_collection_lock accel/tcg: Pass last not end to PAGE_FOR_EACH_TB accel/tcg: Pass last not end to page_reset_target_data accel/tcg: Pass last not end to page_set_flags linux-user: Diagnose misaligned -R size tcg: use QTree instead of GTree util: import GTree as QTree Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-03-28softmmu: Restore use of CPU watchpoint for all acceleratorsPhilippe Mathieu-Daudé
CPU watchpoints can be use by non-TCG accelerators. KVM uses them: $ git grep CPUWatchpoint|fgrep kvm target/arm/kvm64.c:1558: CPUWatchpoint *wp = find_hw_watchpoint(cs, debug_exit->far); target/i386/kvm/kvm.c:5216:static CPUWatchpoint hw_watchpoint; target/ppc/kvm.c:443:static CPUWatchpoint hw_watchpoint; target/s390x/kvm/kvm.c:139:static CPUWatchpoint hw_watchpoint; See for example commit e4482ab7e3 ("target-arm: kvm - add support for HW assisted debug"): This adds basic support for HW assisted debug. The ioctl interface to KVM allows us to pass an implementation defined number of break and watch point registers. [...] This partially reverts commit 2609ec2868e6c286e755a73b4504714a0296a. Fixes: 2609ec2868 ("softmmu: Extract watchpoint API from physmem.c") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230328173117.15226-4-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28softmmu/watchpoint: Add missing 'qemu/error-report.h' includePhilippe Mathieu-Daudé
cpu_watchpoint_insert() calls error_report() which is declared in "qemu/error-report.h". When moving this code in commit 2609ec2868 ("softmmu: Extract watchpoint API from physmem.c") we neglected to include this header. This works so far because it is indirectly included by TCG headers -> "qemu/plugin.h" -> "qemu/error-report.h". Currently cpu_watchpoint_insert() is only built with the TCG accelerator. When building it with other ones (or without TCG) we get: softmmu/watchpoint.c:38:9: error: implicit declaration of function 'error_report' is invalid in C99 [-Werror,-Wimplicit-function-declaration] error_report("tried to set invalid watchpoint at %" ^ Include "qemu/error-report.h" in order to fix this for non-TCG builds. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230328173117.15226-3-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28softmmu: Restrict cpu_check_watchpoint / address_matches to TCG accelPhilippe Mathieu-Daudé
Both cpu_check_watchpoint() and cpu_watchpoint_address_matches() are specific to TCG system emulation. Declare them in "tcg-cpu-ops.h" to be sure accessing them from non-TCG code is a compilation error. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230328173117.15226-2-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28linux-user/arm: Take more care allocating commpageRichard Henderson
User setting of -R reserved_va can lead to an assertion failure in page_set_flags. Sanity check the value of reserved_va and print an error message instead. Do not allocate a commpage at all for m-profile cpus. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28include/exec: Change reserved_va semantics to last byteRichard Henderson
Change the semantics to be the last byte of the guest va, rather than the following byte. This avoids some overflow conditions. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28linux-user: Pass last not end to probe_guest_baseRichard Henderson
Pass the address of the last byte of the image, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28accel/tcg: Pass last not end to tb_invalidate_phys_rangeRichard Henderson
Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28accel/tcg: Pass last not end to tb_invalidate_phys_page_range__lockedRichard Henderson
Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Properly truncate tb_last to the end of the page; the comment about tb_end being past the end of the page being ok is not correct, considering overflow. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28accel/tcg: Pass last not end to page_collection_lockRichard Henderson
Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Fixes a bug in the loop comparision where "<= end" would lock one more page than required. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28accel/tcg: Pass last not end to PAGE_FOR_EACH_TBRichard Henderson
Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28accel/tcg: Pass last not end to page_reset_target_dataRichard Henderson
Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28accel/tcg: Pass last not end to page_set_flagsRichard Henderson
Pass the address of the last byte to be changed, rather than the first address past the last byte. This avoids overflow when the last page of the address space is involved. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1528 Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-28linux-user: Diagnose misaligned -R sizeRichard Henderson
We have been enforcing host page alignment for the non-R fallback of MAX_RESERVED_VA, but failing to enforce for -R. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>