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QEMU is a generic and open source machine & userspace emulator and virtualizer
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2022-09-07
target/riscv: rvv: Add mask agnostic for vector fix-point arithmetic instruct...
Yueh-Ting (eop) Chen
2022-09-07
target/riscv: rvv: Add mask agnostic for vector integer comparison instructions
Yueh-Ting (eop) Chen
2022-09-07
target/riscv: rvv: Add mask agnostic for vector integer shift instructions
Yueh-Ting (eop) Chen
2022-09-07
target/riscv: rvv: Add mask agnostic for vx instructions
Yueh-Ting (eop) Chen
2022-09-07
target/riscv: rvv: Add mask agnostic for vector load / store instructions
Yueh-Ting (eop) Chen
2022-09-07
target/riscv: rvv: Add mask agnostic for vv instructions
Yueh-Ting (eop) Chen
2022-09-07
docs: List kvm as a supported accelerator on RISC-V
Bin Meng
2022-09-07
target/riscv: Fix typo and restore Pointer Masking functionality for RISC-V
Alexey Baturo
2022-09-07
roms/opensbi: Upgrade from v1.0 to v1.1
Bin Meng
2022-09-07
target/riscv: Simplify the check in hmode to reuse the check in riscv_csrrw_c...
Weiwei Li
2022-09-07
target/riscv: Fix checks in hmode/hmode32
Weiwei Li
2022-09-07
target/riscv: Add check for csrs existed with U extension
Weiwei Li
2022-09-07
target/riscv: Fix checkpatch warning may triggered in csr_ops table
Weiwei Li
2022-09-07
target/riscv: H extension depends on I extension
Weiwei Li
2022-09-07
target/riscv: Add check for supported privilege mode combinations
Weiwei Li
2022-09-07
hw/riscv: virt: pass random seed to fdt
Jason A. Donenfeld
2022-09-07
target/riscv: move zmmul out of the experimental properties
Weiwei Li
2022-09-07
target/riscv: fix shifts shamt value for rv128c
Frédéric Pétrot
2022-09-07
target/riscv: Force disable extensions if priv spec version does not match
Anup Patel
2022-09-07
target/riscv: Update [m|h]tinst CSR in riscv_cpu_do_interrupt()
Anup Patel
2022-09-06
Merge tag 'samuel-thibault' of https://people.debian.org/~sthibault/qemu into...
Stefan Hajnoczi
2022-09-06
Merge tag 'pull-tcg-20220906' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi
2022-09-06
target/riscv: Make translator stop before the end of a page
Richard Henderson
2022-09-06
target/riscv: Add MAX_INSN_LEN and insn_len
Richard Henderson
2022-09-06
target/i386: Make translator stop before the end of a page
Ilya Leoshkevich
2022-09-06
target/s390x: Make translator stop before the end of a page
Ilya Leoshkevich
2022-09-06
accel/tcg: Add fast path for translator_ld*
Richard Henderson
2022-09-06
accel/tcg: Add pc and host_pc params to gen_intermediate_code
Richard Henderson
2022-09-06
accel/tcg: Remove translator_ldsw
Richard Henderson
2022-09-06
accel/tcg: Document the faulting lookup in tb_lookup_cmp
Richard Henderson
2022-09-06
accel/tcg: Use probe_access_internal for softmmu get_page_addr_code_hostp
Richard Henderson
2022-09-06
accel/tcg: Move qemu_ram_addr_from_host_nofail to physmem.c
Richard Henderson
2022-09-06
accel/tcg: Make tb_htable_lookup static
Richard Henderson
2022-09-06
accel/tcg: Unlock mmap_lock after longjmp
Richard Henderson
2022-09-06
accel/tcg: Properly implement get_page_addr_code for user-only
Richard Henderson
2022-09-06
accel/tcg: Introduce is_same_page()
Ilya Leoshkevich
2022-09-06
tests/tcg/i386: Move smc_code2 to an executable section
Richard Henderson
2022-09-06
linux-user: Clear translations on mprotect()
Ilya Leoshkevich
2022-09-06
linux-user: Honor PT_GNU_STACK
Richard Henderson
2022-09-06
linux-user/x86_64: Allocate vsyscall page as a commpage
Richard Henderson
2022-09-06
linux-user/hppa: Allocate page zero as a commpage
Richard Henderson
2022-09-06
linux-user/arm: Mark the commpage executable
Richard Henderson
2022-09-06
usb-braille: Better explain that one also has to create a chardev backend
Samuel Thibault
2022-09-05
Merge tag 'pull-or1k-20220904' of https://github.com/stffrdhrn/qemu into staging
Stefan Hajnoczi
2022-09-04
docs/system: openrisc: Add OpenRISC documentation
Stafford Horne
2022-09-04
hw/openrisc: virt: pass random seed to fdt
Jason A. Donenfeld
2022-09-04
target/openrisc: Interrupt handling fixes
Stafford Horne
2022-09-04
target/openrisc: Enable MTTCG
Stafford Horne
2022-09-04
target/openrisc: Add interrupted CPU to log
Stafford Horne
2022-09-04
hw/openrisc: Initialize timer time at startup
Stafford Horne
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