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AgeCommit message (Expand)Author
2021-06-08hw/riscv: microchip_pfsoc: Support direct kernel bootBin Meng
2021-06-08hw/riscv: Use macros for BIOS image namesBin Meng
2021-06-08docs/system/riscv: sifive_u: Document '-dtb' usageBin Meng
2021-06-08docs/system/riscv: Correct the indentation level of supported devicesBin Meng
2021-06-08hw/riscv: Support the official PLIC DT bindingsBin Meng
2021-06-08hw/riscv: Support the official CLINT DT bindingsBin Meng
2021-06-08hw/riscv: virt: Switch to use qemu_fdt_setprop_string_array() helperBin Meng
2021-06-08hw/riscv: sifive_u: Switch to use qemu_fdt_setprop_string_array() helperBin Meng
2021-06-07Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-updates-07062...Peter Maydell
2021-06-07scripts/checkpatch.pl: process .c.inc and .h.inc files as C sourceMatheus Ferst
2021-06-07tests/vm: expose --source-path to scripts to find extra filesAlex Bennée
2021-06-07gitlab-ci: Split gprof-gcov jobPhilippe Mathieu-Daudé
2021-06-07gitlab: work harder to avoid false positives in checkpatchAlex Bennée
2021-06-07tests/acceptance: tag various arm tests as TCG onlyAlex Bennée
2021-06-07tests/tcg/configure.sh: tweak quoting of target_compilerAlex Bennée
2021-06-07meson.build: fix cosmetics of compiler displayAlex Bennée
2021-06-07tests/tcg: add a multiarch signals test to stress test signal deliveryAlex Bennée
2021-06-05Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210604' into...Peter Maydell
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_rotv_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_roti_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_shv_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_bitsel_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_minmax_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_sat_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_mul_vecRichard Henderson
2021-06-04tcg/arm: Implement TCG_TARGET_HAS_shi_vecRichard Henderson
2021-06-04tcg/arm: Implement andc, orc, abs, neg, not vector operationsRichard Henderson
2021-06-04tcg/arm: Implement minimal vector operationsRichard Henderson
2021-06-04tcg/arm: Implement tcg_out_dup*_vecRichard Henderson
2021-06-04tcg/arm: Implement tcg_out_mov for vector typesRichard Henderson
2021-06-04tcg/arm: Implement tcg_out_ld/st for vector typesRichard Henderson
2021-06-04tcg/arm: Add host vector frameworkRichard Henderson
2021-06-04tcg: Change parameters for tcg_target_const_matchRichard Henderson
2021-06-04Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ...Peter Maydell
2021-06-04Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into st...Peter Maydell
2021-06-04vl: plug -object back into -readconfigPaolo Bonzini
2021-06-04vl: plumb keyval-based options into -readconfigPaolo Bonzini
2021-06-04qemu-config: parse configuration files to a QDictPaolo Bonzini
2021-06-04i386: run accel_cpu_instance_init as post_initClaudio Fontana
2021-06-04i386: reorder call to cpu_exec_realizefnClaudio Fontana
2021-06-04tests/qtest/virtio-scsi-test: add unmap large LBA with 4k blocks testKit Westneat
2021-06-04target/i386: Fix decode of cr8Richard Henderson
2021-06-04target/i386: tcg: fix switching from 16-bit to 32-bit tasks or vice versaPaolo Bonzini
2021-06-04target/i386: tcg: fix loading of registers from 16-bit TSSPaolo Bonzini
2021-06-04target/i386: tcg: fix segment register offsets for 16-bit TSSPaolo Bonzini
2021-06-04oslib-posix: Remove OpenBSD workaround for fcntl("/dev/null", F_SETFL, O_NONB...Brad Smith
2021-06-04iscsi: link libm into the modulePaolo Bonzini
2021-06-04meson: allow optional dependencies for block modulesPaolo Bonzini
2021-06-04Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-fpu-20210603' into...Peter Maydell
2021-06-04MAINTAINERS: Added eBPF maintainers information.Andrew Melnychenko
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