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2022-02-17virtiofsd: Create new file with security contextVivek Goyal
2022-02-17virtiofsd: Add helpers to work with /proc/self/task/tid/attr/fscreateVivek Goyal
2022-02-17virtiofsd: Move core file creation code in separate functionVivek Goyal
2022-02-17virtiofsd, fuse_lowlevel.c: Add capability to parse security contextVivek Goyal
2022-02-17virtiofsd: Extend size of fuse_conn_info->capable and ->want fieldsVivek Goyal
2022-02-17virtiofsd: Parse extended "struct fuse_init_in"Vivek Goyal
2022-02-17linux-headers: Update headers to v5.17-rc1Vivek Goyal
2022-02-17virtiofsd: Fix breakage due to fuse_init_in size changeVivek Goyal
2022-02-16virtiofsd: Do not support blocking flockSebastian Hasler
2022-02-16Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220...Peter Maydell
2022-02-16docs/system: riscv: Update description of CPUYu Li
2022-02-16target/riscv: add support for svpbmt extensionWeiwei Li
2022-02-16target/riscv: add support for svinval extensionWeiwei Li
2022-02-16target/riscv: add support for svnapot extensionWeiwei Li
2022-02-16target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTEWeiwei Li
2022-02-16target/riscv: Ignore reserved bits in PTE for RV64Guo Ren
2022-02-16hw/intc: Add RISC-V AIA APLIC device emulationAnup Patel
2022-02-16target/riscv: Allow users to force enable AIA CSRs in HARTAnup Patel
2022-02-16hw/riscv: virt: Use AIA INTC compatible string when availableAnup Patel
2022-02-16target/riscv: Implement AIA IMSIC interface CSRsAnup Patel
2022-02-16target/riscv: Implement AIA xiselect and xireg CSRsAnup Patel
2022-02-16target/riscv: Implement AIA mtopi, stopi, and vstopi CSRsAnup Patel
2022-02-16target/riscv: Implement AIA interrupt filtering CSRsAnup Patel
2022-02-16target/riscv: Implement AIA hvictl and hviprioX CSRsAnup Patel
2022-02-16target/riscv: Implement AIA CSRs for 64 local interrupts on RV32Anup Patel
2022-02-16target/riscv: Implement AIA local interrupt prioritiesAnup Patel
2022-02-16target/riscv: Allow AIA device emulation to set ireg rmw callbackAnup Patel
2022-02-16target/riscv: Add defines for AIA CSRsAnup Patel
2022-02-16target/riscv: Add AIA cpu featureAnup Patel
2022-02-16target/riscv: Allow setting CPU feature from machine/device emulationAnup Patel
2022-02-16target/riscv: Improve delivery of guest external interruptsAnup Patel
2022-02-16target/riscv: Implement hgeie and hgeip CSRsAnup Patel
2022-02-16target/riscv: Implement SGEIP bit in hip and hie CSRsAnup Patel
2022-02-16target/riscv: Fix trap cause for RV32 HS-mode CSR access from RV64 HS-modeAnup Patel
2022-02-16target/riscv: Fix vill field write in vtypeLIU Zhiwei
2022-02-16target/riscv: add a MAINTAINERS entry for XVentanaCondOpsPhilipp Tomsich
2022-02-16target/riscv: Add XVentanaCondOps custom extensionPhilipp Tomsich
2022-02-16target/riscv: iterate over a table of decodersPhilipp Tomsich
2022-02-16target/riscv: access cfg structure through DisasContextPhilipp Tomsich
2022-02-16target/riscv: access configuration through cfg_ptr in DisasContextPhilipp Tomsich
2022-02-16target/riscv: riscv_tr_init_disas_context: copy pointer-to-cfg into cfg_ptrPhilipp Tomsich
2022-02-16target/riscv: refactor (anonymous struct) RISCVCPU.cfg into 'struct RISCVCPUC...Philipp Tomsich
2022-02-16target/riscv: correct "code should not be reached" for x-rv128Frédéric Pétrot
2022-02-16Allow setting up to 8 bytes with the generic loaderPetr Tesarik
2022-02-16include: hw: remove ibex_plic.hWilfred Mallawa
2022-02-15Merge remote-tracking branch 'remotes/stefanha-gitlab/tags/block-pull-request...Peter Maydell
2022-02-15Merge remote-tracking branch 'remotes/nvme/tags/nvme-next-pull-request' into ...Peter Maydell
2022-02-15Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into st...Peter Maydell
2022-02-14Merge remote-tracking branch 'remotes/kwolf-gitlab/tags/for-upstream' into st...Peter Maydell
2022-02-14util: adjust coroutine pool size to virtio block queueHiroki Narukawa