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2017-01-16Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1' into staging This is the same as the v3 posted except a re-base and a few extra signoffs # gpg: Signature made Fri 13 Jan 2017 14:26:46 GMT # gpg: using RSA key 0xFBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-tcg-common-tlb-reset-20170113-r1: cputlb: drop flush_global flag from tlb_flush cpu_common_reset: wrap TCG specific code in tcg_enabled() qom/cpu: move tlb_flush to cpu_common_reset Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-16Merge remote-tracking branch 'remotes/vivier/tags/m68k-for-2.9-pull-request' ↵Peter Maydell
into staging # gpg: Signature made Sat 14 Jan 2017 09:06:31 GMT # gpg: using RSA key 0xF30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" # gpg: aka "Laurent Vivier <laurent@vivier.eu>" # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-for-2.9-pull-request: target-m68k: increment/decrement with SP target-m68k: CAS doesn't need aligned access target-m68k: manage pre-dec et post-inc in CAS target-m68k: fix gen_flush_flags() target-m68k: fix bit operation with immediate value m68k: Remove PCI and USB from config file target-m68k: Implement bfffo target-m68k: Implement bitfield ops for memory target-m68k: Implement bitfield ops for registers Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-16Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170113' into stagingPeter Maydell
Fixes and more queued patches # gpg: Signature made Fri 13 Jan 2017 20:00:53 GMT # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170113: tcg/aarch64: Fix tcg_out_movi tcg/aarch64: Fix addsub2 for 0+C target/arm: Fix ubfx et al for aarch64 tcg/s390: Fix merge error with facilities Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-14target-m68k: increment/decrement with SPLaurent Vivier
On 680x0 family only. Address Register indirect With postincrement: When using the stack pointer (A7) with byte size data, the register is incremented by two. Address Register indirect With predecrement: When using the stack pointer (A7) with byte size data, the register is decremented by two. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1484332593-16782-6-git-send-email-laurent@vivier.eu>
2017-01-14target-m68k: CAS doesn't need aligned accessLaurent Vivier
Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1484332593-16782-5-git-send-email-laurent@vivier.eu>
2017-01-14target-m68k: manage pre-dec et post-inc in CASLaurent Vivier
In these cases we must update the address register after the operation. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1484332593-16782-4-git-send-email-laurent@vivier.eu>
2017-01-14target-m68k: fix gen_flush_flags()Laurent Vivier
gen_flush_flags() is setting unconditionally cc_op_synced to 1 and s->cc_op to CC_OP_FLAGS, whereas env->cc_op can be set to something else by a previous tcg fragment. We fix that by not setting cc_op_synced to 1 (except for gen_helper_flush_flags() that updates env->cc_op) FIX: https://github.com/vivier/qemu-m68k/issues/19 Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1484332593-16782-3-git-send-email-laurent@vivier.eu>
2017-01-14target-m68k: fix bit operation with immediate valueLaurent Vivier
M680x0 bit operations with an immediate value use 9 bits of the 16bit value, while coldfire ones use only 8 bits. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-Id: <1484332593-16782-2-git-send-email-laurent@vivier.eu>
2017-01-14m68k: Remove PCI and USB from config fileThomas Huth
None of the ColdFire boards that we currently support has a PCI or USB bus (and AFAIK the upcoming q800 machine does not support PCI and USB either), so we do not need these settings the config file. Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20170106083956.53d08923@thl530> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-01-14target-m68k: Implement bfffoRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1479242669-25852-1-git-send-email-rth@twiddle.net> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-01-14target-m68k: Implement bitfield ops for memoryRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1478699171-10637-6-git-send-email-rth@twiddle.net> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-01-14target-m68k: Implement bitfield ops for registersRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <1478699171-10637-5-git-send-email-rth@twiddle.net> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2017-01-13tcg/aarch64: Fix tcg_out_moviRichard Henderson
There were some patterns, like 0x0000_ffff_ffff_00ff, for which we would select to begin a multi-insn sequence with MOVN, but would fail to set the 0x0000 lane back from 0xffff. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20161207180727.6286-3-rth@twiddle.net>
2017-01-13tcg/aarch64: Fix addsub2 for 0+CRichard Henderson
When al == xzr, we cannot use addi/subi because that encodes xsp. Force a zero into the temp register for that (rare) case. Signed-off-by: Richard Henderson <rth@twiddle.net> Message-Id: <20161207180727.6286-2-rth@twiddle.net>
2017-01-13target/arm: Fix ubfx et al for aarch64Richard Henderson
The patch in 59a71b4c5b4e suffered from a merge failure when compared to the original patch in http://lists.nongnu.org/archive/html/qemu-devel/2016-12/msg00137.html Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-13tcg/s390: Fix merge error with facilitiesRichard Henderson
The variable was renamed s390_facilities. Signed-off-by: Richard Henderson <rth@twiddle.net>
2017-01-13Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging x86 and machine queue, 2017-01-17 Includes i386, CPU, NUMA, and memory backends changes. i386: target/i386: Fix bad patch application to translate.c CPU: qmp: Report QOM type name on query-cpu-definitions NUMA: numa: make -numa parser dynamically allocate CPUs masks Memory backends: qom: remove unused header monitor: reuse user_creatable_add_opts() instead of user_creatable_add() monitor: fix qmp/hmp query-memdev not reporting IDs of memory backends # gpg: Signature made Thu 12 Jan 2017 17:53:11 GMT # gpg: using RSA key 0x2807936F984DC5A6 # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/x86-and-machine-pull-request: qmp: Report QOM type name on query-cpu-definitions numa: make -numa parser dynamically allocate CPUs masks target/i386: Fix bad patch application to translate.c monitor: fix qmp/hmp query-memdev not reporting IDs of memory backends monitor: reuse user_creatable_add_opts() instead of user_creatable_add() qom: remove unused header Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-13cputlb: drop flush_global flag from tlb_flushAlex Bennée
We have never has the concept of global TLB entries which would avoid the flush so we never actually use this flag. Drop it and make clear that tlb_flush is the sledge-hammer it has always been. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> [DG: ppc portions] Acked-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-13cpu_common_reset: wrap TCG specific code in tcg_enabled()Alex Bennée
Both the cpu->tb_jmp_cache and SoftMMU TLB structures are only used when running TCG code so we might as well skip them for anything else. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-13qom/cpu: move tlb_flush to cpu_common_resetAlex Bennée
It is a common thing amongst the various cpu reset functions want to flush the SoftMMU's TLB entries. This is done either by calling tlb_flush directly or by way of a general memset of the CPU structure (sometimes both). This moves the tlb_flush call to the common reset function and additionally ensures it is only done for the CONFIG_SOFTMMU case and when tcg is enabled. In some target cases we add an empty end_of_reset_fields structure to the target vCPU structure so have a clear end point for any memset which is resetting value in the structure before CPU_COMMON (where the TLB structures are). While this is a nice clean-up in general it is also a precursor for changes coming to cputlb for MTTCG where the clearing of entries can't be done arbitrarily across vCPUs. Currently the cpu_reset function is usually called from the context of another vCPU as the architectural power up sequence is run. By using the cputlb API functions we can ensure the right behaviour in the future. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-13Merge remote-tracking branch 'remotes/stsquad/tags/pull-travis-20170112-1' ↵Peter Maydell
into staging A couple of fixes to reduce the matrix some more that just missed the last iteration. # gpg: Signature made Thu 12 Jan 2017 13:01:49 GMT # gpg: using RSA key 0xFBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-travis-20170112-1: travis: add Trusty with clang stable build travis: trim out most clang builds Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-13sdl2: fix build failure on windowsGerd Hoffmann
Cc: Stefan Weil <sw@weilnetz.de> Cc: Samuel Thibault <samuel.thibault@gnu.org> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Message-id: 1484295285-8809-1-git-send-email-kraxel@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-12Merge remote-tracking branch ↵Peter Maydell
'remotes/bkoppelmann/tags/pull-tricore-2017-01-11-2' into staging TriCore FPU patches # gpg: Signature made Wed 11 Jan 2017 13:40:11 GMT # gpg: using RSA key 0x0AD2C6396B69CA14 # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 CA14 * remotes/bkoppelmann/tags/pull-tricore-2017-01-11-2: target-tricore: Add updfl instruction target-tricore: Added new JNE instruction variant target-tricore: Added new MOV instruction variant target-tricore: Added MADD.F and MSUB.F instructions target-tricore: Added FTOUZ instruction Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20170111-1' into ↵Peter Maydell
staging vga: fixes for virtio-gpu and cirrus. # gpg: Signature made Wed 11 Jan 2017 10:24:24 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-vga-20170111-1: virtio-gpu: tag as not hotpluggable virtio-gpu: Fix memory leak in virtio_gpu_load() virtio-gpu: Recalculate VirtIOGPU::hostmem on VM load display: cirrus: ignore source pitch value as needed in blit_is_unsafe virtio-gpu: fix information leak in capset get dispatch Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-12qmp: Report QOM type name on query-cpu-definitionsEduardo Habkost
The new typename attribute on query-cpu-definitions will be used to help management software use device-list-properties to check which properties can be set using -cpu or -global for the CPU model. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1479320499-29818-1-git-send-email-ehabkost@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-12numa: make -numa parser dynamically allocate CPUs masksIgor Mammedov
so it won't impose an additional limits on max_cpus limits supported by different targets. It removes global MAX_CPUMASK_BITS constant and need to bump it up whenever max_cpus is being increased for a target above MAX_CPUMASK_BITS value. Use runtime max_cpus value instead to allocate sufficiently sized node_cpu bitmasks in numa parser. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1479466974-249781-1-git-send-email-imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [ehabkost: Added asserts to ensure cpu_index < max_cpus] Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-12target/i386: Fix bad patch application to translate.cDoug Evans
In commit c52ab08aee6f7d4717fc6b517174043126bd302f, the patch snippet for the "syscall" insn got applied to "iret". Signed-off-by: Doug Evans <dje@google.com> Message-Id: <f403045cde4049058c05446d5c04@google.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-12monitor: fix qmp/hmp query-memdev not reporting IDs of memory backendsIgor Mammedov
Considering 'id' is mandatory for user_creatable objects/backends and user_creatable_add_type() always has it as an argument regardless of where from it is called CLI/monitor or QMP, Fix issue by adding 'id' property to hostmem backends and set it in user_creatable_add_type() for every object that implements 'id' property. Then later at query-memdev time get 'id' from object directly. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1484052795-158195-4-git-send-email-imammedo@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-12monitor: reuse user_creatable_add_opts() instead of user_creatable_add()Igor Mammedov
Simplify code by dropping ~57LOC by merging user_creatable_add() into user_creatable_add_opts() and using the later from monitor. Along with it allocate opts_visitor_new() once in user_creatable_add_opts(). As result we have one less API func and a more readable/simple user_creatable_add_opts() vs user_creatable_add(). Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <1484052795-158195-3-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-audio-20170111-1' ↵Peter Maydell
into staging audio: qomify drivers, hotplug fixes. # gpg: Signature made Wed 11 Jan 2017 09:32:09 GMT # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-audio-20170111-1: es1370: wire up reset via DeviceClass audio: ac97: add exit function audio: es1370: add exit function hw/audio: QOM'ify pl041.c hw/audio: QOM'ify marvell_88w8618.c Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-12qom: remove unused headerIgor Mammedov
Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <1484052795-158195-2-git-send-email-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-01-12Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170110' into stagingPeter Maydell
TCG opcodes for extract, clz, ctz, ctpop # gpg: Signature made Wed 11 Jan 2017 02:12:41 GMT # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170110: (65 commits) tcg/i386: Handle ctpop opcode tcg/ppc: Handle ctpop opcode tcg: Use ctpop to generate ctz if needed tests: New test-bitcnt qemu/host-utils.h: Reduce the operation count in the fallback ctpop target-i386: Use ctpop helper target-tilegx: Use ctpop helper target-sparc: Use ctpop helper target-s390x: Avoid a loop for popcnt target-ppc: Use ctpop helper target-alpha: Use ctpop helper tcg: Add opcode for ctpop target-xtensa: Use clrsb helper target-tricore: Use clrsb helper target-arm: Use clrsb helper tcg: Add helpers for clrsb tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR tcg/i386: Handle ctz and clz opcodes tcg/i386: Allow bmi2 shiftx to have non-matching operands tcg/i386: Hoist common arguments in tcg_out_op ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-12libqtest: handle zero length memwrite/memreadGreg Kurz
Some recently added tests pass a zero length to qtest_memwrite(). Unfortunately, the qtest protocol doesn't implement an on-the-wire syntax for zero-length writes and the current code happily sends garbage to QEMU. This causes intermittent failures. It isn't worth the pain to enhance the protocol, so this patch simply fixes the issue by "just return, doing nothing". The same fix is applied to qtest_memread() since the issue also exists in the QEMU part of the "memread" command. Suggested-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Message-id: 148412457273.22750.983275587432075569.stgit@bahia Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-12travis: add Trusty with clang stable buildAlex Bennée
Although we've reduced the matrix to avoid repeating clang builds we can still add an additional clang build to use the latest stable version of clang which will typically be available on current distros. Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2017-01-12travis: trim out most clang buildsDaniel P. Berrange
We test with both gcc and clang in order to detect cases where clang issues warnings that gcc misses. To achieve this though we don't need to build QEMU in multiple different configurations. Just a single clang-on-linux build will be sufficient, if we have an "all enabled" config. This cuts the number of build jobs from 21 to 16, reducing the load imposed on shared Travis CI infra. This will make it practical to enable jobs for other interesting & useful configurations without DOS'ing Travis to much. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2017-01-11target-tricore: Add updfl instructionBastian Koppelmann
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-01-11target-tricore: Added new JNE instruction variantPeer Adelt
If D[15] is != sign_ext(const4) then PC will be set to (PC + zero_ext(disp4 + 16)). [BK: fixed style errors] Signed-off-by: Peer Adelt <peer.adelt@c-lab.de> Message-Id: <1465314555-11501-5-git-send-email-peer.adelt@c-lab.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2017-01-11target-tricore: Added new MOV instruction variantPeer Adelt
Puts the content of data register D[a] into E[c][63:32] and the content of data register D[b] into E[c][31:0]. [BK: fix style error] [BK: Allocate temporaries only when needed] Signed-off-by: Peer Adelt <peer.adelt@c-lab.de> Message-Id: <1465314555-11501-4-git-send-email-peer.adelt@c-lab.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2017-01-11target-tricore: Added MADD.F and MSUB.F instructionsBastian Koppelmann
Multiplies D[a] and D[b] and adds/subtracts the result to/from D[d]. The result is put in D[c]. All operands are floating-point numbers. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-01-11target-tricore: Added FTOUZ instructionBastian Koppelmann
Converts a 32-bit floating point number to an unsigned int. The result is rounded towards zero. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Richard Henderson <rth@twiddle.net>
2017-01-11virtio-gpu: tag as not hotpluggableGerd Hoffmann
qemu can't hotplug display devices. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1483970138-20360-1-git-send-email-kraxel@redhat.com
2017-01-11virtio-gpu: Fix memory leak in virtio_gpu_load()Peter Maydell
Coverity points out that if we fail in the "creating resources" loop in virtio_gpu_load() we will leak various resources (CID 1356431). Failing a VM load is going to leave the simulation in a complete mess, but we can tidy up to the point that a full system reset should get us back to sanity. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1483969123-14839-3-git-send-email-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11virtio-gpu: Recalculate VirtIOGPU::hostmem on VM loadPeter Maydell
The 'hostmem' field in VirtIOGPU is used to track the total memory used in pixmaps so that we can impose a maximum limit on it. However this field is neither migrated nor recalculated on VM load, which means that after a migration it will be incorrectly too low, which can allow the guest to use more pixmap memory than it should. The per-resource hostmem fields are not filled in either as we reallocate them in the load function. Recalculate the memory used for each pixmap and the total memory used as we reallocate the pixmaps in virtio_gpu_load(). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1483969123-14839-2-git-send-email-peter.maydell@linaro.org Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11display: cirrus: ignore source pitch value as needed in blit_is_unsafeBruce Rogers
Commit 4299b90 added a check which is too broad, given that the source pitch value is not required to be initialized for solid fill operations. This patch refines the blit_is_unsafe() check to ignore source pitch in that case. After applying the above commit as a security patch, we noticed the SLES 11 SP4 guest gui failed to initialize properly. Signed-off-by: Bruce Rogers <brogers@suse.com> Message-id: 20170109203520.5619-1-brogers@suse.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11virtio-gpu: fix information leak in capset get dispatchLi Qiang
In virgl_cmd_get_capset function, it uses g_malloc to allocate a response struct to the guest. As the 'resp'struct hasn't been full initialized it will lead the 'resp->padding' field to the guest. Use g_malloc0 to avoid this. Signed-off-by: Li Qiang <liqiang6-s@360.cn> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 58188cae.4a6ec20a.3d2d1.aff2@mx.google.com [ kraxel: resolved conflict ] Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11es1370: wire up reset via DeviceClassGerd Hoffmann
Instead of using qemu_register_reset(). That way we get proper cleanup for free. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1484054281-26139-1-git-send-email-kraxel@redhat.com
2017-01-11audio: ac97: add exit functionLi Qiang
Currently the ac97 device emulation doesn't have a exit function, hot unplug this device will leak some memory. Add a exit function to avoid this. Signed-off-by: Li Qiang <liqiang6-s@360.cn> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 58520052.4825ed0a.27a71.6cae@mx.google.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11audio: es1370: add exit functionLi Qiang
Currently the es1370 device emulation doesn't have a exit function, hot unplug this device will leak some memory. Add a exit function to avoid this. Signed-off-by: Li Qiang <liqiang6-s@360.cn> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 585200c9.a968ca0a.1ab80.4c98@mx.google.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11hw/audio: QOM'ify pl041.cxiaoqiang zhao
split the old SysBus init function into an instance_init and Device realize function Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 20161231011720.3965-3-zxq_yx_007@163.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2017-01-11hw/audio: QOM'ify marvell_88w8618.cxiaoqiang zhao
split the old SysBus init function into an instance_init and Device realize function Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 20161231011720.3965-2-zxq_yx_007@163.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-27 07:52:14 +0000