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AgeCommit message (Expand)Author
2019-12-17spapr: Don't trigger a CAS reboot for XICS/XIVE mode changeoverDavid Gibson
2019-12-17ppc: well form kvmppc_hint_smt_possible error hint helperVladimir Sementsov-Ogievskiy
2019-12-17ppc/pnv: Dump the XIVE NVT tableCédric Le Goater
2019-12-17ppc/pnv: Extend XiveRouter with a get_block_id() handlerCédric Le Goater
2019-12-17ppc/pnv: Introduce a pnv_xive_block_id() helperCédric Le Goater
2019-12-17ppc/xive: Synthesize interrupt from the saved IPB in the NVTCédric Le Goater
2019-12-17ppc/xive: Introduce a xive_tctx_ipb_update() helperCédric Le Goater
2019-12-17ppc/xive: Remove the get_tctx() XiveRouter handlerCédric Le Goater
2019-12-17ppc/xive: Move the TIMA operations to the controller modelCédric Le Goater
2019-12-17ppc/pnv: Clarify how the TIMA is accessed on a multichip systemCédric Le Goater
2019-12-17spapr/xive: Configure number of servers in KVMGreg Kurz
2019-12-17spapr/xics: Configure number of servers in KVMGreg Kurz
2019-12-17spapr: Pass the maximum number of vCPUs to the KVM interrupt controllerGreg Kurz
2019-12-17linux-headers: UpdateGreg Kurz
2019-12-17ppc/xive: Extend the TIMA operation with a XivePresenter parameterCédric Le Goater
2019-12-17ppc/xive: Use the XiveFabric and XivePresenter interfacesCédric Le Goater
2019-12-17ppc/spapr: Implement the XiveFabric interfaceCédric Le Goater
2019-12-17ppc/pnv: Implement the XiveFabric interfaceCédric Le Goater
2019-12-17ppc/xive: Introduce a XiveFabric interfaceCédric Le Goater
2019-12-17ppc/pnv: Fix TIMA indirect accessCédric Le Goater
2019-12-17ppc/pnv: Introduce a pnv_xive_is_cpu_enabled() helperCédric Le Goater
2019-12-17ppc: Introduce a ppc_cpu_pir() helperCédric Le Goater
2019-12-17ppc/pnv: Loop on the threads of the chip to find a matching NVTCédric Le Goater
2019-12-17ppc/pnv: Instantiate cores separatelyGreg Kurz
2019-12-17ppc/xive: Implement the XivePresenter interfaceCédric Le Goater
2019-12-17ppc/xive: Introduce a XivePresenter interfaceCédric Le Goater
2019-12-17ppc/pnv: Create BMC devices at machine initCédric Le Goater
2019-12-17ppc/pnv: Add HIOMAP commandsCédric Le Goater
2019-12-17ipmi: Add support to customize OEM functionsCédric Le Goater
2019-12-17ppc/xive: Check V bit in TM_PULL_POOL_CTXCédric Le Goater
2019-12-17ppc/xive: Introduce OS CAM line helpersCédric Le Goater
2019-12-17ppc/pnv: Quiesce some XIVE errorsCédric Le Goater
2019-12-17xive/kvm: Trigger interrupts from userspaceGreg Kurz
2019-12-17ppc/pnv: Remove pnv_xive_vst_size() routineCédric Le Goater
2019-12-17ppc/xive: Introduce helpers for the NVT idCédric Le Goater
2019-12-17ppc/xive: Record the IPB in the associated NVTCédric Le Goater
2019-12-17ppc/pnv: Add a LPC "ranges" propertyCédric Le Goater
2019-12-17spapr: Abort if XICS interrupt controller cannot be initializedGreg Kurz
2019-12-17xics: Link ICP_PROP_CPU property to ICPState::cs pointerGreg Kurz
2019-12-17xics: Link ICP_PROP_XICS property to ICPState::xics pointerGreg Kurz
2019-12-17xics: Link ICS_PROP_XICS property to ICSState::xics pointerGreg Kurz
2019-12-17ppc/pnv: Link "chip" property to PnvXive::chip pointerGreg Kurz
2019-12-17ppc/pnv: Link "chip" property to PnvCore::chip pointerGreg Kurz
2019-12-17ppc/pnv: Link "chip" property to PnvHomer::chip pointerGreg Kurz
2019-12-17ppc/pnv: Link "psi" property to PnvOCC::psi pointerGreg Kurz
2019-12-17ppc/pnv: Link "psi" property to PnvLpc::psi pointerGreg Kurz
2019-12-17xive: Link "xive" property to XiveEndSource::xrtr pointerGreg Kurz
2019-12-17xive: Link "xive" property to XiveSource::xive pointerGreg Kurz
2019-12-17xive: Link "cpu" property to XiveTCTX::cs pointerGreg Kurz
2019-12-17ppc/pnv: Drop "chip" link from POWER9 PSI objectGreg Kurz
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