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2011-04-12target-arm: Handle UNDEF cases for VDUP (scalar)Juha Riihimäki
Handle the UNDEF cases for VDUP(scalar): imm4 == x000 Q == 1 && Vd<0> == 1 Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Treat UNPREDICTABLE VTBL, VTBX case as UNDEFPeter Maydell
Catch the UNPREDICTABLE case for Neon VTBL,VTBX, and UNDEF it rather than allowing the helper function to index off the end of the register file. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for Neon 2 register misc formsPeter Maydell
Add missing UNDEF checks for Neon "two register miscellaneous" forms: * all instructions except VMOVN,VQMOVN must UNDEF if Q==1 && (Vd<0> == 1 || Vm<0> == 1) * VMOVN,VQMOVN,VCVT.F16.F32 UNDEF if Q == 1 || Vm<0> == 1 * VSHLL,VCVT.F32.F16 UNDEF if Q == 1 || Vd<0> == 1 (The only other UNDEF case is VZIP,VUZP if Q == 0 && size == 10, which we already handle.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Simplify checking of size field in Neon 2reg-misc formsPeter Maydell
Many of the Neon "2 register misc" instruction forms require invalid size fields to cause the instruction to UNDEF. Pull this information out into an array; this simplifies the code and also means we can do the check early and avoid the problem of leaking TCG temporaries in the illegal_op case. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for VEXTPeter Maydell
VEXT must UNDEF if Q == 1 && (Vd<0> == 1 || Vr<0> == 1 || Vm<0> == 1) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for Neon 2 regs + scalar formsPeter Maydell
Add missing checks for cases which must UNDEF in the Neon "2 registers and a scalar" data processing instruction space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for Neon 3-regs-different-widthsPeter Maydell
Add missing UNDEF checks for instructions in the Neon "3 registers of different widths" data processing space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for Neon invalid modified-immediatesPeter Maydell
For Neon "one register and a modified immediate value" forms, the combination op=1 cmode=1111 is unallocated and should UNDEF. All instructions of this form also UNDEF if Q == 1 and Vd<0> == 1. We also add a comment on the only UNPREDICTABLE in this space. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Collapse VSRI case into VSHL, VSLIPeter Maydell
Collapse some switch cases for VSRI into those for VSHL, VSLI, since the bodies are the same. (This is not completely obvious for the size < 3 case, but since for VSRI we know U=1 the GEN_NEON_INTEGER_OP() expansion is equivalent to the open-coded VSHL/VSLI case.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for Neon "2 regs and shift" insnsPeter Maydell
Correctly handle all the UNDEF cases for Neon instructions of the "2 registers and shift" form, and make sure that we check for these cases early enough not to leak TCG temporaries. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Simplify three-register pairwise codeJuha Riihimäki
Since we know that the case of (pairwise && q) has been caught earlier, we can simplify the register setup code for each pass in the three-register-same-size Neon loop. Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Handle UNDEF cases for Neon 3-regs-same insnsPeter Maydell
Correct the handling of UNDEF cases for the NEON "3 registers same size" forms, by adding missing checks and rationalising some others so they are done early enough to avoid leaking TCG temporaries. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-arm: Use lookup table for size check on Neon 3-reg-same insnsPeter Maydell
Simplify the checks for invalid size values for the Neon "three registers of the same size" instruction forms (and add them where they were missing) by using a lookup table. This includes adding symbolic constants for the op values in this space, since we now use them in multiple places. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12fix acpi regressionWen Congyang
This bug is introduced by commit 23910d3f. Signed-off-by: Wen Congyang <wency@cn.fujitsu.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12Replace cpu_physical_memory_rw were possibleStefan Weil
Using cpu_physical_memory_read, cpu_physical_memory_write and ldub_phys improves readability and allows removing some type casts. lduw_phys and ldl_phys were not used because both require aligned addresses. Therefore it is not possible to simply replace existing calls by one of these functions. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12monitor: Remove some type casts which are no longer neededStefan Weil
All other type casts in calls of cpu_physical_memory_read are used by hardware emulations and will be fixed by separate patches. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12exec: Remove a type cast which is no longer neededStefan Weil
All other type casts in calls of cpu_physical_memory_write are used by hardware emulations and will be fixed by separate patches. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12cpu-common: Modify cpu_physical_memory_read and cpu_physical_memory_writeStefan Weil
A lot of calls don't operate on bytes but on words or on structured data. So instead of a pointer to uint8_t, a void pointer is the better choice. This allows removing many type casts. (Some very early implementations of memcpy used char pointers which were replaced by void pointers for the same reason). Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12configure: disable opengl per defaultMichael Walle
There is a bug in nvidia's binary GPU driver, which causes a segmentation fault if linked to libGL. Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-ppc: remove #ifdef FLOAT128Aurelien Jarno
Now that PPC defaults to softfloat which always provides float128 support, there is no need to keep two version of the code, depending if float128 support is available or not. Suggested by Peter Maydell. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12target-sh4: get rid of CPU_{Float,Double}UAurelien Jarno
SH4 is always using softfloat, so it's possible to have helpers directly taking float32 or float64 value. This allow to get rid of conversions through CPU_{Float,Double}U. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-12unicore32: necessary modifications for other files to support unicore32Guan Xuetao
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-04-12unicore32: add necessry headers in linux-user/unicore32 for unicore32 supportGuan Xuetao
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-04-12unicore32: add target-unicore32 directory for unicore32-linux-user supportGuan Xuetao
Signed-off-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-04-12microblaze: Add partial decoding of stream insnsEdgar E. Iglesias
Based on a patch from: Alejandro Cabrera <aldaya@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-04-12microblaze: Add stream-insn related constantsEdgar E. Iglesias
Based on a patch from: Alejandro Cabrera <aldaya@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-04-11microblaze: Correct ec mask in debug printEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-04-11microblaze: Add constant for exception-code maskEdgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-04-11microblaze: Correct MMU_ZONES maskAlejandro Cabrera
Signed-off-by: Alejandro Cabrera <aldaya@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2011-04-11ppc: remove a write-only variableBlue Swirl
Remove a write-only variable, spotted by GCC 4.6.0: /src/qemu/hw/ppc.c: In function 'power7_set_irq': /src/qemu/hw/ppc.c:255:9: error: variable 'cur_level' set but not used [-Werror=unused-but-set-variable] Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2011-04-10s390x: fix virtio feature bitmapAlexander Graf
The feature bitmap in the s390 virtio machine is little endian. To address for that, we need to bswap the values after reading them out. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10s390x: set alignment for long to 8Alexander Graf
The alignment for longs on s390x is 8. That's the only place where it differs from the default alignments found in configure already. The example alignment program from Laurent printed the following on a real s390x: alignof(short) 2 alignof(int) 4 alignof(long) 8 alignof(long long) 8 Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10musicpal: Fix registration of MMIO-less sysbus devicesJan Kiszka
The proper way to signal that a sysbus devices need no MMIO region is to pass -1 to sysbus_create_simple. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10acpi, acpi_piix: factor out GPE logicIsaku Yamahata
factor out ACPI GPE logic. Later it will be used by ICH9 ACPI. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10arm: basic support for ARMv4/ARMv4T emulationDmitry Eremin-Solenikov
Currently target-arm/ assumes at least ARMv5 core. Add support for handling also ARMv4/ARMv4T. This changes the following instructions: BX(v4T and later) BKPT, BLX, CDP2, CLZ, LDC2, LDRD, MCRR, MCRR2, MRRC, MCRR, MRC2, MRRC, MRRC2, PLD QADD, QDADD, QDSUB, QSUB, STRD, SMLAxy, SMLALxy, SMLAWxy, SMULxy, SMULWxy, STC2 (v5 and later) All instructions that are "v5TE and later" are also bound to just v5, as that's how it was before. This patch doesn _not_ include disabling of cp15 access and base-updated data abort model (that will be required to emulate chips based on a ARM7TDMI), because: * no ARM7TDMI chips are currently emulated (or planned) * those features aren't strictly necessary for my purposes (SA-1 core emulation). All v5 models are handled as they are v5T. Internally we still have a check if the model is a v5(T) or v5TE, but as all emulated cores are v5TE, those two cases are simply aliased (for now). Patch is heavily based on patch by Filip Navara <filip.navara@gmail.com> which in turn is based on work by Ulrich Hecht <uli@suse.de> and Vincent Sanders <vince@kyllikki.org>. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10Fix conversions from pointer to tcg_target_longStefan Weil
tcg_gen_exit_tb takes a parameter of type tcg_target_long, so the type casts of pointer to long should be replaced by type casts of pointer to tcg_target_long (suggested by Blue Swirl). These changes are needed for build environments where sizeof(long) != sizeof(void *), especially for w64. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-10vnc: tight: Fix crash after 2GB of outputMichael Tokarev
fix 2Gb integer overflow in in VNC tight and zlib encodings As found by Roland Dreier <roland@purestorage.com> (excellent catch!), when amount of VNC compressed data produced by zlib and sent to client exceeds 2Gb, integer overflow occurs because currently, we calculate amount of data produced at each step by comparing saved total_out with new total_out, and total_out is something which grows without bounds. Compare it with previous avail_out instead of total_out, and leave total_out alone. The same code is used in vnc-enc-tight.c and vnc-enc-zlib.c, so fix both cases. There, there's no actual need to save previous_out value, since capacity-offset (which is how that value is calculated) stays the same so it can be recalculated again after call to deflate(), but whole thing becomes less readable this way. Reported-by: Roland Dreier <roland@purestorage.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Corentin Chary <corentin.chary@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09smbus_eeprom: consolidate smbus eeprom creation oc pc_piix, mips_mapta, ↵Isaku Yamahata
mips_fulong consolidate smbus initialization for pc_piix, mips_malta and mips_fulong. Cc: Aurelien Jarno <aurelien@aurel32.net> Cc: Huacai Chen <zltjiangshi@gmail.com> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09lan9118: Ignore write to MAC_VLAN1 registerAtsushi Nemoto
On Mon, 4 Apr 2011 20:15:30 +0200, Aurelien Jarno <aurelien@aurel32.net> wrote: > Is it really safe ignoring write to this register? If yes, it's probably > a good idea to explain why in a comment. In any case, if supporting this > register is easy to do, it would be the best option. I think it is safe. Please see an updated comment below. And though implementing this register might be possible, I suppose it is not worth to supporting FrameTooLong detection, for now at least. Thank you for comments. >8--------------------------------------------------------------------- From: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Date: Tue, 5 Apr 2011 23:12:07 +0900 Subject: [PATCH] lan9118: Ignore write to MAC_VLAN1 register Since linux 2.6.38, smsc911x driver writes to VLAN1 registger. Since this register only affects FrameTooLong detection, ignoring write to this register should be safe. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09acpi, acpi_piix, vt82c686: factor out PM1_CNT logicIsaku Yamahata
factor out ACPI PM1_CNT logic. This will be used by ich9 acpi. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Huacai Chen <zltjiangshi@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09acpi, acpi_piix, vt82c686: factor out PM1a EVT logicIsaku Yamahata
factor out ACPI PM1a EVT logic. Later this will be used by ich9 acpi. Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Huacai Chen <zltjiangshi@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09acpi, acpi_piix, vt82c686: factor out PM_TMR logicIsaku Yamahata
factor out PM_TMR logic. Later This will be used by ich9 acpi. Also fixes the same bug in vt82c686.c that was fixed by the following commits. > commit 055479feab63607b8042bb8ebb2e0523f17cbc4e > Author: aliguori <aliguori@c046a42c-6fe2-441c-8c8c-71466251a162> > Date: Wed Jan 21 16:31:20 2009 +0000 > > Always return latest pmsts instead of the old one (Xiantao Zhang) > > It may lead to the issue when booting windows guests with acpi=1 > if return the old pmsts. > > Signed-off-by: Xiantao Zhang <xiantao.zhang@intel.com> > Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> Cc: Blue Swirl <blauwirbel@gmail.com> Cc: Huacai Chen <zltjiangshi@gmail.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09hw/pflash_cfi02: Fix lazy reset of ROMD modeJordan Justen
When checking pfl->rom_mode for when to lazily reenter ROMD mode, the value was check was the opposite of what it should have been. This prevent the part from returning to ROMD mode after a write was made to the CFI rom region. Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2011-04-09configure: avoid basename usage messageScott Wood
basename prints a missing-argument error when sdlconfig is empty and we're cross-compiling. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-09mpc85xx_pci_map_irq: change "unknow" to "unknown"Scott Wood
Signed-off-by: Scott Wood <scottwood@freescale.com> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-09event: trivial coding style fixesBrad Hards
Signed-off-by: Brad Hards <bradh@frogmouth.net> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-09multiboot: Quote filename in error messageAdam Lackorzynski
Quote filename in error message to spot possible whitespace character in the filename and make error message more meaningful. Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
2011-04-08ppce500_mpc8544ds: Fix compile with --enable-debug and --disable-kvmDavid Gibson
When configured with --enable-debug, we compile without optimization. This means that the function mpc8544_copy_soc_cell() in ppce500_mpc8544ds.c is not optimized out, even though it is never called without kvm. That in turn causes a link failure, because it calls the function kvmppc_read_host_property() which is in kvm_ppc.o and therefore not included in a --disable-kvm build. This patch fixes the problem by providing a dummy stub for kvmppc_read_host_property() in kvm_ppc.h when !CONFIG_KVM. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-08Use existing helper function to implement popcntd instructionDavid Gibson
The recent patches adding partial support for POWER7 cpu emulation included implementing the popcntd instruction. The support for this was open coded, but host-utils.h already included a function implementing an equivalent population count function, which uses a gcc builtin (which can use special host instructions) if available. This patch makes the popcntd implementation use the existing, potentially faster, implementation. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alexander Graf <agraf@suse.de>
2011-04-08Delay creation of pseries device tree until resetDavid Gibson
At present, the 'pseries' machine creates a flattened device tree in the machine->init function to pass to either the guest kernel or to firmware. However, the machine->init function runs before processing of -device command line options, which means that the device tree so created will be (incorrectly) missing devices specified that way. Supplying a correct device tree is, in any case, part of the required platform entry conditions. Therefore, this patch moves the creation and loading of the device tree from machine->init to a reset callback. The setup of entry point address and initial register state moves with it, which leads to a slight cleanup. This is not, alas, quite enough to make a fully working reset for pseries. For that we would need to reload the firmware images, which on this machine are loaded into RAM. It's a step in the right direction, though. Signed-off-by: David Gibson <dwg@au1.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
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