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QEMU is a generic and open source machine & userspace emulator and virtualizer
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Author
2020-12-18
qdev: Avoid unnecessary DeviceState* variable at set_prop_arraylen()
Eduardo Habkost
2020-12-18
qdev: Rename qdev_get_prop_ptr() to object_field_prop_ptr()
Eduardo Habkost
2020-12-18
qdev: Move qdev_prop_tpm declaration to tpm_prop.h
Eduardo Habkost
2020-12-18
qdev: Make qdev_class_add_property() more flexible
Eduardo Habkost
2020-12-18
qdev: Make PropertyInfo.create return ObjectProperty*
Eduardo Habkost
2020-12-18
qdev: Move dev->realized check to qdev_property_set()
Eduardo Habkost
2020-12-18
qdev: Wrap getters and setters in separate helpers
Eduardo Habkost
2020-12-18
qdev: Add name argument to PropertyInfo.create method
Eduardo Habkost
2020-12-18
qdev: Add name parameter to qdev_class_add_property()
Eduardo Habkost
2020-12-18
qdev: Avoid using prop->name unnecessarily
Eduardo Habkost
2020-12-18
qdev: Get just property name at error_set_from_qdev_prop_error()
Eduardo Habkost
2020-12-18
sparc: Use DEFINE_PROP for nwindows property
Eduardo Habkost
2020-12-18
qdev: Reuse DEFINE_PROP in all DEFINE_PROP_* macros
Eduardo Habkost
2020-12-18
qdev: Move softmmu properties to qdev-properties-system.h
Eduardo Habkost
2020-12-18
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201...
Peter Maydell
2020-12-17
riscv/opentitan: Update the OpenTitan memory layout
Alistair Francis
2020-12-17
hw/riscv: Use the CPU to determine if 32-bit
Alistair Francis
2020-12-17
target/riscv: cpu: Set XLEN independently from target
Alistair Francis
2020-12-17
target/riscv: csr: Remove compile time XLEN checks
Alistair Francis
2020-12-17
target/riscv: cpu_helper: Remove compile time XLEN checks
Alistair Francis
2020-12-17
target/riscv: cpu: Remove compile time XLEN checks
Alistair Francis
2020-12-17
target/riscv: Specify the XLEN for CPUs
Alistair Francis
2020-12-17
target/riscv: Add a riscv_cpu_is_32bit() helper function
Alistair Francis
2020-12-17
target/riscv: fpu_helper: Match function defs in HELPER macros
Alistair Francis
2020-12-17
hw/riscv: sifive_u: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: spike: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: virt: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: boot: Remove compile time XLEN checks
Alistair Francis
2020-12-17
riscv: virt: Remove target macro conditionals
Alistair Francis
2020-12-17
riscv: spike: Remove target macro conditionals
Alistair Francis
2020-12-17
target/riscv: Add a TYPE_RISCV_CPU_BASE CPU
Alistair Francis
2020-12-17
hw/riscv: Expand the is 32-bit check to support more CPUs
Alistair Francis
2020-12-17
intc/ibex_plic: Clear interrupts that occur during claim process
Alistair Francis
2020-12-17
target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR
Alex Richardson
2020-12-17
target/riscv: Fix the bug of HLVX/HLV/HSV
Yifei Jiang
2020-12-17
hw/core/register.c: Don't use '#' flag of printf format
Xinhao Zhang
2020-12-17
hw/riscv: microchip_pfsoc: add QSPI NOR flash
Vitaly Wool
2020-12-17
hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
Anup Patel
2020-12-17
Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'...
Peter Maydell
2020-12-16
cpu: Remove unnecessary noop methods
Eduardo Habkost
2020-12-16
tcg: Make CPUClass.debug_excp_handler optional
Eduardo Habkost
2020-12-16
tcg: make CPUClass.cpu_exec_* optional
Eduardo Habkost
2020-12-16
tcg: cpu_exec_{enter,exit} helpers
Eduardo Habkost
2020-12-16
i386: tcg: remove inline from cpu_load_eflags
Claudio Fontana
2020-12-16
i386: move TCG cpu class initialization to tcg/
Claudio Fontana
2020-12-16
x86/cpu: Add AVX512_FP16 cpu feature
Cathy Zhang
2020-12-16
i386: move hyperv_limits initialization to x86_cpu_realizefn()
Vitaly Kuznetsov
2020-12-16
i386: move hyperv_version_id initialization to x86_cpu_realizefn()
Vitaly Kuznetsov
2020-12-16
i386: move hyperv_interface_id initialization to x86_cpu_realizefn()
Vitaly Kuznetsov
2020-12-16
i386: move hyperv_vendor_id initialization to x86_cpu_realizefn()
Vitaly Kuznetsov
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