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2020-10-09error: Remove NULL checks on error_propagate() calls (again)Markus Armbruster
Patch created mechanically by rerunning: $ spatch --sp-file scripts/coccinelle/error_propagate_null.cocci \ --macro-file scripts/cocci-macro-file.h \ --use-gitgrep . Cc: Jens Freimann <jfreimann@redhat.com> Cc: Hailiang Zhang <zhang.zhanghailiang@huawei.com> Cc: Juan Quintela <quintela@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200722084048.1726105-4-armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com>
2020-10-08Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20201008-1' into staging target-arm queue: * hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer * hw/arm/fsl-imx25: Fix a typo * hw/arm/sbsa-ref : Fix SMMUv3 Initialisation * hw/arm/sbsa-ref : allocate IRQs for SMMUv3 * hw/char/bcm2835_aux: Allow less than 32-bit accesses * hw/arm/virt: Implement kvm-steal-time * target/arm: Make '-cpu max' have a 48-bit PA # gpg: Signature made Thu 08 Oct 2020 21:40:31 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201008-1: target/arm: Make '-cpu max' have a 48-bit PA hw/arm/virt: Implement kvm-steal-time tests/qtest: Restore aarch64 arm-cpu-features test hw/arm/virt: Move kvm pmu setup to virt_cpu_post_init hw/arm/virt: Move post cpu realize check into its own function target/arm/kvm: Make uncalled stubs explicitly unreachable linux headers: sync to 5.9-rc7 hw/char/bcm2835_aux: Allow less than 32-bit accesses hw/arm/sbsa-ref : allocate IRQs for SMMUv3 hw/arm/sbsa-ref : Fix SMMUv3 Initialisation hw/arm/fsl-imx25: Fix a typo hw/ssi/npcm7xx_fiu: Fix handling of unsigned integer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08target/arm: Make '-cpu max' have a 48-bit PAPeter Maydell
QEMU supports a 48-bit physical address range, but we don't currently expose it in the '-cpu max' ID registers (you get the same range as Cortex-A57, which is 44 bits). Set the ID_AA64MMFR0.PARange field to indicate 48 bits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20201001160116.18095-1-peter.maydell@linaro.org
2020-10-08Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20201008' into stagingPeter Maydell
Extend maximum gvec vector size Fix i386 avx2 dupi Fix mips host user-only write detection Misc cleanups. # gpg: Signature made Thu 08 Oct 2020 13:55:22 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20201008: accel/tcg: Fix computing of is_write for MIPS tcg: Remove TCG_TARGET_HAS_cmp_vec tcg/optimize: Fold dup2_vec tcg: Fix generation of dupi_vec for 32-bit host tcg/i386: Fix dupi for avx2 32-bit hosts tcg: Remove TCGOpDef.used tcg: Move some TCG_CT_* bits to TCGArgConstraint bitfields tcg: Remove TCG_CT_REG tcg: Move sorted_args into TCGArgConstraint.sort_index tcg: Drop union from TCGArgConstraint tcg: Adjust simd_desc size encoding Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/virt: Implement kvm-steal-timeAndrew Jones
We add the kvm-steal-time CPU property and implement it for machvirt. A tiny bit of refactoring was also done to allow pmu and pvtime to use the same vcpu device helper functions. Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-7-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08tests/qtest: Restore aarch64 arm-cpu-features testAndrew Jones
arm-cpu-features got dropped from the AArch64 tests during the meson conversion shuffle. Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-6-drjones@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/virt: Move kvm pmu setup to virt_cpu_post_initAndrew Jones
Move the KVM PMU setup part of fdt_add_pmu_nodes() to virt_cpu_post_init(), which is a more appropriate location. Now fdt_add_pmu_nodes() is also named more appropriately, because it no longer does anything but fdt node creation. No functional change intended. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-5-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/virt: Move post cpu realize check into its own functionAndrew Jones
We'll add more to this new function in coming patches so we also state the gic must be created and call it below create_gic(). No functional change intended. Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-4-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08target/arm/kvm: Make uncalled stubs explicitly unreachableAndrew Jones
When we compile without KVM support !defined(CONFIG_KVM) we generate stubs for functions that the linker will still encounter. Sometimes these stubs can be executed safely and are placed in paths where they get executed with or without KVM. Other functions should never be called without KVM. Those functions should be guarded by kvm_enabled(), but should also be robust to refactoring mistakes. Putting a g_assert_not_reached() in the function should help. Additionally, the g_assert_not_reached() calls may actually help the linker remove some code. We remove the stubs for kvm_arm_get/put_virtual_time(), as they aren't necessary at all - the only caller is in kvm.c Reviewed-by: Eric Auger <eric.auger@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-3-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08linux headers: sync to 5.9-rc7Andrew Jones
Update against Linux 5.9-rc7. Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Andrew Jones <drjones@redhat.com> Message-id: 20201001061718.101915-2-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/char/bcm2835_aux: Allow less than 32-bit accessesPhilippe Mathieu-Daudé
The "BCM2835 ARM Peripherals" datasheet [*] chapter 2 ("Auxiliaries: UART1 & SPI1, SPI2"), list the register sizes as 3/8/16/32 bits. We assume this means this peripheral allows 8-bit accesses. This was not an issue until commit 5d971f9e67 which reverted ("memory: accept mismatching sizes in memory_region_access_valid"). The model is implemented as 32-bit accesses (see commit 97398d900c, all registers are 32-bit) so replace MemoryRegionOps.valid as MemoryRegionOps.impl, and re-introduce MemoryRegionOps.valid with a 8/32-bit range. [*] https://www.raspberrypi.org/app/uploads/2012/02/BCM2835-ARM-Peripherals.pdf Fixes: 97398d900c ("bcm2835_aux: add emulation of BCM2835 AUX (aka UART1) block") Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201002181032.1899463-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/sbsa-ref : allocate IRQs for SMMUv3Graeme Gregory
Original commit did not allocate IRQs for the SMMUv3 in the irqmap effectively using irq 0->3 (shared with other devices). Assuming original intent was to allocate unique IRQs then add an allocation to the irqmap. Fixes: e9fdf453240 ("hw/arm: Add arm SBSA reference machine, devices part") Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20201007100732.4103790-3-graeme@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/sbsa-ref : Fix SMMUv3 InitialisationGraeme Gregory
SMMUv3 has an error in a previous patch where an i was transposed to a 1 meaning interrupts would not have been correctly assigned to the SMMUv3 instance. Fixes: 48ba18e6d3f3 ("hw/arm/sbsa-ref: Simplify by moving the gic in the machine state") Signed-off-by: Graeme Gregory <graeme@nuviainc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Eric Auger <eric.auger@redhat.com> Message-id: 20201007100732.4103790-2-graeme@nuviainc.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/arm/fsl-imx25: Fix a typoPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201002080935.1660005-1-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08hw/ssi/npcm7xx_fiu: Fix handling of unsigned integerPhilippe Mathieu-Daudé
Fix integer handling issues handling issue reported by Coverity: hw/ssi/npcm7xx_fiu.c: 162 in npcm7xx_fiu_flash_read() >>> CID 1432730: Integer handling issues (NEGATIVE_RETURNS) >>> "npcm7xx_fiu_cs_index(fiu, f)" is passed to a parameter that cannot be negative. 162 npcm7xx_fiu_select(fiu, npcm7xx_fiu_cs_index(fiu, f)); hw/ssi/npcm7xx_fiu.c: 221 in npcm7xx_fiu_flash_write() 218 cs_id = npcm7xx_fiu_cs_index(fiu, f); 219 trace_npcm7xx_fiu_flash_write(DEVICE(fiu)->canonical_path, cs_id, addr, 220 size, v); >>> CID 1432729: Integer handling issues (NEGATIVE_RETURNS) >>> "cs_id" is passed to a parameter that cannot be negative. 221 npcm7xx_fiu_select(fiu, cs_id); Since the index of the flash can not be negative, return an unsigned type. Reported-by: Coverity (CID 1432729 & 1432730: NEGATIVE_RETURNS) Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Message-id: 20200919132435.310527-1-f4bug@amsat.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-08accel/tcg: Fix computing of is_write for MIPSKele Huang
Detect all MIPS store instructions in cpu_signal_handler for all available MIPS versions, and set is_write if encountering such store instructions. This fixed the error while dealing with self-modified code for MIPS. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Kele Huang <kele.hwang@gmail.com> Signed-off-by: Xu Zou <iwatchnima@gmail.com> Message-Id: <20201002081420.10814-1-kele.hwang@gmail.com> [rth: Use uintptr_t for pc to fix n32 build error.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Remove TCG_TARGET_HAS_cmp_vecRichard Henderson
The cmp_vec opcode is mandatory; this symbol is unused. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg/optimize: Fold dup2_vecRichard Henderson
When the two arguments are identical, this can be reduced to dup_vec or to mov_vec from a tcg_constant_vec. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Fix generation of dupi_vec for 32-bit hostRichard Henderson
The definition of INDEX_op_dupi_vec is that it operates on units of tcg_target_ulong -- in this case 32 bits. It does not work to use this for a uint64_t value that happens to be small enough to fit in tcg_target_ulong. Fixes: d2fd745fe8b Fixes: db432672dc5 Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg/i386: Fix dupi for avx2 32-bit hostsRichard Henderson
The previous change wrongly stated that 32-bit avx2 should have used VPBROADCASTW. But that's a 16-bit broadcast and we want a 32-bit broadcast. Fixes: 7b60ef3264e Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Remove TCGOpDef.usedRichard Henderson
The last user of this field disappeared in f69d277ece4. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Move some TCG_CT_* bits to TCGArgConstraint bitfieldsRichard Henderson
These are easier to set and test when they have their own fields. Reduce the size of alias_index and sort_index to 4 bits, which is sufficient for TCG_MAX_OP_ARGS. This leaves only the bits indicating constants within the ct field. Move all initialization to allocation time, rather than init individual fields in process_op_defs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Remove TCG_CT_REGRichard Henderson
This wasn't actually used for anything, really. All variable operands must accept registers, and which are indicated by the set in TCGArgConstraint.regs. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Move sorted_args into TCGArgConstraint.sort_indexRichard Henderson
This uses an existing hole in the TCGArgConstraint structure and will be convenient for keeping the data in one place. Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Drop union from TCGArgConstraintRichard Henderson
The union is unused; let "regs" appear in the main structure without the "u.regs" wrapping. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08tcg: Adjust simd_desc size encodingRichard Henderson
With larger vector sizes, it turns out oprsz == maxsz, and we only need to represent mismatch for oprsz <= 32. We do, however, need to represent larger oprsz and do so without reducing SIMD_DATA_BITS. Reduce the size of the oprsz field and increase the maxsz field. Steal the oprsz value of 24 to indicate equality with maxsz. Tested-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-08Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/machine-next-pull-request' into staging machine + QOM queue, 2020-10-06 * QOM documentation fixes and cleanups (Eduardo Habkost) * user-mode: Prune build dependencies (Philippe Mathieu-Daudé) * qom: Improve error message (Philippe Mathieu-Daudé) * numa: hmat: require parent cache description before the next level one (Igor Mammedov) # gpg: Signature made Tue 06 Oct 2020 23:09:03 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: (21 commits) numa: hmat: require parent cache description before the next level one kernel-doc: Remove $decl_type='type name' hack memory: Explicitly tag doc comments for structs qom: Explicitly tag doc comments for typedefs and structs kernel-doc: Handle function typedefs without asterisks kernel-doc: Handle function typedefs that return pointers docs/devel/qom: Avoid long lines docs/devel/qom: Remove usage of <code> docs/devel/qom: Use *emphasis* for emphasis docs/devel/qom: Fix indentation of code blocks docs/devel/qom: Fix indentation of bulleted list qom: Fix DECLARE_*CHECKER documentation qom: Improve error message displayed with missing object properties hw/core/cpu: Add missing 'exec/cpu-common.h' include hw/core/qdev-properties: Extract system-mode specific properties hw/core/qdev-properties: Export some integer-related functions hw/core/qdev-properties: Export qdev_prop_enum hw/core/qdev-properties: Export enum-related functions hw/core/qdev-properties: Fix code style hw/core/qdev-properties: Use qemu_strtoul() in set_pci_host_devaddr() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-06Merge remote-tracking branch ↵Peter Maydell
'remotes/huth-gitlab/tags/pull-request-2020-10-06' into staging * Don't stop at the first unbootable device, continue scanning * Fix corner cases in booting from ECKD * s390x-ccw bios cleanup part 2​ # gpg: Signature made Tue 06 Oct 2020 19:17:46 BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full] # gpg: aka "Thomas Huth <thuth@redhat.com>" [full] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2020-10-06: tests/qtest/cdrom: Add more s390x-related boot tests pc-bios/s390: Update the s390-ccw bios binaries pc-bios: s390x: Go into disabled wait when encountering a PGM exception pc-bios: s390x: Use reset PSW if avaliable pc-bios: s390x: Save PSW rework pc-bios: s390x: Fix bootmap.c zipl component entry data handling pc-bios/s390-ccw: break loop if a null block number is reached pc-bios/s390-ccw: fix off-by-one error pc-bios/s390-ccw/main: Remove superfluous call to enable_subchannel() pc-bios/s390-ccw: Allow booting in case the first virtio-blk disk is bad pc-bios/s390-ccw: Scan through all devices if no boot device specified pc-bios/s390-ccw: Do not bail out early if not finding a SCSI disk pc-bios/s390-ccw: Move the inner logic of find_subch() to a separate function pc-bios/s390-ccw: Introduce ENODEV define and remove guards of others pc-bios/s390-ccw: Move ipl-related code from main() into a separate function pc-bios/s390-ccw/Makefile: Compile with -std=gnu99, -fwrapv and -fno-common Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-06tests/qtest/cdrom: Add more s390x-related boot testsThomas Huth
Let's add two new tests: 1) Booting with "bootindex" is the architected default behavior on the s390x target, so we should have at least one test that is using the "bootindex" property. 2) The s390-ccw bios used to fail when other unbootable devices have been specified before the bootable device (without "bootindex"). Now that the s390-ccw bios is a little bit smarter here, we should test this scenario, too, to avoid regressions. Message-Id: <20200806105349.632-10-thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390: Update the s390-ccw bios binariesThomas Huth
Make sure that the binaries match the current state of the sources. Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios: s390x: Go into disabled wait when encountering a PGM exceptionJanosch Frank
Let's setup a PGM PSW, so we won't load 0s when a program exception happens. Instead we'll load a disabled wait PSW. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201006094249.50640-5-frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios: s390x: Use reset PSW if avaliableJanosch Frank
If a blob provides a reset PSW then we should use it instead of branching to the PSW address and using our own mask. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201006094249.50640-4-frankja@linux.ibm.com> [thuth: Use Elvis operator to shorten long line] Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios: s390x: Save PSW reworkJanosch Frank
We don't need to save the ipl_continue variable in lowcore and have it limited to 32 bits because of the lowcore layout. Let's move it to a new 64 bit variable and get rid of the reset info struct. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201006094249.50640-3-frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios: s390x: Fix bootmap.c zipl component entry data handlingJanosch Frank
The two main types of zipl component entries are execute and load/data. The last member of the component entry struct therefore denotes either a PSW or an address. Let's make this a bit more clear by introducing a union and cleaning up the code that uses that struct member. The execute type component entries written by zipl contain short PSWs, not addresses. Let's mask them and only pass the address part to jump_to_IPL_code(uint64_t address) because it expects an address as visible by the name of the argument. Signed-off-by: Janosch Frank <frankja@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201006094249.50640-2-frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: break loop if a null block number is reachedMarc Hartmayer
Break the loop if `cur_block_nr` is a null block number because this means that the end of chunk is reached. In this case we will try to boot the default entry. Fixes: ba831b25262a ("s390-ccw: read stage2 boot loader data to find menu") Reviewed-by: Collin Walling <walling@linux.ibm.com> Signed-off-by: Marc Hartmayer <mhartmay@linux.ibm.com> Message-Id: <20200924085926.21709-3-mhartmay@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: fix off-by-one errorMarc Hartmayer
This error takes effect when the magic value "zIPL" is located at the end of a block. For example if s2_cur_blk = 0x7fe18000 and the magic value "zIPL" is located at 0x7fe18ffc - 0x7fe18fff. Fixes: ba831b25262a ("s390-ccw: read stage2 boot loader data to find menu") Reviewed-by: Collin Walling <walling@linux.ibm.com> Signed-off-by: Marc Hartmayer <mhartmay@linux.ibm.com> Message-Id: <20200924085926.21709-2-mhartmay@linux.ibm.com> Reviewed-by: Thomas Huth <thuth@redhat.com> [thuth: Use "<= ... - 4" instead of "< ... - 3"] Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw/main: Remove superfluous call to enable_subchannel()Thomas Huth
enable_subchannel() is already done during is_dev_possibly_bootable() (which is called from find_boot_device() -> find_subch()), so there is no need to do this again in the main() function. Message-Id: <20200806105349.632-9-thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: Allow booting in case the first virtio-blk disk is badThomas Huth
If you try to boot with two virtio-blk disks (without bootindex), and only the second one is bootable, the s390-ccw bios currently stops at the first disk and does not continue booting from the second one. This is annoying - and all other major QEMU firmwares succeed to boot from the second disk in this case, so we should do the same in the s390-ccw bios, too. Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200806105349.632-8-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: Scan through all devices if no boot device specifiedThomas Huth
If no boot device has been specified (via "bootindex=..."), the s390-ccw bios scans through all devices to find a bootable device. But so far, it stops at the very first block device (including virtio-scsi controllers without attached devices) that it finds, no matter whether it is bootable or not. That leads to some weird situatation where it is e.g. possible to boot via: qemu-system-s390x -hda /path/to/disk.qcow2 but not if there is e.g. a virtio-scsi controller specified before: qemu-system-s390x -device virtio-scsi -hda /path/to/disk.qcow2 While using "bootindex=..." is clearly the preferred way of booting on s390x, we still can make the life for the users at least a little bit easier if we look at all available devices to find a bootable one. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1846975 Reviewed-by: Cornelia Huck <cohuck@redhat.com> Message-Id: <20200806105349.632-7-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: Do not bail out early if not finding a SCSI diskThomas Huth
In case the user did not specify a boot device, we want to continue looking for other devices if there are no valid SCSI disks on a virtio- scsi controller. As a first step, do not panic in this case and let the control flow carry the error to the upper functions instead. Message-Id: <20200806105349.632-6-thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: Move the inner logic of find_subch() to a separate functionThomas Huth
Move the code to a separate function to be able to re-use it from a different spot later. Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Message-Id: <20200806105349.632-5-thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: Introduce ENODEV define and remove guards of othersThomas Huth
Remove the "#ifndef E..." guards from the defines here - the header guard S390_CCW_H at the top of the file should avoid double definition, and if the error code is defined in a different file already, we're in trouble anyway, then it's better to see the error at compile time instead of hunting weird behavior during runtime later. Also define ENODEV - we will use this in a later patch. Message-Id: <20200806105349.632-4-thuth@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw: Move ipl-related code from main() into a separate functionThomas Huth
Let's move this part of the code into a separate function to be able to use it from multiple spots later. Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Janosch Frank <frankja@linux.ibm.com> Message-Id: <20200806105349.632-3-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06pc-bios/s390-ccw/Makefile: Compile with -std=gnu99, -fwrapv and -fno-commonThomas Huth
The main QEMU code is compiled with -std=gnu99, -fwrapv and -fno-common. We should use the same flags for the s390-ccw bios, too, to avoid that we get different behavior with different compiler versions that changed their default settings in the course of time (it happened at least with -std=... and -fno-common in the past already). While we're at it, also group the other flags here in a little bit nicer fashion: Move the two "-m" flags out of the "-f" area and specify them on a separate line. Reviewed-by: Claudio Imbrenda <imbrenda@linux.ibm.com> Acked-by: Cornelia Huck <cohuck@redhat.com> Acked-by: Janosch Frank <frankja@linux.ibm.com> Message-Id: <20200806105349.632-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-10-06numa: hmat: require parent cache description before the next level oneIgor Mammedov
Spec[1] defines 0 - 3 level memory side cache, however QEMU CLI allows to specify an intermediate cache level without specifying previous level. Such option(s) silently ignored when building HMAT table, which leads to incomplete cache information. Make sure that previous level exists and error out if it hasn't been provided. 1) ACPI 6.2A 5.2.27.5 Memory Side Cache Information Structure Fixes: https://bugzilla.redhat.com/show_bug.cgi?id=1842877 Signed-off-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201006150002.1601845-1-imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06kernel-doc: Remove $decl_type='type name' hackEduardo Habkost
The $decl_type='type name' hack makes it impossible to document macros with uppercase names (e.g. most of the macros in object.h). Now that we have explicitly tagged the struct and typedef doc comments in memory.h and object.h, we don't need that hack anymore. This will make the documentation for the macros in object.h finally be rendered as expected. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06memory: Explicitly tag doc comments for structsEduardo Habkost
This will allow us to remove the QEMU-specific $decl_type='type name' hack from the kernel-doc script. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06qom: Explicitly tag doc comments for typedefs and structsEduardo Habkost
If we explicitly indicate we are documenting a typedef or a struct, we'll be able to remove the $decl_type='type name' hack from kernel-doc. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06kernel-doc: Handle function typedefs without asterisksEduardo Habkost
Example of typedef that was not parsed by kernel-doc: typedef void (ObjectUnparent)(Object *obj); Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-10-06kernel-doc: Handle function typedefs that return pointersEduardo Habkost
One example that was not being parsed correctly by kernel-doc is: typedef Object *(ObjectPropertyResolve)(Object *obj, void *opaque, const char *part); Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Message-Id: <20201003024123.193840-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
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