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2012-09-22tcg/mips: implement movcond op on MIPS32R2Aurelien Jarno
movcond operation can be implemented on MIPS32 Release 2 using the MOVN, MOVZ, SLT and SLTU instructions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: implement deposit op on MIPS32R2Aurelien Jarno
deposit operations can be optimized on MIPS32 Release 2 using the INS instruction. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: implement rotl/rotr ops on MIPS32R2Aurelien Jarno
rotr operations can be optimized on MIPS32 Release 2 using the ROTR and ROTRV instructions. Also implemented rotl operations by subtracting the shift from 32. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: optimize bswap{16,16s,32} on MIPS32R2Aurelien Jarno
bswap operations can be optimized on MIPS32 Release 2 using the ROTR, WSBH and SEH instructions. We can't use the non-R2 code to implement the ops due to registers constraints, so don't define the corresponding TCG_TARGET_HAS_bswap* values. Also bswap16* operations are supposed to be called with the 16 high bits zeroed. This is the case everywhere (including for TCG by definition) except when called from the store helper. Remove the AND instructions from bswap16* and move it there. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: optimize brcond arg, 0Aurelien Jarno
MIPS has some conditional branch instructions when comparing with zero. Use them. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: use stack for TCG tempsAurelien Jarno
Use stack instead of temp_buf array in CPUState for TCG temps. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: don't use global pointerAurelien Jarno
Don't use the global pointer in TCG, in case helpers try access global variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: use TCGArg or TCGReg instead of intAurelien Jarno
Instead of int, use the correct TCGArg and TCGReg type: TCGReg when representing a TCG target register, TCGArg when representing the latter or a constant. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg/mips: kill warnings in user modeAurelien Jarno
Recent versions of GCC emit warnings when compiling user mode targets. Kill them by reordering a bit the #ifdef. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-22tcg-mips: fix wrong usage of 'Z' constraintAurelien Jarno
The 'Z' constraint has been introduced to map the zero register. However when the op also accept a constant, there is no point to accept the zero register in addition. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21Merge branch 'usb.65' of git://git.kraxel.org/qemuAurelien Jarno
* 'usb.65' of git://git.kraxel.org/qemu: uhci: Don't queue up packets after one with the SPD flag set usb-redir: Revert usb-redir part of commit 93bfef4c usb-redir: Add chardev open / close debug logging usb-redir: Add support for migration usb-redir: Store max_packet_size in endp_data usb-redir: Add an already_in_flight packet-id queue usb-redir: Change cancelled packet code into a generic packet-id queue ehci: Walk async schedule before and after migration ehci: Don't set seen to 0 when removing unseen queue-heads configure: usbredir fixes ehci: Don't process too much frames in 1 timer tick (v2) ehci: Fix interrupts stopping when Interrupt Threshold Control is 8 ehci: switch to new-style memory ops usb-host: allow emulated (non-async) control requests without USBPacket
2012-09-21tcg-hppa: Fix broken load/store helpersRichard Henderson
The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was not respecting the ABI requirement for 64-bit values being aligned in registers. Mirror the ARM port in use of helper functions to marshal arguments into the correct registers. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg-hppa: Fix brcond2 and setcond2Richard Henderson
Neither of these functions were performing double-word compares properly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Fix !USE_DIRECT_JUMPRichard Henderson
Commit 6375e09e changed the type of TranslationBlock.tb_next, but failed to change the type of TCGContext.tb_next. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21gdbstub/sh4: fix build with USE_SOFTFLOAT_STRUCT_TYPESAurelien Jarno
We have to use different type to access float values when USE_SOFTFLOAT_STRUCT_TYPES is defined. Rework SH4 version of cpu_gdb_{read,write}_register() using a single case, and fixing the coding style. Use ldll_p() and stfl_p() to access float values. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Optimize two-address commutative operationsRichard Henderson
While swapping constants to the second operand, swap sources matching destinations to the first operand. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Optimize movcond for constant comparisonsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg-i386: Implement movcondRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-alpha: Use movcondRichard Henderson
For proper cmov insns, as well as the non-goto-tb case of conditional branch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21tcg: Introduce movcondRichard Henderson
Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: remove useless codeAurelien Jarno
Almost dead code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: cleanup DisasContextAurelien Jarno
We should avoid accessing env at translation stage, except of course for static values like the supported features. Remove variables copied from env in DisasContext and use the TB flags instead. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: rework exceptions handlingAurelien Jarno
Since commit fd4bab102 PC is restored in case of exception through code retranslation. While it is clearly the thing to do in case it is not not known if an helper is going to trigger an exception or not (e.g. for load/store, FPU, etc.), it just make things slower when the exception is already known at translation time. Partially revert this commit and save PC in the TCG code. Set bstate to BS_BRANCH to not generate TCG exit code. Micro-optimize the sleep helper. Make all the exception helpers to call raise_exception and mark it as noreturn. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: remove gen_clr_t() and gen_set_t()Aurelien Jarno
gen_clr_t() and gen_set_t() have very few callers and can be remplaced by a single line. Remove them. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: optimize swap.wAurelien Jarno
It's possible swap the two 16-bit words of a 32-bit register using a rotation. If the TCG target doesn't implement rotation, the replacement code is similar to the previously implemented code. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: optimize xtrctAurelien Jarno
The register being 32 bit long, after a shift to the right by 16 bits, the upper 16 bit are already cleared. There is no need to call ext16u to clear them. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: implement addv and subv using TCGAurelien Jarno
addv and subv helpers implementation is directly copied from the SH4 manual and looks quite complex. It is however possible to explain it without branches, and is therefore possible to implement it with TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: implement addc and subc using TCGAurelien Jarno
Now that setcond is available, the addc and subc can easily be implemented using TCG. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: use float32_muladd() to implement fmacAurelien Jarno
There is no need to add a SH4 specific pickNaNMulAdd() to softfloat as SH4 is always returning a default NaN. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-sh4: mark a few helpers const and pureAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-21target-xtensa: don't emit extra tcg_gen_goto_tbMax Filippov
Unconditional gen_check_loop_end at the end of disas_xtensa_insn can emit tcg_gen_goto_tb with slot id already used in the TB (e.g. when TB ends at LEND with a branch). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: malc <av1474@comtv.ru>
2012-09-21target-xtensa: fix extui shift amountMax Filippov
extui opcode only uses lowermost op1 bit for sa4. Reported-by: malc <av1474@comtv.ru> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: malc <av1474@comtv.ru>
2012-09-19tcg/optimize: fix end of basic block detectionAurelien Jarno
Commit e31b0a7c050711884ad570fe73df806520953618 fixed copy propagation on 32-bit host by restricting the copy between different types. This was the wrong fix. The real problem is that the all temps states should be reset at the end of a basic block. This was done by adding such operations in the switch, but brcond2 was forgotten (that's why the crash was only observed on 32-bit hosts). Fix that by looking at the TCG_OPF_BB_END instead. We need to keep the case for op_set_label as temps might be modified through another path. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Implement Loongson Multimedia InstructionsRichard Henderson
Implements all of the COP2 instructions except for the S<cond> family of comparisons. The documentation is unclear for those. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Always evaluate debugging macro argumentsRichard Henderson
this will prevent some of the compilation errors with debugging enabled from creeping back in. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Fix MIPS_DEBUG.Richard Henderson
The macro uses the DisasContext. Pass it around as needed. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19target-mips: Set opn in gen_ldst_multiple.Richard Henderson
Used by MIPS_DEBUG, when enabled. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19hw/pflash_cfi0[12]: Use host-utils.h ctz32()Peter Maydell
Drop the private reimplementation of ctz32() from pflash_cfi0[12] in favour of using the standard version from host-utils.h. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19pflash_cfi01: fix vendor specific extended queryAurelien Jarno
pflash_cfi01 announces a version number of 1.1, which implies "Protection Register Information" and "Burst Read information" sections, which are not provided. Decrease the version number to 1.0 so that only the "Protection Register Information" section is needed. Set the number of protection fields (0x3f) to 0x01, as 0x00 means 256 protections field, which makes the CFI table bigger than the current implementation, causing some kernels to fail to read it. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19revert "TCG: fix copy propagation"Aurelien Jarno
Given the copy propagation breakage on 32-bit hosts has been fixed commit e31b0a7c050711884ad570fe73df806520953618 can be reverted. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19tcg: mark set_label with TCG_OPF_BB_END flagAurelien Jarno
set_label is effectively the end of a basic block, as no optimization can be made accross it. It was treated as such in the liveness analysis code, but as a special case. Mark it with TCG_OPF_BB_END flag so that this information can be used by other parts of the TCG code, and remove the special case in the liveness analysis code. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19tcg/i386: allow constants in load/store opsAurelien Jarno
On x86, it is possible to move a constant value to memory. Add code to handle a constant argument to load/store ops. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-09-19xilinx_timer: Fix a compile error if debug enabledChris Wulff
There was a missing include of qemu-log and a variable name in a printf was out of date. Signed-off-by: Chris Wulff <crwulff@gmail.com> Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx: fix names of ethernet and dma links.Peter A. G. Crosthwaite
These names were incorrect. Fixed to match to actual link names Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx.h: Error check when setting linksPeter A. G. Crosthwaite
Assert that the ethernet and dma controller are sucessfully linked to their peers. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx_timer: Fixed "frequency" prop namePeter A. G. Crosthwaite
The "frequency" qdev prop matches the "clock-frequency" property in Xilinx EDK. Renamed "frequency" -> "clock-frequency" accordingly. Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx_timer: Send dbg msgs to stderr not stdoutPeter A. G. Crosthwaite
Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19xilinx_timer: Removed comma in device namePeter A. G. Crosthwaite
Fixes an error in a61e4b07a30c062260d2d01771773f14820d1eb7 Signed-off-by: Peter A. G. Crosthwaite <peter.crosthwaite@petalogix.com>
2012-09-19arch_init.c: Improve '-soundhw help' for non-HAS_AUDIO_CHOICE archsPeter Maydell
For architectures which don't set HAS_AUDIO_CHOICE, improve the '-soundhw help' message so that it doesn't simply print an empty list, implying no sound support at all. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: malc <av1474@comtv.ru>
2012-09-17Merge remote-tracking branch 'kiszka/queues/slirp' into stagingAnthony Liguori
* kiszka/queues/slirp: slirp: Implement TFTP Blocksize option slirp: Remove unused return value of tftp_send_next_block slirp: Handle more than 65535 blocks in TFTP transfers slirp: improve TFTP performance slirp: Fix error reported by static code analysis slirp: Remove wrong type casts ins debug statements
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