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2013-07-29cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState"Andreas Färber
Commit c643bed99 moved qemu_init_vcpu() calls to common CPUState code. This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed". The reason for the failure is that CPUClass::kvm_fd is not yet initialized in the following call graph: ->x86_cpu_realizefn ->x86_cpu_apic_realize ->qdev_init ->device_set_realized ->device_reset (hotplugged == 1) ->apic_reset_common ->vapic_base_update ->kvm_apic_vapic_base_update This causes attempted KVM vCPU ioctls to fail. By contrast, in the non-hotplug case the APIC is reset much later, when the vCPU is already initialized. As a quick and safe solution, move the qemu_init_vcpu() call back into the targets' realize functions. Reported-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com> Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386) Tested-by: Jia Liu <proljc@gmail.com> (for openrisc) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-29Merge remote-tracking branch 'sstabellini/xen-130729' into stagingAnthony Liguori
# By Paul Durrant (1) and Stefano Stabellini (1) # Via Stefano Stabellini * sstabellini/xen-130729: Xen PV Device xen_disk: support "direct-io-safe" backend option Message-id: 1375096790-12815-1-git-send-email-stefano.stabellini@eu.citrix.com Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29Merge remote-tracking branch 'agraf/s390-for-upstream' into stagingAnthony Liguori
# By Alexander Graf (1) and others # Via Alexander Graf * agraf/s390-for-upstream: s390: update s390-ccw.img s390/ipl: Fix boot order s390/IPL: Allow boot from other ssid than 0 Message-id: 1375092324-23943-1-git-send-email-agraf@suse.de Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29Merge remote-tracking branch 'sweil/w32' into stagingAnthony Liguori
# By Stefan Weil (10) and others # Via Aurelien Jarno (1) and Stefan Weil (1) * sweil/w32: (27 commits) w32, w64: Add build rule for installer target-mips: fix mipsdsp_mul_q31_q31 mips_malta: fix copy of the 0x1fc00000 region linux-user: correct argument number for sys_mremap and sys_splice target-mips: Remove assignment to a variable which is never used target-mips: fix mipsdsp_trunc16_sat16_round hw/mips: align initrd to 64KB to avoid kernel error pflash_cfi01: duplicate status byte from bits 23:16 for 32bit reads mips_malta: generate SMBUS EEPROM data mips_malta: cap BIOS endian swap length at 0x3e0000 bytes mips_malta: generate SPD EEPROM data at runtime mips_malta: correct reading MIPS revision at 0x1fc00010 mips_malta: fix BIOS endianness swapping mips_malta: QOM cast cleanup target-mips: fix branch in likely delay slot tcg assert target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15 target-mips: Remove assignment to a variable which is never used misc: Use g_assert_not_reached for code which is expected to be unreachable qemu-options: mention C-a h in the -nographic doc misc: Fix new typos in comments and strings ... Message-id: 1374989579-24933-1-git-send-email-sw@weilnetz.de Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-07-29Xen PV DevicePaul Durrant
Introduces a new Xen PV PCI device which will act as a binding point for PV drivers for Xen. The device has parameterized vendor-id, device-id and revision to allow to be configured as a binding point for any vendor's PV drivers. Signed-off-by: Paul Durrant <paul.durrant@citrix.com> Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: Andreas Färber <afaerber@suse.de>
2013-07-29xen_disk: support "direct-io-safe" backend optionStefano Stabellini
Support backend option "direct-io-safe". This is documented as follows in the Xen backend specification: * direct-io-safe * Values: 0/1 (boolean) * Default Value: 0 * * The underlying storage is not affected by the direct IO memory * lifetime bug. See: * http://lists.xen.org/archives/html/xen-devel/2012-12/msg01154.html * * Therefore this option gives the backend permission to use * O_DIRECT, notwithstanding that bug. * * That is, if this option is enabled, use of O_DIRECT is safe, * in circumstances where we would normally have avoided it as a * workaround for that bug. This option is not relevant for all * backends, and even not necessarily supported for those for * which it is relevant. A backend which knows that it is not * affected by the bug can ignore this option. * * This option doesn't require a backend to use O_DIRECT, so it * should not be used to try to control the caching behaviour. Also, BDRV_O_NATIVE_AIO is ignored if BDRV_O_NOCACHE, so clarify the default flags passed to the qemu block layer. The original proposal for a "cache" backend option has been dropped because it was believed too wide, especially considering that at the moment the backend doesn't have a way to tell the toolstack that it is capable of supporting it. Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
2013-07-29s390: update s390-ccw.imgAlexander Graf
This enables the following patches: s390/IPL: Allow boot from other ssid than 0 s390/ipl: Fix spurious errors in virtio Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-29s390/ipl: Fix boot orderChristian Borntraeger
The latest ipl code adaptions collided with some of the virtio refactoring rework. This resulted in always booting the first disk. Let's fix booting from a given ID. The new code also checks for command lines without bootindex to avoid random behaviour when accessing dev_st (==0). Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-29s390/IPL: Allow boot from other ssid than 0Dominik Dingel
We now take the subchannel set id also into account to find the boot device. If we want to use a subchannel set other than the default set 0, we first need to enable the mss facility. Signed-off-by: Dominik Dingel <dingel@linux.vnet.ibm.com> Signed-off-by: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Alexander Graf <agraf@suse.de>
2013-07-29w32, w64: Add build rule for installerStefan Weil
The new rules in Makefile allow building installers for QEMU on Windows using NSIS, a package which is also available for Linux distributions (so cross builds are possible). The rules for NSIS are in qemu.nsi which also uses two new images. Signed-off-by: Stefan Weil <sw@weilnetz.de>
2013-07-29Merge branch 'trivial-patches' of git://git.corpit.ru/qemuAurelien Jarno
* 'trivial-patches' of git://git.corpit.ru/qemu: target-mips: Remove assignment to a variable which is never used misc: Use g_assert_not_reached for code which is expected to be unreachable qemu-options: mention C-a h in the -nographic doc misc: Fix new typos in comments and strings linux-user: correct argument number for sys_mremap and sys_splice PPC: dbdma: macio: Fix format specifiers (build regression) watchdog: Remove break after exit exec: Remove env from list of poisoned names hw/9pfs: Fix potential memory leak and avoid reuse of freed memory timer: make timers_state static aes: Remove unused code (NDEBUG, u16)
2013-07-29target-mips: fix mipsdsp_mul_q31_q31Petar Jovanovic
Multiplication of two fractional word elements is not correct when sign extension/promotion is needed. This change fixes it by adding correct casts from unsigned to signed values. In addition, the tests (dpaq_sa_l_w.c and dpsq_sa_l_w.c) have been extended to trigger the current issue. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29mips_malta: fix copy of the 0x1fc00000 regionAurelien Jarno
Copy the whole 0x1fe000000 region into 0x1fc00000, independently of the loaded BIOS size. This fix the MIPS make check tests. Reported-by: Andreas Färber <afaerber@suse.de> Tested-by: Andreas Färber <afaerber@suse.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29linux-user: correct argument number for sys_mremap and sys_splicePetar Jovanovic
sys_mremap missed 5th argument (new_address), which caused examples that remap to a specific address to fail. sys_splice missed 5th and 6th argument which caused different examples to fail. This change has an effect on MIPS target only. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29target-mips: Remove assignment to a variable which is never usedStefan Weil
This assignment causes a compiler warning for compilations with the compiler option -Wunused-but-set-variable (which is included with -Wextra). Removing it allows using -Wextra for QEMU code without suppressing too many extra warnings. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29target-mips: fix mipsdsp_trunc16_sat16_roundPetar Jovanovic
This change corrects rounding and saturation of Q31 fractional value in mipsdsp_trunc16_sat16_round(). Overflow detection was incorrect for the corner case for PRECRQ_RS.PH, and this test case is also part of the change. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-29hw/mips: align initrd to 64KB to avoid kernel errorJames Hogan
The Linux kernel can be configured to use 64KB pages, but it also requires initrd to be page aligned. Therefore, to be safe, align the initrd to 64KB using a new INITRD_PAGE_MASK rather than TARGET_PAGE_MASK. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28pflash_cfi01: duplicate status byte from bits 23:16 for 32bit readsPaul Burton
The firmware commonly used with MIPS Malta boards (YAMON) reads the status of the pflash with a 32bit memory access. On real hardware this results in the status byte being mirrored in the upper 16 bits of the read value. For example if the status byte is represented by SS then the hardware reads 0x00SS00SS. The YAMON firmware compares the status against 32bit values expecting the mirrored value and fails without it. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28mips_malta: generate SMBUS EEPROM dataPaul Burton
The malta contains 2 EEPROMs, one containing SPD data for the SDRAM and another containing board information such as serial number and MAC address. These are both exposed via the PIIX4 SMBUS. Generating this data and providing it to smbus_eeprom_init will allow YAMON to read a serial number for the board and prevent it from warning that the EEPROM data is invalid. We already have the contents of the SPD EEPROM which are exposed via FPGA I2C accesses, this is provided as part of the SMBUS EEPROM data too for consistency. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28mips_malta: cap BIOS endian swap length at 0x3e0000 bytesPaul Burton
This preserves the final sector of the pflash which is used by YAMON to hold environment variables. If the endianness of the environment data is swapped then YAMON will fail to load environment variables from pflash. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28mips_malta: generate SPD EEPROM data at runtimePaul Burton
The SPD EEPROM specifies the amount of memory present in the system and thus its correct contents can only be known at runtime. Calculating parts of the data on init allows the data to accurately reflect the amount of target memory present and allow YAMON to boot with an arbitrary amount of SDRAM. Where possible the SPD data will favor indicating 2 banks of SDRAM rather than 1. For example the default 128MB of target memory will be represented as 2x64MB banks rather than 1x128MB bank. This allows versions of MIPS BIOS code (such as YAMON 2.22 and older) to boot despite a bug preventing them from handling a single bank of SDRAM with the Galileo GT64120 system controller emulated by QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28mips_malta: correct reading MIPS revision at 0x1fc00010Paul Burton
Rather than modifying the BIOS code at its original location, copy it for the 0x1fc00000 region & modify the copy. This means the original ROM code is correctly readable at 0x1e000010 whilst the MIPS revision is readable at 0x1fc00010. Additionally the code previously operated on target memory which would later be overwritten by the BIOS image upon CPU reset if the -bios argument was used to specify the BIOS image. This led to the written MIPS revision being lost. Copying using rom_copy when -bios is used fixes this issue. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28mips_malta: fix BIOS endianness swappingPaul Burton
If the target is little endian (mipsel) then the BIOS image endianness is swapped so that the big endian BIOS binaries commonly produced can be loaded correctly. When using the -bios argument the BIOS is loaded using load_image_targphys, however this doesn't perform the load to target memory immediately. Instead it loads the BIOS file into a struct Rom which will later be written to target memory upon reset. However the endianness conversion was being performed before this, on init, and operating on the target memory which at this point is blank & will later be overwritten by the (big endian) BIOS image. Correct this by operating on the data referenced by struct Rom rather than the target memory when the -bios argument is used. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28mips_malta: QOM cast cleanupAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28target-mips: fix branch in likely delay slot tcg assertJames Hogan
When a branch delay slot contains another branch instruction, the code generated raises an exception, however since is_branch==1, handle_delay_slot() doesn't get called immediately. This means ctx->bstate isn't set to BS_BRANCH, and the decoder continues decoding until a non-branch instruction is found. If the first branch was a branch likely instruction then each instruction after it generates code for the unlikely case, to go to the next tb starting after the delay slot. This results in multiple goto_tb tcg ops being generated with the same exit number. When debug is enabled this hits: tcg-op.h:2589: tcg_gen_goto_tb: Assertion `(tcg_ctx.goto_tb_issue_mask & (1 << idx)) == 0' failed. This is fixed by removing is_branch entirely, and calling handle_delay_slot() if (ctx.hflags & MIPS_HFLAG_BMASK) was set prior to the current instruction being decoded. This still prevents handle_delay_slot() being called immediately after a branch but allows it to still be called after a branch within a delay slot. Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-28target-mips: fix multiplication in mipsdsp_rndq15_mul_q15_q15Petar Jovanovic
Multiplication of Q15 fractional halfword vectors was incorrect in the previous implementation of mipsdsp_rndq15_mul_q15_q15. It failed to take element signs into account. This change fixes it, and it adds a test case for it. The change also removes unnecessary cast in the function mipsdsp_mul_q15_q15_overflowflag21(). Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-07-27target-mips: Remove assignment to a variable which is never usedStefan Weil
This assignment causes a compiler warning for compilations with the compiler option -Wunused-but-set-variable (which is included with -Wextra). Removing it allows using -Wextra for QEMU code without suppressing too many extra warnings. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27misc: Use g_assert_not_reached for code which is expected to be unreachableStefan Weil
The macro g_assert_not_reached is a better self documenting replacement for assert(0) or assert(false). Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27qemu-options: mention C-a h in the -nographic docRamkumar Ramachandra
Otherwise, a new user will be wondering how to switch between the console and monitor. Cc: Anthony Liguori <aliguori@us.ibm.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: Markus Armbruster <armbru@redhat.com> Cc: Marcelo Tosatti <mtosatti@redhat.com> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Ramkumar Ramachandra <artagnon@gmail.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27misc: Fix new typos in comments and stringsStefan Weil
All these typos were found by codespell. sould -> should emperical -> empirical intialization -> initialization successfuly -> successfully gaurantee -> guarantee Fix also another error (before before) in the same context. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27linux-user: correct argument number for sys_mremap and sys_splicePetar Jovanovic
sys_mremap missed 5th argument (new_address), which caused examples that remap to a specific address to fail. sys_splice missed 5th and 6th argument which caused different examples to fail. This change has an effect on MIPS target only. Signed-off-by: Petar Jovanovic <petar.jovanovic@imgtec.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27PPC: dbdma: macio: Fix format specifiers (build regression)Stefan Weil
Fix a number of warnings for 32 bit builds (tested on MingW and Linux): CC hw/ide/macio.o qemu/hw/ide/macio.c: In function 'pmac_ide_atapi_transfer_cb': qemu/hw/ide/macio.c:134:9: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'hwaddr' [-Werror=format] qemu/hw/ide/macio.c: In function 'pmac_ide_transfer_cb': qemu/hw/ide/macio.c:215:5: error: format '%ld' expects argument of type 'long int', but argument 5 has type 'int64_t' [-Werror=format] qemu/hw/ide/macio.c:222:9: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'hwaddr' [-Werror=format] qemu/hw/ide/macio.c:264:9: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'hwaddr' [-Werror=format] cc1: all warnings being treated as errors make: *** [hw/ide/macio.o] Error 1 Signed-off-by: Stefan Weil <sw@weilnetz.de> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27watchdog: Remove break after exitStefan Weil
This was dead code. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27exec: Remove env from list of poisoned namesStefan Weil
The global variable env was removed some time ago, so this name may be used without any restriction now. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27hw/9pfs: Fix potential memory leak and avoid reuse of freed memoryStefan Weil
The leak was reported by cppcheck. Function proxy_init also calls g_free for ctx->fs_root. Avoid reuse of this memory by setting ctx->fs_root to NULL. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: M. Mohan Kumar <mohan@in.ibm.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27timer: make timers_state staticLiu Ping Fan
Signed-off-by: Liu Ping Fan <pingfank@linux.vnet.ibm.com> Reviewed-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-27aes: Remove unused code (NDEBUG, u16)Stefan Weil
The current code includes assert.h very early (from qemu-common.h), so the definition of NDEBUG was without any effect. In the initial version from 2004, NDEBUG was used to disable the assertions. Those assertions are not in time critical code, so it is no longer reasonable to disable them and the definition of NDEBUG can be removed. Type u16 is also unused and therefore does not need a type definition. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
2013-07-26Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into stagingAnthony Liguori
QOM CPUState refactorings * Fix cpu_memory_rw_debug() breakage in s390x KVM * Replace final CPUArchState in sysemu/kvm.h * Introduce model subclasses for XtensaCPU * Introduce CPUClass::gdb_num[_core]_regs * Introduce CPUClass::gdb_core_xml_file * Introduce CPUClass::gdb_{read,write}_register() * Propagate CPUState further in gdbstub # gpg: Signature made Fri 26 Jul 2013 05:04:28 PM CDT using RSA key ID 3E7E013F # gpg: Can't check signature: public key not found # By Andreas Färber (23) and others # Via Andreas Färber * afaerber/tags/qom-cpu-for-anthony: (25 commits) cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XML target-cris: Factor out CPUClass::gdb_read_register() hook for v10 cpu: Introduce CPUClass::gdb_{read,write}_register() gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functions target-xtensa: Move cpu_gdb_{read,write}_register() target-lm32: Move cpu_gdb_{read,write}_register() target-s390x: Move cpu_gdb_{read,write}_register() target-alpha: Move cpu_gdb_{read,write}_register() target-cris: Move cpu_gdb_{read,write}_register() target-microblaze: Move cpu_gdb_{read,write}_register() target-sh4: Move cpu_gdb_{read,write}_register() target-openrisc: Move cpu_gdb_{read,write}_register() target-mips: Move cpu_gdb_{read,write}_register() target-m68k: Move cpu_gdb_{read,write}_register() target-arm: Move cpu_gdb_{read,write}_register() target-sparc: Move cpu_gdb_{read,write}_register() target-ppc: Move cpu_gdb_{read,write}_register() target-i386: Move cpu_gdb_{read,write}_register() cpu: Introduce CPUState::gdb_num_regs and CPUClass::gdb_num_core_regs gdbstub: Drop dead code in cpu_gdb_{read,write}_register() ...
2013-07-27cpu: Introduce CPUClass::gdb_core_xml_file for GDB_CORE_XMLAndreas Färber
Replace the GDB_CORE_XML define in gdbstub.c with a CPUClass field. Use first_cpu for qSupported and qXfer:features:read: for now. Add a stub for xml_builtin. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-cris: Factor out CPUClass::gdb_read_register() hook for v10Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27cpu: Introduce CPUClass::gdb_{read,write}_register()Andreas Färber
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27gdbstub: Replace GET_REG*() macros with gdb_get_reg*() functionsAndreas Färber
This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-xtensa: Move cpu_gdb_{read,write}_register()Andreas Färber
Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-lm32: Move cpu_gdb_{read,write}_register()Andreas Färber
Acked-by: Michael Walle <michael@walle.cc> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-s390x: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-alpha: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-cris: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-microblaze: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-sh4: Move cpu_gdb_{read,write}_register()Andreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-07-27target-openrisc: Move cpu_gdb_{read,write}_register()Andreas Färber
Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-26 02:24:22 +0000