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2016-07-12target-sparc: Introduce get_asiRichard Henderson
Replace gen_get_asi, and use it for both 32-bit and 64-bit. For v8, do supervisor and immediate checks here. Also, move save_state and TB ending into the respective subroutines, out of disas_sparc_insn. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-sparc: Store %asi in TB flagsRichard Henderson
Knowing the value of %asi at translation time means that we can handle the common settings without a function call. The steady state appears to be %asi == ASI_P, so that sparcv9 code can use offset forms of lda/sta. The %asi register gets pushed and popped on entry to certain functions, but it rarely takes on values other than ASI_P or ASI_AIUP. Therefore we're unlikely to be expanding the set of TBs created. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-sparc: Unify asi handling between 32 and 64-bitRichard Henderson
We now have a single copy of gen_ld_asi, gen_st_asi, gen_swap_asi, and everything uses gen_get_asi. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-sparc: Create gen_exceptionRichard Henderson
This unifies quite a few duplicate code fragments. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-sparc: Store mmu index in TB flagsRichard Henderson
Doing this instead of saving the raw PS_PRIV and TL. This means that all nucleus mode TBs (TL > 0) can be shared. This fixes a bug in that we didn't include HS_PRIV in the TB flags, and so could produce incorrect TB matches for hypervisor state. The LSU and DMMU states were unused by the translator. Including them in TB flags meant unnecessary mismatches from tb_find_fast. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-sparc: Remove softint as a TCG globalRichard Henderson
The global is only ever read for one insn; we can just as well use a load from env instead and generate the same code. This also allows us to indicate the the associated helpers do not touch TCG globals. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-sparc: Mark more flags for helpersRichard Henderson
Quite a few helpers do not modify tcg globals but did not so indicate. Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Richard Henderson <rth@twiddle.net>
2016-07-12Merge remote-tracking branch 'remotes/armbru/tags/pull-include-2016-07-12' ↵Peter Maydell
into staging Clean up #include "..." vs <...> and header guards # gpg: Signature made Tue 12 Jul 2016 15:23:43 BST # gpg: using RSA key 0x3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-include-2016-07-12: cris: Fix broken header guard in hw/cris/boot.h Clean up decorations and whitespace around header guards Clean up ill-advised or unusual header guards libdecnumber: Don't error out on decNumberLocal.h re-inclusion libdecnumber: Don't fool around with guards to avoid #include Clean up header guards that don't match their file name Drop Emacs local variables lists redundant with .dir-locals.el spapr_pci: Include spapr.h instead of playing games with #error tcg: Clean up tcg-target.h header guards linux-user: Fix broken header guard in syscall_defs.h linux-user: Clean up hostdep.h header guards linux-user: Clean up target_structs.h header guards linux-user: Clean up target_signal.h header guards linux-user: Clean up target_cpu.h header guards linux-user: Clean up target_syscall.h header guards target-*: Clean up cpu.h header guards scripts: New clean-header-guards.pl Use #include "..." for our own headers, <...> for others Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12cris: Fix broken header guard in hw/cris/boot.hMarkus Armbruster
Found with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up decorations and whitespace around header guardsMarkus Armbruster
Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up ill-advised or unusual header guardsMarkus Armbruster
Cleaned up with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12libdecnumber: Don't error out on decNumberLocal.h re-inclusionMarkus Armbruster
decNumberLocal.h errors out when it's included with its header guard defined. This catches multiple inclusions. Drop that. Including it multiple times is safe, and the compiler can do it efficiently. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12libdecnumber: Don't fool around with guards to avoid #includeMarkus Armbruster
Some libdecnumber headers avoid including decNumber.h or decContext.h again by checking their header guards. Don't. Including them multiple times is safe, and the compiler can do it efficiently. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Clean up header guards that don't match their file nameMarkus Armbruster
Header guard symbols should match their file name to make guard collisions less likely. Offenders found with scripts/clean-header-guards.pl -vn. Cleaned up with scripts/clean-header-guards.pl, followed by some renaming of new guard symbols picked by the script to better ones. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Drop Emacs local variables lists redundant with .dir-locals.elMarkus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12spapr_pci: Include spapr.h instead of playing games with #errorMarkus Armbruster
include/hw/pci-host/spapr.h needs hw/ppc/spapr.h. It checks whether its header guard is defined, and errors out if it isn't. Playing games with some other header's guard symbol is not a good idea. Just include the frackin' header already. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12tcg: Clean up tcg-target.h header guardsMarkus Armbruster
These use guard symbols like TCG_TARGET_$target. scripts/clean-header-guards.pl doesn't like them because they don't match their file name (they should, to make guard collisions less likely). Clean them up: use guard symbol $target_TCG_TARGET_H for tcg/$target/tcg-target.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12linux-user: Fix broken header guard in syscall_defs.hMarkus Armbruster
Found with scripts/clean-header-guards.pl. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12linux-user: Clean up hostdep.h header guardsMarkus Armbruster
These headers all use QEMU_HOSTDEP_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_HOSTDEP_H for linux-user/host/$target/hostdep.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12linux-user: Clean up target_structs.h header guardsMarkus Armbruster
These headers all use TARGET_STRUCTS_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_TARGET_STRUCTS_H for linux-user/$target/target_structs.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12linux-user: Clean up target_signal.h header guardsMarkus Armbruster
These headers all use TARGET_SIGNAL_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_TARGET_SIGNAL_H for linux-user/$target/target_signal.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12linux-user: Clean up target_cpu.h header guardsMarkus Armbruster
These headers all use TARGET_CPU_H as header guard symbol. Reuse of the same guard symbol in multiple headers is okay as long as they cannot be included together. Since we can avoid guard symbol reuse easily, do so: use guard symbol $target_TARGET_CPU_H for linux-user/$target/target_cpu.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12linux-user: Clean up target_syscall.h header guardsMarkus Armbruster
Some of them use guard symbol TARGET_SYSCALL_H, but we also have CRIS_SYSCALL_H, MICROBLAZE_SYSCALLS_H, TILEGX_SYSCALLS_H and __UC32_SYSCALL_H__. They all upset scripts/clean-header-guards.pl. Reuse of the same guard symbol TARGET_SYSCALL_H in multiple headers is okay as long as they cannot be included together. The script can't tell, so it warns. The script dislikes the other guard symbols, too. They don't match their file name (they should, to make guard collisions less likely), and __UC32_SYSCALL_H__ is a reserved identifier. Clean them all up: use guard symbol $target_TARGET_SYSCALL_H for linux-user/$target/target_sycall.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12target-*: Clean up cpu.h header guardsMarkus Armbruster
Most of them use guard symbols like CPU_$target_H, but we also have __MIPS_CPU_H__ and __TRICORE_CPU_H__. They all upset scripts/clean-header-guards.pl. The script dislikes CPU_$target_H because they don't match their file name (they should, to make guard collisions less likely). The others are reserved identifiers. Clean them all up: use guard symbol $target_CPU_H for target-$target/cpu.h. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12scripts: New clean-header-guards.plMarkus Armbruster
The conventional way to ensure a header can be included multiple times is to bracket it like this: #ifndef HEADER_NAME_H #define HEADER_NAME_H ... #endif where HEADER_NAME_H is a symbol unique to this header. The endif may be optionally decorated like this: #endif /* HEADER_NAME_H */ Unconventional ways present in our code: * Identifiers reserved for any use: #define _FILEOP_H * Lowercase (bad idea for object-like macros): #define __linux_video_vga_h__ * Roundabout ways to say the same thing (and hide from grep): #if !defined(__PPC_MAC_H__) #endif /* !defined(__PPC_MAC_H__) */ * Redundant values: #define HW_ALPHA_H 1 * Funny redundant values: # define PXA_H "pxa.h" * Decorations with bangs: #endif /* !QEMU_ARM_GIC_INTERNAL_H */ The negation actually makes sense, but almost all our header guard #endif decorations don't negate. * Useless decorations: #endif /* audio.h */ Header guards are not the place to show off creativity. This script normalizes them to the conventional way, and cleans up whitespace while there. It warns when it renames guard symbols, and explains how to find occurences of these symbols that may have to be updated manually. Another issue is use of the same guard symbol in multiple headers. That's okay only for headers that cannot be used together, such as the *-user/*/target_syscall.h. This script can't tell, so it warns when it sees a reuse. The script also warns when preprocessing a header with its guard symbol defined produces anything but whitespace. The next commits will put the script to use. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12Use #include "..." for our own headers, <...> for othersMarkus Armbruster
Tracked down with an ugly, brittle and probably buggy Perl script. Also move includes converted to <...> up so they get included before ours where that's obviously okay. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Tested-by: Eric Blake <eblake@redhat.com> Reviewed-by: Richard Henderson <rth@twiddle.net>
2016-07-12bswap.h: Document cpu_to_* and *_to_cpu conversion functionsPeter Maydell
Add a documentation comment describing the functions for converting between the cpu and little or bigendian formats. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1467908460-27048-6-git-send-email-peter.maydell@linaro.org
2016-07-12bswap.h: Fix comment typoPeter Maydell
Fix a typo in a comment. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Stefan Weil <sw@weilnetz.de> Message-id: 1467908460-27048-5-git-send-email-peter.maydell@linaro.org
2016-07-12bswap.h: Remove unused cpu_to_*w() and *_to_cpup()Peter Maydell
Now that all uses of cpu_to_*w() and *_to_cpup() have been replaced with either ld*_p()/st*_p() or by doing direct dereferences and using the cpu_to_*()/*_to_cpu() byteswap functions, we can remove the unused implementations. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1467908460-27048-4-git-send-email-peter.maydell@linaro.org
2016-07-12hw/bt: Don't use cpu_to_*w() and *_to_cpup()Peter Maydell
Don't use cpu_to_*w() and *_to_cpup() to do byte-swapped loads and stores; instead use ld*_p() and st*_p() which correctly handle misaligned accesses. Bring the HNDL() macro into line with how we deal with PARAMHANDLE(), by using cpu_to_le16() rather than an ifdef HOST_WORDS_BIGENDIAN. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1467908460-27048-3-git-send-email-peter.maydell@linaro.org
2016-07-12fsdev/9p-iov-marshal.c: Don't use cpu_to_*w() functionsPeter Maydell
Don't use the cpu_to_*w() functions, which we are trying to deprecate. Instead just use cpu_to_*() to do the byteswap, which brings the code in the marshal function in line with that in the unmarshal. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1467908460-27048-2-git-send-email-peter.maydell@linaro.org
2016-07-12Fix confusing argument names in some common functionsSergey Sorokin
There are functions tlb_fill(), cpu_unaligned_access() and do_unaligned_access() that are called with access type and mmu index arguments. But these arguments are named 'is_write' and 'is_user' in their declarations. The patches fix the arguments to avoid a confusion. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: David Gibson <david@gibson.dropbear.id.au> Message-id: 1465907177-1399402-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160712' into stagingPeter Maydell
MIPS patches 2016-07-12 Changes: * support 10-bit ASIDs * MIPS64R6-generic renamed to I6400 * initial GIC support * implement RESET_BASE register in CM GCR # gpg: Signature made Tue 12 Jul 2016 11:49:50 BST # gpg: using RSA key 0x52118E3C0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20160712: target-mips: enable 10-bit ASIDs in I6400 CPU target-mips: support CP0.Config4.AE bit target-mips: change ASID type to hold more than 8 bits target-mips: add ASID mask field and replace magic values target-mips: replace MIPS64R6-generic with the real I6400 CPU model hw/mips_cmgcr: implement RESET_BASE register in CM GCR hw/mips_cpc: make VP correctly start from the reset vector target-mips: add exception base to MIPS CPU hw/mips/cps: create GIC block inside CPS hw/mips: implement Global Interrupt Controller hw/mips: implement GIC Interval Timer Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-20160712-1' into ↵Peter Maydell
staging usb: misc fixes. # gpg: Signature made Tue 12 Jul 2016 09:47:21 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-usb-20160712-1: xen-usb: Fix 32bit build usb: add storage hotplug documentation nec-usb-xhci: set the device state to USB_STATE_DEFAULT Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-input-20160712-1' ↵Peter Maydell
into staging msmouse: fix misc issues, switch to new input interface. input: add trace events for full queues. input-linux: better capability checks and event handling. # gpg: Signature made Tue 12 Jul 2016 09:20:36 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-input-20160712-1: input-linux: better capability checks, merge input_linux_event_{mouse, keyboard} input-linux: factor out input_linux_handle_keyboard input-linux: factor out input_linux_handle_mouse input: add trace events for full queues msmouse: send short messages if possible. msmouse: switch to new input interface msmouse: fix buffer handling msmouse: add MouseState, unregister handler on close Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-vnc-20160712-1' into ↵Peter Maydell
staging vnc: misc bugfixes. # gpg: Signature made Tue 12 Jul 2016 08:22:40 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/pull-vnc-20160712-1: ui: avoid crash if vnc client disconnects with writes pending vnc-enc-tight: use thread local storage for palette vnc: fix incorrect checking condition when updating client Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-07-12xen-usb: Fix 32bit buildAnthony PERARD
Signed-off-by: Anthony PERARD <anthony.perard@citrix.com> Reviewed-by: Juergen Gross <jgross@suse.com> Message-id: 20160623110829.22671-1-anthony.perard@citrix.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2016-07-12usb: add storage hotplug documentationGerd Hoffmann
Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1466667901-1341-1-git-send-email-kraxel@redhat.com
2016-07-12nec-usb-xhci: set the device state to USB_STATE_DEFAULTZhang Shuaiyi
This patch is a rough fix to "hw/usb/core.c:401: usb_handle_packet: Assertion `dev->state == 3' failed.". Qemu will crash when a usb3 device redirect to Windows7 VM via nec-usb-xhci. In extensible-host-controler-interface-usb-xhci.pdf P94(4.6.5 Address Device): • If the Block Set Address Request (BSR) flag = ‘1’ • If the slot is in the Enabled state: ... • Set the Slot State in the Output Slot Context to Default. BSR = ‘1’: Enabled state to Default state; BSR = ‘0’: Default state to Addressed state. Try to call usb_device_reset to set device state to USB_STATE_DEFAULT in xhci_address_slot wether bsr is zero. Signed-off-by: Zhang Shuaiyi <zhang_syi@massclouds.com> Message-id: 1467258640-11921-1-git-send-email-zhang_syi@massclouds.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2016-07-12target-mips: enable 10-bit ASIDs in I6400 CPULeon Alrae
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12target-mips: support CP0.Config4.AE bitPaul Burton
The read-only Config4.AE bit set denotes extended 10 bits ASID. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12target-mips: change ASID type to hold more than 8 bitsPaul Burton
ASID currently has uint8_t type which is too small since some processors support more than 8 bits ASID. Therefore change its type to uint16_t. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12target-mips: add ASID mask field and replace magic valuesPaul Burton
Signed-off-by: Paul Burton <paul.burton@imgtec.com> Signed-off-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12target-mips: replace MIPS64R6-generic with the real I6400 CPU modelLeon Alrae
MIPS64R6-generic gradually gets closer to I6400 CPU, feature-wise. Rename it to make it clear which MIPS processor it is supposed to emulate. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips_cmgcr: implement RESET_BASE register in CM GCRLeon Alrae
Implement RESET_BASE register which is local to each VP and a write to it changes VP's reset exception base. Also, add OTHER register to allow a software running on one VP to access other VP's local registers. Guest can use this mechanism to specify custom address from which a VP will start execution. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips_cpc: make VP correctly start from the reset vectorLeon Alrae
When VP enters the Run state it starts execution from the reset vector. Currently used CPU_INTERRUPT_WAKE does not do that if reset exception base has been modified. Therefore fix that by simply resetting given VP. Drop the usage of CPU_INTERRUPT_WAKE also in VP_STOP and instead raise the CPU_INTERRUPT_HALT to halt a VP. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12target-mips: add exception base to MIPS CPULeon Alrae
Replace hardcoded 0xbfc00000 with exception_base which is initialized with this default address so there is no functional change here. However, it is now exposed and consequently it will be possible to modify it from outside of the CPU. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips/cps: create GIC block inside CPSLeon Alrae
Add GIC to CPS and expose its interrupt pins instead of CPU's. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips: implement Global Interrupt ControllerYongbok Kim
The Global Interrupt Controller (GIC) is responsible for mapping each internal and external interrupt to the correct location for servicing. The internal representation of registers is different from the specification in order to consolidate information for each GIC Interrupt Sources and Virtual Processors with same functionalities. For example SH_MAP00_VP00 registers are defined like each bit represents a VP but in this implementation the equivalent map_vp contains VP number in integer form for ease accesses. When it is being accessed via read write functions an internal data is converted back into the original format as the specification. Limitations: Level triggering only GIC CounterHi not implemented (Countbits = 32bits) DINT not implemented Local WatchDog, Fast Debug Channel, Perf Counter not implemented Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2016-07-12hw/mips: implement GIC Interval TimerYongbok Kim
The interval timer is similar to the CP0 Count/Compare timer within each processor. The difference is the GIC_SH_COUNTER register is global to the system so that all processors have the same time reference. To ease implementation, all VPs are having its own QEMU timer but sharing global settings and registers such as GIC_SH_CONFIG.COUTNSTOP and GIC_SH_COUNTER. MIPS GIC Interval Timer does support upto 64 bits of Count register but in this implementation it is limited to 32 bits only. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
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