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2022-11-06tests/qtest/e1000e-test: Use e1000_regs.hAkihiko Odaki
The register definitions in tests/qtest/e1000e-test.c had names different from hw/net/e1000_regs.h, which made it hard to understand what test codes corresponds to the implementation. Use hw/net/e1000_regs.h from tests/qtest/libqos/e1000e.c to remove these duplications. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20221103095416.110162-1-akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06tests/qtest/libqos/e1000e: Set E1000_CTRL_SLUAkihiko Odaki
The later device status check depends on E1000_STATUS_LU, which is enabled by E1000_CTRL_SLU. Though E1000_STATUS_LU is not implemented and E1000_STATUS_LU is always available in the current implementation, be a bit nicer and set E1000_CTRL_SLU just in case the bit is implemented in the future. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20221103025451.27446-1-akihiko.odaki@daynix.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06tests/qtest/libqos/e1000e: Refer common PCI ID definitionsAkihiko Odaki
This is yet another minor cleanup to ease understanding and future refactoring of the tests. Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com> Message-Id: <20221103015017.19947-1-akihiko.odaki@daynix.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2022-11-06accel: abort if we fail to load the accelerator pluginClaudio Fontana
if QEMU is configured with modules enabled, it is possible that the load of an accelerator module will fail. Exit in this case, relying on module_object_class_by_name to report the specific load error if any. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [claudio: changed abort() to exit(1)] Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220929093035.4231-6-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06dmg: warn when opening dmg images containing blocks of unknown typeKevin Wolf
Signed-off-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220929093035.4231-5-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06module: add Error arguments to module_load and module_load_qomClaudio Fontana
improve error handling during module load, by changing: bool module_load(const char *prefix, const char *lib_name); void module_load_qom(const char *type); to: int module_load(const char *prefix, const char *name, Error **errp); int module_load_qom(const char *type, Error **errp); where the return value is: -1 on module load error, and errp is set with the error 0 on module or one of its dependencies are not installed 1 on module load success 2 on module load success (module already loaded or built-in) module_load_qom_one has been introduced in: commit 28457744c345 ("module: qom module support"), which built on top of module_load_one, but discarded the bool return value. Restore it. Adapt all callers to emit errors, or ignore them, or fail hard, as appropriate in each context. Replace the previous emission of errors via fprintf in _some_ error conditions with Error and error_report, so as to emit to the appropriate target. A memory leak is also fixed as part of the module_load changes. audio: when attempting to load an audio module, report module load errors. Note that still for some callers, a single issue may generate multiple error reports, and this could be improved further. Regarding the audio code itself, audio_add() seems to ignore errors, and this should probably be improved. block: when attempting to load a block module, report module load errors. For the code paths that already use the Error API, take advantage of those to report module load errors into the Error parameter. For the other code paths, we currently emit the error, but this could be improved further by adding Error parameters to all possible code paths. console: when attempting to load a display module, report module load errors. qdev: when creating a new qdev Device object (DeviceState), report load errors. If a module cannot be loaded to create that device, now abort execution (if no CONFIG_MODULE) or exit (if CONFIG_MODULE). qom/object.c: when initializing a QOM object, or looking up class_by_name, report module load errors. qtest: when processing the "module_load" qtest command, report errors in the load of the module. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220929093035.4231-4-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06module: rename module_load_one to module_loadClaudio Fontana
Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220929093035.4231-3-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06module: removed unused function argument "mayfail"Claudio Fontana
mayfail is always passed as false for every invocation throughout the program. It controls whether to printf or not to printf an error on g_module_open failure. Remove this unused argument. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220929093035.4231-2-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06Add missing include statement for global xml_builtinStefan Weil
This fixes some compiler warnings with compiler flag -Wmissing-variable-declarations (tested with clang): aarch64_be-linux-user-gdbstub-xml.c:564:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations] aarch64-linux-user-gdbstub-xml.c:564:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations] aarch64-softmmu-gdbstub-xml.c:1763:19: warning: no previous extern declaration for non-static variable 'xml_builtin' [-Wmissing-variable-declarations] Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06meson: avoid unused arguments of main() in compiler testsPaolo Bonzini
meson.build has one test where "main" is declared unnecessarily with argc and argv arguments, but does not use them. Because the test needs -Werror too, HAVE_BROKEN_SIZE_MAX is defined incorrectly. Fix the test and, for consistency, remove argc and argv whenever they are not needed. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06Fix broken configure with -Wunused-parameterStefan Weil
The configure script fails because it tries to compile small C programs with a main function which is declared with arguments argc and argv although those arguments are unused. Running `configure -extra-cflags=-Wunused-parameter` triggers the problem. configure for a native build does abort but shows the error in config.log. A cross build configure for Windows with Debian stable aborts with an error. Avoiding unused arguments fixes this. Signed-off-by: Stefan Weil <sw@weilnetz.de> Message-Id: <20221102202258.456359-1-sw@weilnetz.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06gdb-xml: Fix size of EFER register on i386 architecture when debugged by GDBTaiseiIto
Before this commit, there were contradictory descriptions about size of EFER register. Line 113 says the size is 8 bytes. Line 129 says the size is 4 bytes. As a result, when GDB is debugging an OS running on QEMU, the GDB cannot read 'g' packets correctly. This 'g' packet transmits values of each registers of machine emulated by QEMU to GDB. QEMU, the packet sender, assign 4 bytes for EFER in 'g' packet based on the line 113. GDB, the packet receiver, extract 8 bytes for EFER in 'g' packet based on the line 129. Therefore, all registers located behind EFER in 'g' packet has been shifted 4 bytes in GDB. After this commit, GDB can read 'g' packets correctly. Signed-off-by: TaiseiIto <taisei1212@outlook.jp> Message-Id: <TY0PR0101MB4285F637209075C9F65FCDA6A4479@TY0PR0101MB4285.apcprd01.prod.exchangelabs.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06util/aio-win32: Correct the event array size in aio_poll()Bin Meng
WaitForMultipleObjects() can only wait for MAXIMUM_WAIT_OBJECTS object handles. Correct the event array size in aio_poll() and add a assert() to ensure it does not cause out of bound access. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20221019102015.2441622-3-bmeng.cn@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06util/main-loop: Avoid adding the same HANDLE twiceBin Meng
Fix the logic in qemu_add_wait_object() to avoid adding the same HANDLE twice, as the behavior is undefined when passing an array that contains same HANDLEs to WaitForMultipleObjects() API. Signed-off-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20221019102015.2441622-2-bmeng.cn@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-06util/main-loop: Fix maximum number of wait objects for win32Bin Meng
The maximum number of wait objects for win32 should be MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1. Signed-off-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20221019102015.2441622-1-bmeng.cn@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2022-11-05tests/unit: simpler variable sequence for test-io-channelAlex Bennée
This avoids some compilers complaining about a potentially un-initialised [src|dst]argv. In retrospect using GString was overkill for what we are constructing. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20221103102329.2581508-1-alex.bennee@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05target/tricore: Rename csfr.def -> csfr.h.incPhilippe Mathieu-Daudé
We use the .h.inc extension to include C headers. To be consistent with the rest of the codebase, rename the C headers using the .def extension. IDE/tools using our .editorconfig / .gitattributes will leverage this consistency. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221025235006.7215-4-philmd@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05target/s390x: Rename insn-data/format.def -> insn-data/format.h.incPhilippe Mathieu-Daudé
We use the .h.inc extension to include C headers. To be consistent with the rest of the codebase, rename the C headers using the .def extension. IDE/tools using our .editorconfig / .gitattributes will leverage this consistency. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221025235006.7215-3-philmd@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05target/m68k: Rename qregs.def -> qregs.h.incPhilippe Mathieu-Daudé
We use the .h.inc extension to include C headers. To be consistent with the rest of the codebase, rename the C headers using the .def extension. IDE/tools using our .editorconfig / .gitattributes will leverage this consistency. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20221025235006.7215-2-philmd@linaro.org> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05xen/pt: fix syntax error that causes FTBFS in some configurationsChuck Zmudzinski
When Qemu is built with --enable-xen and --disable-xen-pci-passthrough and the target os is linux, the build fails with: meson.build:3477:2: ERROR: File xen_pt_stub.c does not exist. Fixes: 582ea95f5f93 ("meson: convert hw/xen") Signed-off-by: Chuck Zmudzinski <brchuckz@aol.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <5f1342a13c09af77b1a7b0aeaba5955bcea89731.1667242033.git.brchuckz@aol.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05Fix some typos in documentation and commentsStefan Weil
Most of them were found and fixed using codespell. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-Id: <20221030105944.311940-1-sw@weilnetz.de> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05qapi: virtio: Fix the introduced versionHan Han
The items of qapi/virtio.json are introduced at a5ebce38576. They will be in the version 7.2 not 7.1. Signed-off-by: Han Han <hhan@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20221101014647.3000801-1-hhan@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-05Merge tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu ↵Stefan Hajnoczi
into staging VFIO fixes for v7.2-rc0 * Correct initial migration device state using correct v1 protocol enum (Avihai Horon) # -----BEGIN PGP SIGNATURE----- # # iQJPBAABCAA5FiEEQvbATlQL0amee4qQI5ubbjuwiyIFAmNkOh4bHGFsZXgud2ls # bGlhbXNvbkByZWRoYXQuY29tAAoJECObm247sIsiIG8P/2W+Fqz4DrkWUk2MO14G # djx6S/He7yZURlBLxfdQuGFcGzVQt1gFy7CD3JzMhDPzThIqyMHzMVVVVARODCHo # NQEss2c2oYAodap/I5NPXxFA9EHqgrHZ8kfJ8ioZbqU0L3eLmMApBZMXz3tK5f6u # XtKCpF9U2MfJCb+Rzxwa4bKidJJEtzAhX/v0gfWKYfp7hT1iRaNr9bS/IqBny+wV # Mdf5NVZibjlv8e1e1FAf5X9dMaT9NItBqBMl42X0Pfyy0dDpq9KVpyhewIeeqMGM # iuMeYadgRGWLuAhdkXSZrj06rLoHWxagIyPhCW57i9b7IXpaV4kkh2pHEx56MrV7 # bruM3znY7Xj3axS0HCM3DGP4OL2bc1MGjHcgNwjB6aMqxUN2rKan9wbvj+c1U0ms # OjnG9ZTIVnROncL0jaEkulFwi+0MEIWYJiVAh81Miv8iHmpj1Krmn15N0R0XI7bx # sEQaFrE3gyufgzAuwOht2oz6Qg84bWpwpJT0kQXXaANGfvq1nS1dHk5+4jmExQ+P # TSE+V3q1q29EEcy/U8nMb1HmRUUdrWdZnV2RWunDbqEvW6KOnLdSX2xq5HKSuS9Y # H1oqv15gjNBDpJDlelkjlVTQ7MPCcV9MQDBgFMkZRS9TIAHQ/3lRLhCNNCN76GMK # d1YNd9iZn+Fewb/Knm3+aTxS # =Nw9N # -----END PGP SIGNATURE----- # gpg: Signature made Thu 03 Nov 2022 18:01:02 EDT # gpg: using RSA key 42F6C04E540BD1A99E7B8A90239B9B6E3BB08B22 # gpg: issuer "alex.williamson@redhat.com" # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>" [full] # gpg: aka "Alex Williamson <alex@shazbot.org>" [full] # gpg: aka "Alex Williamson <alwillia@redhat.com>" [full] # gpg: aka "Alex Williamson <alex.l.williamson@gmail.com>" [full] # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B 8A90 239B 9B6E 3BB0 8B22 * tag 'vfio-fixes-v7.2-rc0.0' of https://gitlab.com/alex.williamson/qemu: vfio/migration: Fix wrong enum usage Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-04Merge tag 'pull-target-arm-20221104' of ↵Stefan Hajnoczi
https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue: * Fix regression booting Trusted Firmware * Honor HCR_E2H and HCR_TGE in ats_write64() * Copy the entire vector in DO_ZIP * Fix Privileged Access Never (PAN) for aarch32 * Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB * Set SCR_EL3.HXEn when direct booting kernel * Set SME and SVE EL3 vector lengths when direct booting kernel # -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmNk+KkZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vUsD/9SYZP3ne2OZxBe8he98jJ5 # 6apODiBksBLUM+1bKEoYW8Kw4XpS10I1Tbnxe7n0bNAfIiZlsZ7HJAJaYWy4MX4k # Bq0v1EIFo+Obumocc14ZzWcw9yPpHOGavKHXfPxTtIw0amtOmh3aMBPuOZKiMSaq # TdI/8654DbAOY3Hp/r6WnXwEgAc23kx/PtGhQFdU4iWhzTdeQeFkgCCsVMO02zFQ # ZM4wiAATpfNfgf5+Wxoin6RQ8nI9PF+Xf7HhN3d1CiXju3vOl+geYNkubJzIopv1 # itLcnvduYE6+5oJsnXZ4FDNO6/nnqWRNqtyDf0/NjLROfj84BPJpZqMX+FR6Q0I0 # d+4/oEw4A46qfaS5b4/YelbJOiUgiViWU1Xs3g2dkeTMT8CyGfDrJ2HRDKN7AaHo # llL7s1calkX2oSs+gU0BAw8xRETGwMBSOpF6JmPVh277LjvWfN1vsJzVUG3wrSXL # G7qa2h+fHV5Xu876sc/i0+d4qHuqcE/EU86VQ6X40f+dRzN02rkSCPAxzGFwLXOr # 8fl5MsX6z5pqcubnzxkhi66ZHc6fXsvtUjKBxyrVpMyjMlV9PTJ2Q1RCgVctErXk # lDzsLuplzPSjZBy3Peib/rLnmYUxJHyPe0RFYIumzZv/UHwL4GjZgkI842UVBpAL # FvIGblcCXHhdP4UFvqgZhw== # =Fcb4 # -----END PGP SIGNATURE----- # gpg: Signature made Fri 04 Nov 2022 07:34:01 EDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20221104' of https://git.linaro.org/people/pmaydell/qemu-arm: target/arm: Two fixes for secure ptw target/arm: Honor HCR_E2H and HCR_TGE in ats_write64() target/arm: Copy the entire vector in DO_ZIP target/arm: Fix Privileged Access Never (PAN) for aarch32 target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLB hw/arm/boot: Set SCR_EL3.HXEn when booting kernel hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernel Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-04Merge tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu into ↵Stefan Hajnoczi
staging pull-loongarch-20221104 v2: - fix win32 build error; - Add Rui Wang' patches. # -----BEGIN PGP SIGNATURE----- # # iLMEAAEIAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCY2TZsAAKCRBAov/yOSY+ # 30kyA/9VEYvFQaXM9RP78OoiK0bANiByTCQMXCAuos1wXui/FwAcqE9YWXZStzH0 # MHdT2PyH680w9aKjhHuPbGs5xU911cQ94SPWzcTtM4HfEH+3N7RBfF0gS7MA+DLa # 92vLqEIDC6SbAlY4/CRJVJmOl58d4uhEUUpq6eVzmJHcA3W5qw== # =wblG # -----END PGP SIGNATURE----- # gpg: Signature made Fri 04 Nov 2022 05:21:52 EDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF * tag 'pull-loongarch-20221104' of https://gitlab.com/gaosong/qemu: target/loongarch: Fix emulation of float-point disable exception target/loongarch: Adjust the layout of hardware flags bit fields target/loongarch: Fix raise_mmu_exception() set wrong exception_index target/loongarch: Add exception subcode hw/loongarch: Add TPM device for LoongArch virt machine hw/loongarch: Improve fdt for LoongArch virt machine hw/loongarch: Load FDT table into dram memory space hw/intc: Fix LoongArch extioi coreisr accessing hw/intc: Convert the memops to with_attrs in LoongArch extioi Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-04target/arm: Two fixes for secure ptwRichard Henderson
Reversed the sense of non-secure in get_phys_addr_lpae, and failed to initialize attrs.secure for ARMMMUIdx_Phys_S. Fixes: 48da29e4 ("target/arm: Add ptw_idx to S1Translate") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1293 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04target/arm: Honor HCR_E2H and HCR_TGE in ats_write64()Ake Koomsin
We need to check HCR_E2H and HCR_TGE to select the right MMU index for the correct translation regime. To check for EL2&0 translation regime: - For S1E0*, S1E1* and S12E* ops, check both HCR_E2H and HCR_TGE - For S1E2* ops, check only HCR_E2H Signed-off-by: Ake Koomsin <ake@igel.co.jp> Message-id: 20221101064250.12444-1-ake@igel.co.jp Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04target/arm: Copy the entire vector in DO_ZIPRichard Henderson
With odd_ofs set, we weren't copying enough data. Fixes: 09eb6d7025d1 ("target/arm: Move sve zip high_ofs into simd_data") Reported-by: Idan Horowitz <idan.horowitz@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20221031054144.3574-1-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04target/arm: Fix Privileged Access Never (PAN) for aarch32Timofey Kutergin
When we implemented the PAN support we theoretically wanted to support it for both AArch32 and AArch64, but in practice several bugs made it essentially unusable with an AArch32 guest. Fix all those problems: - Use CPSR.PAN to check for PAN state in aarch32 mode - throw permission fault during address translation when PAN is enabled and kernel tries to access user acessible page - ignore SCTLR_XP bit for armv7 and armv8 (conflicts with SCTLR_SPAN). Signed-off-by: Timofey Kutergin <tkutergin@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20221027112619.2205229-1-tkutergin@gmail.com [PMM: tweak commit message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2022-11-04target/arm: Make TLBIOS and TLBIRANGE ops trap on HCR_EL2.TTLBPeter Maydell
The HCR_EL2.TTLB bit is supposed to trap all EL1 execution of TLB maintenance instructions. However we have added new TLB insns for FEAT_TLBIOS and FEAT_TLBIRANGE, and forgot to set their accessfn to access_ttlb. Add the missing accessfns. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
2022-11-04hw/arm/boot: Set SCR_EL3.HXEn when booting kernelPeter Maydell
When we direct boot a kernel on a CPU which emulates EL3, we need to set up the EL3 system registers as the Linux kernel documentation specifies: https://www.kernel.org/doc/Documentation/arm64/booting.rst For CPUs with FEAT_HCX support this includes: - SCR_EL3.HXEn (bit 38) must be initialised to 0b1. but we forgot to do this when implementing FEAT_HCX, which would mean that a guest trying to access the HCRX_EL2 register would crash. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221027140207.413084-3-peter.maydell@linaro.org
2022-11-04hw/arm/boot: Set SME and SVE EL3 vector lengths when booting kernelPeter Maydell
When we direct boot a kernel on a CPU which emulates EL3, we need to set up the EL3 system registers as the Linux kernel documentation specifies: https://www.kernel.org/doc/Documentation/arm64/booting.rst For SVE and SME this includes: - ZCR_EL3.LEN must be initialised to the same value for all CPUs the kernel is executed on. - SMCR_EL3.LEN must be initialised to the same value for all CPUs the kernel will execute on. Although we are technically compliant with this, the "same value" we currently use by default is the reset value of 0. This will end up forcing the guest kernel's SVE and SME vector length to be only the smallest supported length. Initialize the vector length fields to their maximum possible value, which is 0xf. If the implementation doesn't actually support that vector length then the effective vector length will be constrained down to the maximum supported value at point of use. This allows the guest to use all the vector lengths the emulated CPU supports (by programming the _EL2 and _EL1 versions of these registers.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20221027140207.413084-2-peter.maydell@linaro.org
2022-11-04target/loongarch: Fix emulation of float-point disable exceptionRui Wang
We need to emulate it to generate a floating point disable exception when CSR.EUEN.FPE is zero. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221104040517.222059-3-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04target/loongarch: Adjust the layout of hardware flags bit fieldsRui Wang
Suggested-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Signed-off-by: Rui Wang <wangrui@loongson.cn> Message-Id: <20221104040517.222059-2-wangrui@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04target/loongarch: Fix raise_mmu_exception() set wrong exception_indexSong Gao
When the address is invalid address, We should set exception_index according to MMUAccessType, and EXCCODE_ADEF need't update badinstr. Otherwise, The system enters an infinite loop. e.g: run test.c on system mode test.c: #include<stdio.h> void (*func)(int *); int main() { int i = 8; void *ptr = (void *)0x4000000000000000; func = ptr; func(&i); return 0; } Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20221101073210.3934280-2-gaosong@loongson.cn>
2022-11-04target/loongarch: Add exception subcodeSong Gao
We need subcodes to distinguish the same excode cs->exception_indexs, such as EXCCODE_ADEF/EXCCODE_ADEM. Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20221101073210.3934280-1-gaosong@loongson.cn>
2022-11-04hw/loongarch: Add TPM device for LoongArch virt machineXiaojuan Yang
Add TPM device for LoongArch virt machine, including establish TPM acpi info and add TYPE_TPM_TIS_SYSBUS to dynamic_sysbus_devices list. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-4-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04hw/loongarch: Improve fdt for LoongArch virt machineXiaojuan Yang
Add new items into LoongArch FDT, including rtc and uart info. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04hw/loongarch: Load FDT table into dram memory spaceXiaojuan Yang
Load FDT table into dram memory space, and the addr is 2 MiB. Since lowmem region starts from 0, FDT base address is located at 2 MiB to avoid NULL pointer access. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Message-Id: <20221028014007.2718352-2-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04hw/intc: Fix LoongArch extioi coreisr accessingXiaojuan Yang
1. When cpu read or write extioi COREISR reg, it should access the reg belonged to itself, so the cpu index of 's->coreisr' is current cpu number. Using MemTxAttrs' requester_id to get the cpu index. 2. it need not to mask 0x1f when calculate the coreisr array index. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221021015307.2570844-3-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-04hw/intc: Convert the memops to with_attrs in LoongArch extioiXiaojuan Yang
Converting the MemoryRegionOps read/write handlers to with_attrs in LoongArch extioi emulation. Signed-off-by: Xiaojuan Yang <yangxiaojuan@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221021015307.2570844-2-yangxiaojuan@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
2022-11-03vfio/migration: Fix wrong enum usageAvihai Horon
vfio_migration_init() initializes VFIOMigration->device_state using enum of VFIO migration protocol v2. Current implemented protocol is v1 so v1 enum should be used. Fix it. Fixes: 429c72800654 ("vfio/migration: Fix incorrect initialization value for parameters in VFIOMigration") Signed-off-by: Avihai Horon <avihaih@nvidia.com> Reviewed-by: Zhang Chen <chen.zhang@intel.com> Link: https://lore.kernel.org/r/20221016085752.32740-1-avihaih@nvidia.com Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2022-11-03Merge tag 'linux-user-for-7.2-pull-request' of ↵Stefan Hajnoczi
https://gitlab.com/laurent_vivier/qemu into staging linux-user pull request 20221103 Fix recvmsg Fix hppa exception handler Add close_range Add strace for timer_settime64 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmNjgI0SHGxhdXJlbnRA # dml2aWVyLmV1AAoJEPMMOL0/L7485noP/jx8c5ytN+K5JbTLIdGYAbTJLm82Pnl5 # PP6mzaiII+gqBsmsTmmZhJ92xWjyX9kZmwCY7jD5XYXHQ2jFg3fU96ktYum7q8BU # XaPP4Cd6TfDE4q8H34PD/4byTGEkHP6o7EhAkIVAKsRQcQgZnsc3tvZetXxncltZ # UypPqAjvTy3s3uJFRmI4z9sYiAvjEflgk8doci/i5dOSgEBUmcCw/tFUx2GFrHiR # TdX8BRGaGEt+TPyKAo6sVBgTs1KiU4RzOqrPoxZO8aEClwPCRTLqNw/IONtHmx9f # EevuwDS7ZdoMdXi7YANDVy17JkmPBU3g8DFSWYGYObRpdmexmD66aW4kCeUYL0BC # y5aqxRWEi/7Kjvb6QlO3sJnAMfXaOQcCNn1++Tk1V8/O7f3k/xakya700fiMRIaQ # vyrW+g0TrCWEOgWl1Nyd0yDayX0wCM8CV/5SoO21QHjjzG+zmPxvroDpfVHcwbAl # V+wzVBj6AE5QBZKXUSE4b5DalcASF3pbUTorB5Xv/HDdsM1cRGZLBo7KECXqLKaa # L5VLgDdrZdSJz60f4P7Ldyhv0grb3C38JNqYg8fi8gWdj6dEc5M4coX84lA3JE7v # +Vf3Ys+lGC+DCSp2Qsh5FJvgsRn740ROToLJcXu3jxYPlquEsZpS1hpC+WOTRXOU # l2tnZIV9/SyH # =UZJY # -----END PGP SIGNATURE----- # gpg: Signature made Thu 03 Nov 2022 04:49:17 EDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * tag 'linux-user-for-7.2-pull-request' of https://gitlab.com/laurent_vivier/qemu: linux-user: always translate cmsg when recvmsg linux-user: Add strace output for timer_settime64() syscall linux-user: Add close_range() syscall linux-user/hppa: Detect glibc ABORT_INSTRUCTION and EXCP_BREAK handler Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-03Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingStefan Hajnoczi
* bug fixes * reduced memory footprint for IPI virtualization on Intel processors * asynchronous teardown support (Linux only) # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmNiVykUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroN0Swf/YxjphCtFgYYSO14WP+7jAnfRZLhm # 0xWChWP8rco5I352OBFeFU64Av5XoLGNn6SZLl8lcg86lQ/G0D27jxu6wOcDDHgw # 0yTDO1gevj51UKsbxoC66OWSZwKTEo398/BHPDcI2W41yOFycSdtrPgspOrFRVvf # 7M3nNjuNPsQorZeuu8NGr3jakqbt99ZDXcyDEWbrEAcmy2JBRMbGgT0Kdnc6aZfW # CvL+1ljxzldNwGeNBbQW2QgODbfHx5cFZcy4Daze35l5Ra7K/FrgAzr6o/HXptya # 9fEs5LJQ1JWI6JtpaWwFy7fcIIOsJ0YW/hWWQZSDt9JdAJFE5/+vF+Kz5Q== # =CgrO # -----END PGP SIGNATURE----- # gpg: Signature made Wed 02 Nov 2022 07:40:25 EDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: target/i386: Fix test for paging enabled util/log: Close per-thread log file on thread termination target/i386: Set maximum APIC ID to KVM prior to vCPU creation os-posix: asynchronous teardown for shutdown on Linux target/i386: Fix calculation of LOCK NEG eflags Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-03Merge tag 'nvme-fixes-pull-request' of git://git.infradead.org/qemu-nvme ↵Stefan Hajnoczi
into staging hw/nvme fixes Two small fixes. # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCgAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmNiKUkACgkQTeGvMW1P # DenBuAf/fwznY98HVg8zYQ/chLGMCmjAa80buf867usnL5Iuhms1XCkxpETFfMAZ # HR5gg+52vHZg/FCGbQ3E8d/ZLwDZHboiEuZDPo9aYI4uTj3gs66j9S0y6DUVkn5I # 7Ad+BYW7/d4++8fZAdaUV67rmo89OvjgSqOs+O094nGAPIEgJnsL7HrOFniKnNqu # MMWvFlK1bAz/iPKPf2WWVeuAs1cMs+TPsjE+ZHhUEYaZAiB1myKVPIAVyOHx5yoT # 6VTsNMLvNEi5+4Ucg1TkIwb/dAXrYYEvreo8ri1yuHCVOqw4lU9FfPhmiz5h76Sc # sI0cMiNL/RW5pk6rnDLkPZyjTKw30A== # =s2fM # -----END PGP SIGNATURE----- # gpg: Signature made Wed 02 Nov 2022 04:24:41 EDT # gpg: using RSA key 522833AA75E2DCE6A24766C04DE1AF316D4F0DE9 # gpg: Good signature from "Klaus Jensen <its@irrelevant.dk>" [unknown] # gpg: aka "Klaus Jensen <k.jensen@samsung.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: DDCA 4D9C 9EF9 31CC 3468 4272 63D5 6FC5 E55D A838 # Subkey fingerprint: 5228 33AA 75E2 DCE6 A247 66C0 4DE1 AF31 6D4F 0DE9 * tag 'nvme-fixes-pull-request' of git://git.infradead.org/qemu-nvme: hw/nvme: Abort copy command when format is one while pif hw/nvme: reenable cqe batching Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2022-11-02linux-user: always translate cmsg when recvmsgIcenowy Zheng
It's possible that a message contains both normal payload and ancillary data in the same message, and even if no ancillary data is available this information should be passed to the target, otherwise the target cmsghdr will be left uninitialized and the target is going to access uninitialized memory if it expects cmsg. Always call the function that translate cmsg when recvmsg, because that function should be empty-cmsg-safe (it creates an empty cmsg in the target). Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20221028081220.1604244-1-uwu@icenowy.me> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-02linux-user: Add strace output for timer_settime64() syscallHelge Deller
Add missing timer_settime64() strace output and specify format for timer_settime(). Signed-off-by: Helge Deller <deller@gmx.de> Message-Id: <Y1b5eIXFoMRDcDL9@p100> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-02linux-user: Add close_range() syscallHelge Deller
Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <Y1dLJoEDhJ2AAYDn@p100> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-02linux-user/hppa: Detect glibc ABORT_INSTRUCTION and EXCP_BREAK handlerHelge Deller
The glibc on the hppa platform uses the "iitlbp %r0,(%sr0, %r0)" assembler instruction as ABORT_INSTRUCTION. If this (in userspace context) illegal assembler statement is found, dump the registers and report the failure to userspace the same way as the Linux kernel on physical hardware. For other illegal instructions report TARGET_ILL_ILLOPC instead of TARGET_ILL_ILLOPN as si_code. Additionally add the missing EXCP_BREAK exception handler which occurs when the "break x,y" assembler instruction is executed and report EXCP_ASSIST traps. Signed-off-by: Helge Deller <deller@gmx.de> Message-Id: <Y1osHVsylkuZNUnY@p100> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2022-11-02target/i386: Fix test for paging enabledRichard Henderson
If CR0.PG is unset, pg_mode will be zero, but it will also be zero for non-PAE/non-PSE page tables with CR0.WP=0. Restore the correct test for paging enabled. Fixes: 98281984a37 ("target/i386: Add MMU_PHYS_IDX and MMU_NESTED_IDX") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1269 Reported-by: Andreas Gustafsson <gson@gson.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20221102091232.1092552-1-richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-15 06:27:39 +0000