slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2020-06-19	hw/riscv: sifive_u: Add reset functionality	Bin Meng
2020-06-19	hw/riscv: sifive_gpio: Do not blindly trigger output IRQs	Bin Meng
2020-06-19	hw/riscv: sifive_u: Hook a GPIO controller	Bin Meng
2020-06-19	hw/riscv: sifive_gpio: Add a new 'ngpio' property	Bin Meng
2020-06-19	hw/riscv: sifive_gpio: Clean up the codes	Bin Meng
2020-06-19	hw/riscv: sifive_u: Generate device tree node for OTP	Bin Meng
2020-06-19	hw/riscv: sifive_u: Simplify the GEM IRQ connect code a little bit	Bin Meng
2020-06-19	hw/riscv: opentitan: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng
2020-06-19	hw/riscv: sifive_e: Remove the riscv_ prefix of the machine* and soc* functions	Bin Meng
2020-06-19	target/riscv: Use a smaller guess size for no-MMU PMP	Alistair Francis
2020-06-19	riscv/opentitan: Connect the UART device	Alistair Francis
2020-06-19	riscv/opentitan: Connect the PLIC device	Alistair Francis
2020-06-19	hw/intc: Initial commit of lowRISC Ibex PLIC	Alistair Francis
2020-06-19	hw/char: Initial commit of Ibex UART	Alistair Francis
2020-06-19	riscv/opentitan: Fix the ROM size	Alistair Francis
2020-06-19	target/riscv: Implement checks for hfence	Alistair Francis
2020-06-19	target/riscv: Move the hfence instructions to the rvh decode	Alistair Francis
2020-06-19	target/riscv: Report errors validating 2nd-stage PTEs	Alistair Francis
2020-06-19	target/riscv: Set access as data_load when validating stage-2 PTEs	Alistair Francis
2020-06-19	riscv: Keep the CPU init routine names consistent	Bin Meng
2020-06-19	riscv: Generalize CPU init routine for the imacu CPU	Bin Meng
2020-06-19	riscv: Generalize CPU init routine for the gcsu CPU	Bin Meng
2020-06-19	riscv: Generalize CPU init routine for the base CPU	Bin Meng
2020-06-19	sifive_e: Support the revB machine	Alistair Francis
2020-06-19	riscv: Add helper to make NaN-boxing for FP register	Ian Jiang
2020-06-19	Merge remote-tracking branch 'remotes/cohuck/tags/s390x-20200618' into staging	Peter Maydell
2020-06-18	Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into st...	Peter Maydell
2020-06-18	Merge remote-tracking branch 'remotes/dgilbert/tags/pull-migration-20200617a'...	Peter Maydell
2020-06-18	net: Drop the NetLegacy structure, always use Netdev instead	Thomas Huth
2020-06-18	net: Drop the legacy "name" parameter from the -net option	Thomas Huth
2020-06-18	hw/net/e1000e: Do not abort() on invalid PSRCTL register value	Philippe Mathieu-Daudé
2020-06-18	colo-compare: Fix memory leak in packet_enqueue()	Derek Su
2020-06-18	net/colo-compare.c: Correct ordering in complete and finalize	Lukas Straub
2020-06-18	net/colo-compare.c: Check that colo-compare is active	Lukas Straub
2020-06-18	net/colo-compare.c: Only hexdump packets if tracing is enabled	Lukas Straub
2020-06-18	net/colo-compare.c: Fix deadlock in compare_chr_send	Lukas Straub
2020-06-18	chardev/char.c: Use qemu_co_sleep_ns if in coroutine	Lukas Straub
2020-06-18	net/colo-compare.c: Create event_bh with the right AioContext	Lukas Straub
2020-06-18	net: use peer when purging queue in qemu_flush_or_purge_queue_packets()	Jason Wang
2020-06-18	net: cadence_gem: Fix RX address filtering	Tong Ho
2020-06-18	net: cadence_gem: TX_LAST bit should be set by guest	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Update the reset value for interrupt mask register	Sai Pavan Boddu
2020-06-18	net: cadnece_gem: Update irq_read_clear field of designcfg_debug1 reg	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Add support for jumbo frames	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Fix up code style	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Move tx/rx packet buffert to CadenceGEMState	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Set ISR according to queue in use	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Define access permission for interrupt registers	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Fix irq update w.r.t queue	Sai Pavan Boddu
2020-06-18	net: cadence_gem: Fix the queue address update during wrap around	Sai Pavan Boddu