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2020-07-13chardev: don't abort on attempt to add duplicated chardevMarc-André Lureau
This is a regression from commit d2623129a7d ("qom: Drop parameter @errp of object_property_add() & friends"). (qemu) chardev-add id=null,backend=null (qemu) chardev-add id=null,backend=null Unexpected error in object_property_try_add() at /home/elmarco/src/qemu/qom/object.c:1166: attempt to add duplicate property 'null' to object (type 'container') That case is currently not covered in the test suite, but will be with the queued patch "char: fix use-after-free with dup chardev & reconnect". Fixes: d2623129a7dec1d3041ad1221dda1ca49c667532 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com>
2020-07-13char-socket: initialize reconnect timer only when the timer doesn't startLi Feng
When the disconnect event is triggered in the connecting stage, the tcp_chr_disconnect_locked may be called twice. The first call: #0 qemu_chr_socket_restart_timer (chr=0x55555582ee90) at chardev/char-socket.c:120 #1 0x000055555558e38c in tcp_chr_disconnect_locked (chr=<optimized out>) at chardev/char-socket.c:490 #2 0x000055555558e3cd in tcp_chr_disconnect (chr=0x55555582ee90) at chardev/char-socket.c:497 #3 0x000055555558ea32 in tcp_chr_new_client (chr=chr@entry=0x55555582ee90, sioc=sioc@entry=0x55555582f0b0) at chardev/char-socket.c:892 #4 0x000055555558eeb8 in qemu_chr_socket_connected (task=0x55555582f300, opaque=<optimized out>) at chardev/char-socket.c:1090 #5 0x0000555555574352 in qio_task_complete (task=task@entry=0x55555582f300) at io/task.c:196 #6 0x00005555555745f4 in qio_task_thread_result (opaque=0x55555582f300) at io/task.c:111 #7 qio_task_wait_thread (task=0x55555582f300) at io/task.c:190 #8 0x000055555558f17e in tcp_chr_wait_connected (chr=0x55555582ee90, errp=0x555555802a08 <error_abort>) at chardev/char-socket.c:1013 #9 0x0000555555567cbd in char_socket_client_reconnect_test (opaque=0x5555557fe020 <client8unix>) at tests/test-char.c:1152 The second call: #0 0x00007ffff5ac3277 in raise () from /lib64/libc.so.6 #1 0x00007ffff5ac4968 in abort () from /lib64/libc.so.6 #2 0x00007ffff5abc096 in __assert_fail_base () from /lib64/libc.so.6 #3 0x00007ffff5abc142 in __assert_fail () from /lib64/libc.so.6 #4 0x000055555558d10a in qemu_chr_socket_restart_timer (chr=0x55555582ee90) at chardev/char-socket.c:125 #5 0x000055555558df0c in tcp_chr_disconnect_locked (chr=<optimized out>) at chardev/char-socket.c:490 #6 0x000055555558df4d in tcp_chr_disconnect (chr=0x55555582ee90) at chardev/char-socket.c:497 #7 0x000055555558e5b2 in tcp_chr_new_client (chr=chr@entry=0x55555582ee90, sioc=sioc@entry=0x55555582f0b0) at chardev/char-socket.c:892 #8 0x000055555558e93a in tcp_chr_connect_client_sync (chr=chr@entry=0x55555582ee90, errp=errp@entry=0x7fffffffd178) at chardev/char-socket.c:944 #9 0x000055555558ec78 in tcp_chr_wait_connected (chr=0x55555582ee90, errp=0x555555802a08 <error_abort>) at chardev/char-socket.c:1035 #10 0x000055555556804b in char_socket_client_test (opaque=0x5555557fe020 <client8unix>) at tests/test-char.c:1023 Run test/test-char to reproduce this issue. test-char: chardev/char-socket.c:125: qemu_chr_socket_restart_timer: Assertion `!s->reconnect_timer' failed. Signed-off-by: Li Feng <fengli@smartx.com> Acked-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20200522025554.41063-1-fengli@smartx.com>
2020-07-11Merge remote-tracking branch 'remotes/philmd-gitlab/tags/avr-port-20200711' ↵Peter Maydell
into staging 8bit AVR port from Michael Rolnik. Michael started to work on the AVR port few years ago [*] and kept improving the code over various series. List of people who help him (in chronological order): - Richard Henderson - Sarah Harris and Edward Robbins - Philippe Mathieu-Daudé and Aleksandar Markovic - Pavel Dovgalyuk - Thomas Huth [*] The oldest contribution I could find on the list is from 2016: https://lists.nongnu.org/archive/html/qemu-devel/2016-06/msg02985.html Tests included: $ avocado --show=app run -t arch:avr tests/acceptance/ Fetching asset from tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos (1/1) tests/acceptance/machine_avr6.py:AVR6Machine.test_freertos: PASS (2.13 s) RESULTS : PASS 1 | ERROR 0 | FAIL 0 | SKIP 0 | WARN 0 | INTERRUPT 0 | CANCEL 0 JOB TIME : 2.35 s $ make check-qtest-avr TEST check-qtest-avr: tests/qtest/boot-serial-test TEST check-qtest-avr: tests/qtest/cdrom-test TEST check-qtest-avr: tests/qtest/device-introspect-test TEST check-qtest-avr: tests/qtest/machine-none-test TEST check-qtest-avr: tests/qtest/qmp-test TEST check-qtest-avr: tests/qtest/qmp-cmd-test TEST check-qtest-avr: tests/qtest/qom-test TEST check-qtest-avr: tests/qtest/test-hmp TEST check-qtest-avr: tests/qtest/qos-test CI results: . https://cirrus-ci.com/build/5697049146425344 . https://gitlab.com/philmd/qemu/-/pipelines/165328058 . https://travis-ci.org/github/philmd/qemu/builds/705817933 . https://app.shippable.com/github/philmd/qemu/runs/822/summary/console # gpg: Signature made Sat 11 Jul 2020 10:03:11 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/avr-port-20200711: (32 commits) target/avr/disas: Fix store instructions display order target/avr/cpu: Fix $PC displayed address target/avr/cpu: Drop tlb_flush() in avr_cpu_reset() target/avr: Add section into QEMU documentation tests/acceptance: Test the Arduino MEGA2560 board tests/boot-serial: Test some Arduino boards (AVR based) hw/avr: Add limited support for some Arduino boards hw/avr: Add some ATmega microcontrollers hw/avr: Add support for loading ELF/raw binaries hw/misc: avr: Add limited support for power reduction device hw/timer: avr: Add limited support for 16-bit timer peripheral hw/char: avr: Add limited support for USART peripheral tests/machine-none: Add AVR support target/avr: Register AVR support with the rest of QEMU target/avr: Add support for disassembling via option '-d in_asm' target/avr: Initialize TCG register variables target/avr: Add instruction translation - CPU main translation function target/avr: Add instruction translation - MCU Control Instructions target/avr: Add instruction translation - Bit and Bit-test Instructions target/avr: Add instruction translation - Data Transfer Instructions ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-11Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* Make checkpatch say 'qemu' instead of 'kernel' (Aleksandar) * Fix PSE guests with emulated NPT (Alexander B. #1) * Fix leak (Alexander B. #2) * HVF fixes (Roman, Cameron) * New Sapphire Rapids CPUID bits (Cathy) * cpus.c and softmmu/ cleanups (Claudio) * TAP driver tweaks (Daniel, Havard) * object-add bugfix and testcases (Eric A.) * Fix Coverity MIN_CONST and MAX_CONST (Eric B.) * "info lapic" improvement (Jan) * SSE fixes (Joseph) * "-msg guest-name" option (Mario) * support for AMD nested live migration (myself) * Small i386 TCG fixes (myself) * improved error reporting for Xen (myself) * fix "-cpu host -overcommit cpu-pm=on" (myself) * Add accel/Kconfig (Philippe) * iscsi sense handling fixes (Yongji) * Misc bugfixes # gpg: Signature made Sat 11 Jul 2020 00:33:41 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (47 commits) linux-headers: update again to 5.8 apic: Report current_count via 'info lapic' scripts: improve message when TAP based tests fail target/i386: Enable TSX Suspend Load Address Tracking feature target/i386: Add SERIALIZE cpu feature softmmu/vl: Remove the check for colons in -accel parameters cpu-throttle: new module, extracted from cpus.c softmmu: move softmmu only files from root pc: fix leak in pc_system_flash_cleanup_unused cpus: Move CPU code from exec.c to cpus-common.c target/i386: Correct the warning message of Intel PT checkpatch: Change occurences of 'kernel' to 'qemu' in user messages iscsi: return -EIO when sense fields are meaningless iscsi: handle check condition status in retry loop target/i386: sev: fail query-sev-capabilities if QEMU cannot use SEV target/i386: sev: provide proper error reporting for query-sev-capabilities KVM: x86: believe what KVM says about WAITPKG target/i386: implement undocumented "smsw r32" behavior target/i386: remove gen_io_end Makefile: simplify MINIKCONF rules ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-11Merge remote-tracking branch 'remotes/gkurz/tags/9p-fix-2020-07-10' into stagingPeter Maydell
Add missing NULL terminating element in fsdev option lists. Never crashed QEMU by pure luck. # gpg: Signature made Fri 10 Jul 2020 17:26:01 BST # gpg: using RSA key B4828BAF943140CEF2A3491071D4D5E5822F73D6 # gpg: Good signature from "Greg Kurz <groug@kaod.org>" [full] # gpg: aka "Gregory Kurz <gregory.kurz@free.fr>" [full] # gpg: aka "[jpeg image of size 3330]" [full] # Primary key fingerprint: B482 8BAF 9431 40CE F2A3 4910 71D4 D5E5 822F 73D6 * remotes/gkurz/tags/9p-fix-2020-07-10: 9p: null terminate fs driver options list Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-11Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20200710' into ↵Peter Maydell
staging xen patches Fixes following harden checks in qdev. # gpg: Signature made Fri 10 Jul 2020 14:05:46 BST # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: issuer "anthony.perard@citrix.com" # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [marginal] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20200710: xen: cleanup unrealized flash devices xen: Fix xen-legacy-backend qdev types Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-07-11target/avr/disas: Fix store instructions display orderPhilippe Mathieu-Daudé
While LOAD instructions use the target register as first argument, STORE instructions use it as second argument: LD Rd, X // Rd <- (X) ST Y, Rd // (Y) <- Rr Reported-by: Joaquin de Andres <me@xcancerberox.com.ar> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200707070021.10031-4-f4bug@amsat.org>
2020-07-11target/avr/cpu: Fix $PC displayed addressPhilippe Mathieu-Daudé
$PC is 16-bit wide. Other registers display addresses on a byte granularity. To have a coherent ouput, display $PC using byte granularity too. Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200707070021.10031-3-f4bug@amsat.org>
2020-07-11target/avr/cpu: Drop tlb_flush() in avr_cpu_reset()Philippe Mathieu-Daudé
Since commit 1f5c00cfdb tlb_flush() is called from cpu_common_reset(). Reviewed-by: Thomas Huth <huth@tuxfamily.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200707070021.10031-2-f4bug@amsat.org>
2020-07-11target/avr: Add section into QEMU documentationThomas Huth
The new section explains basic ways of using AVR target in QEMU. Signed-off-by: Michael Rolnik <mrolnik@gmail.com> [thuth: Converted doc from texi to Sphinx syntax] Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-31-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11tests/acceptance: Test the Arduino MEGA2560 boardMichael Rolnik
The test is based on https://github.com/seharris/qemu-avr-tests/tree/master/free-rtos/Demo demo which. If working correctly, prints 'ABCDEFGHIJKLMNOPQRSTUVWX' out. it also demostrates that timer and IRQ are working As the path name demonstrates, the FreeRTOS tests target a board based on a ATMega2560 MCU. We have one, the Arduino MEGA2560. Complementary documentation: https://feilipu.me/2012/01/15/ethermega-arduino-mega-2560-and-freertos/ https://feilipu.me/2015/11/24/arduino_freertos/ (see 'Compatibility') Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash multiple avocado fixups from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-07-11tests/boot-serial: Test some Arduino boards (AVR based)Michael Rolnik
Print out 'T' through serial port. The Arduino Duemilanove is based on a AVR5 CPU, while the Arduino MEGA2560 on a AVR6 CPU. Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash Arduino adjustments from f4bug] Tested-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Acked-by: Thomas Huth <thuth@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-29-huth@tuxfamily.org>
2020-07-11hw/avr: Add limited support for some Arduino boardsPhilippe Mathieu-Daudé
Arduino boards are build with AVR chipsets. Add some of these boards: - Arduino Duemilanove - Arduino Uno - Arduino Mega For more information: https://www.arduino.cc/en/Main/Products https://store.arduino.cc/arduino-genuino/most-popular [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Joaquin de Andres <me@xcancerberox.com.ar> [thuth: sysbus_init_child_obj() ==> object_initialize_child()] Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-26-huth@tuxfamily.org>
2020-07-11hw/avr: Add some ATmega microcontrollersPhilippe Mathieu-Daudé
Add some AVR microcontrollers from the ATmega family: - middle range: ATmega168 and ATmega328 - high range: ATmega1280 and ATmega2560 For product comparison: https://www.microchip.com/wwwproducts/ProductCompare/ATmega168P/ATmega328P https://www.microchip.com/wwwproducts/ProductCompare/ATmega1280/ATmega2560 Datasheets: http://ww1.microchip.com/downloads/en/DeviceDoc/ATmega48A-PA-88A-PA-168A-PA-328-P-DS-DS40002061A.pdf http://ww1.microchip.com/downloads/en/DeviceDoc/Atmel-2549-8-bit-AVR-Microcontroller-ATmega640-1280-1281-2560-2561_datasheet.pdf [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> [thuth: Rebased to master, fixed object_initialize_child() calls etc.] Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-25-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11hw/avr: Add support for loading ELF/raw binariesPhilippe Mathieu-Daudé
Add avr_load_firmware() function to load firmware in ELF or raw binary format. [AM: Corrected the type of the variable containing e_flags] [AM: Moved definition of e_flags conversion function to boot.c] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-24-huth@tuxfamily.org> [PMD: Replace load_image_targphys() by load_image_mr()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11hw/misc: avr: Add limited support for power reduction deviceMichael Rolnik
This is a simple device of just one register, and whenever this register is written to it calls qemu_set_irq function for each of 8 bits/IRQs. It is used to implement AVR Power Reduction. [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash include fix and file rename from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-22-huth@tuxfamily.org>
2020-07-11hw/timer: avr: Add limited support for 16-bit timer peripheralMichael Rolnik
These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Ed Robbins <E.J.C.Robbins@kent.ac.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash info mtree fixes and a file rename from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> [PMD: Use qemu_log_mask(LOG_UNIMP), replace goto by return] Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-21-huth@tuxfamily.org> [PMD: Check cpu-frequency-hz property in realize()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11hw/char: avr: Add limited support for USART peripheralMichael Rolnik
These were designed to facilitate testing but should provide enough function to be useful in other contexts. Only a subset of the functions of each peripheral is implemented, mainly due to the lack of a standard way to handle electrical connections (like GPIO pins). [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Sarah Harris <S.E.Harris@kent.ac.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> [rth: Squash I/O size fix and file rename from f4bug] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-20-huth@tuxfamily.org>
2020-07-11tests/machine-none: Add AVR supportMichael Rolnik
Add a single code line that will automatically provide 'machine none' test. Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-28-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Register AVR support with the rest of QEMUMichael Rolnik
Add AVR related definitions into QEMU, make AVR support buildable. [AM: Remove word 'Atmel' from filenames and all elements of code] Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-23-huth@tuxfamily.org> [PMD: Fixed @avr tag in qapi/machine.json] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add support for disassembling via option '-d in_asm'Michael Rolnik
Provide function disassembles executed instruction when '-d in_asm' is provided. Example: $ qemu-system-avr -bios free-rtos/Demo/AVR_ATMega2560_GCC/demo.elf -d in_asm ... IN: 0x0000014a: CALL 0x3808 IN: main 0x00003808: CALL 0x4b4 IN: vParTestInitialise 0x000004b4: LDI r24, 255 0x000004b6: STS r24, 0 0x000004b8: MULS r16, r20 0x000004ba: OUT $1, r24 0x000004bc: LDS r24, 0 0x000004be: MULS r16, r20 0x000004c0: OUT $2, r24 0x000004c2: RET ... Suggested-by: Richard Henderson <richard.henderson@linaro.org> Suggested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Suggested-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> [rth: Fix spacing and const mnemonic arrays] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-19-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Initialize TCG register variablesMichael Rolnik
Initialize TCG register variables. Co-developed-by: Richard Henderson <richard.henderson@linaro.org> Co-developed-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-18-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - CPU main translation functionMichael Rolnik
Add the core of translation mechanism. Co-developed-by: Richard Henderson <richard.henderson@linaro.org> Co-developed-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-17-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - MCU Control InstructionsMichael Rolnik
This includes: - BREAK - NOP - SLEEP - WDR Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-16-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - Bit and Bit-test InstructionsMichael Rolnik
This includes: - LSR, ROR - ASR - SWAP - SBI, CBI - BST, BLD - BSET, BCLR Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-15-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - Data Transfer InstructionsMichael Rolnik
This includes: - MOV, MOVW - LDI, LDS LDX LDY LDZ - LDDY, LDDZ - STS, STX STY STZ - STDY, STDZ - LPM, LPMX - ELPM, ELPMX - SPM, SPMX - IN, OUT - PUSH, POP - XCH - LAS, LAC LAT Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-14-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - Branch InstructionsMichael Rolnik
This includes: - RJMP, IJMP, EIJMP, JMP - RCALL, ICALL, EICALL, CALL - RET, RETI - CPSE, CP, CPC, CPI - SBRC, SBRS, SBIC, SBIS - BRBC, BRBS Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-13-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - Arithmetic and Logic InstructionsMichael Rolnik
This includes: - ADD, ADC, ADIW - SBIW, SUB, SUBI, SBC, SBCI - AND, ANDI - OR, ORI, EOR - COM, NEG - INC, DEC - MUL, MULS, MULSU - FMUL, FMULS, FMULSU - DES Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-12-huth@tuxfamily.org> [PMD: Added qemu_log_mask(LOG_UNIMP) in trans_DES()] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction translation - Register definitionsMichael Rolnik
Start implementation of instructions by adding register definitions. Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-11-huth@tuxfamily.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-11target/avr: Add instruction helpersMichael Rolnik
Add helpers for instructions that need to interact with QEMU. Also, add stubs for unimplemented instructions. Instructions SPM and WDR are left unimplemented because they require emulation of complex peripherals. The implementation of instruction SLEEP is very limited due to the lack of peripherals to generate wake interrupts. Memory access instructions are implemented here because some address ranges actually refer to CPU registers. Signed-off-by: Michael Rolnik <mrolnik@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Aleksandar Markovic <aleksandar.m.mail@gmail.com> Signed-off-by: Thomas Huth <huth@tuxfamily.org> Message-Id: <20200705140315.260514-10-huth@tuxfamily.org> [PMD: Replace cpu_physical_memory() API by address_space_ldst() API to fix running on big-endian host, reported and suggested by Peter Maydell] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-07-10linux-headers: update again to 5.8Paolo Bonzini
5.8-rc1 inadvertently broke userspace ABI compatibility. Merge again with latest kvm/master to undo that. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10apic: Report current_count via 'info lapic'Jan Kiszka
This is helpful when debugging stuck guest timers. As we need apic_get_current_count for that, and it is really not emulation specific, move it to apic_common.c and export it. Fix its style at this chance as well. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <e00e2896-ca5b-a929-de7a-8e5762f0c1c2@siemens.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10scripts: improve message when TAP based tests failDaniel P. Berrangé
If one of the qtests fails, the TAP driver prints out a message like: ERROR - too few tests run (expected 3, got 1) which fails to tell you which test program failed. This is a critical ommission when many tests are running in parallel as their output is interleaved. The improved message is: ERROR endianness-test - too few tests run (expected 3, got 1) Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200706125054.2619012-1-berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: Enable TSX Suspend Load Address Tracking featureCathy Zhang
This instruction aims to give a way to choose which memory accesses do not need to be tracked in the TSX read set, which is defined as CPUID.(EAX=7,ECX=0):EDX[bit 16]. The release spec link is as follows: https://software.intel.com/content/dam/develop/public/us/en/documents/\ architecture-instruction-set-extensions-programming-reference.pdf The associated kvm patch link is as follows: https://lore.kernel.org/patchwork/patch/1268026/ Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> Message-Id: <1593991036-12183-3-git-send-email-cathy.zhang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: Add SERIALIZE cpu featureCathy Zhang
The availability of the SERIALIZATION instruction is indicated by the presence of the CPUID feature flag SERIALIZE, which is defined as CPUID.(EAX=7,ECX=0):ECX[bit 14]. The release spec link is as follows: https://software.intel.com/content/dam/develop/public/us/en/documents/\ architecture-instruction-set-extensions-programming-reference.pdf The associated kvm patch link is as follows: https://lore.kernel.org/patchwork/patch/1268025/ Signed-off-by: Cathy Zhang <cathy.zhang@intel.com> Message-Id: <1593991036-12183-2-git-send-email-cathy.zhang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10softmmu/vl: Remove the check for colons in -accel parametersThomas Huth
The new -accel option does not accept colons in the parameters anymore (since it does not convert the parameters to -machine accel=... parameters anymore). Thus we can now remove the check for colons in -accel: $ qemu-system-x86_64 -accel kvm:tcg qemu-system-x86_64: -accel kvm:tcg: invalid accelerator kvm:tcg Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Claudio Fontana <cfontana@suse.de> Message-Id: <20200618074001.13642-1-thuth@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10cpu-throttle: new module, extracted from cpus.cClaudio Fontana
move the vcpu throttling functionality into its own module. This functionality is not specific to any accelerator, and it is used currently by migration to slow down guests to try to have migrations converge, and by the cocoa MacOS UI to throttle speed. cpu-throttle contains the controls to adjust and inspect throttle settings, start (set) and stop vcpu throttling, and the throttling function itself that is run periodically on vcpus to make them take a nap. Execution of the throttling function on all vcpus is triggered by a timer, registered at module initialization. No functionality change. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Message-Id: <20200629093504.3228-3-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10softmmu: move softmmu only files from rootClaudio Fontana
move arch_init, balloon, cpus, ioport, memory, memory_mapping, qtest. They are all specific to CONFIG_SOFTMMU. Signed-off-by: Claudio Fontana <cfontana@suse.de> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20200629093504.3228-2-cfontana@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10pc: fix leak in pc_system_flash_cleanup_unusedAlexander Bulekov
tries to fix a leak detected when building with --enable-sanitizers: ./i386-softmmu/qemu-system-i386 Upon exit: ==13576==ERROR: LeakSanitizer: detected memory leaks Direct leak of 1216 byte(s) in 1 object(s) allocated from: #0 0x7f9d2ed5c628 in malloc (/usr/lib/x86_64-linux-gnu/libasan.so.5) #1 0x7f9d2e963500 in g_malloc (/usr/lib/x86_64-linux-gnu/libglib-2.0.so.) #2 0x55fa646d25cc in object_new_with_type /tmp/qemu/qom/object.c:686 #3 0x55fa63dbaa88 in qdev_new /tmp/qemu/hw/core/qdev.c:140 #4 0x55fa638a533f in pc_pflash_create /tmp/qemu/hw/i386/pc_sysfw.c:88 #5 0x55fa638a54c4 in pc_system_flash_create /tmp/qemu/hw/i386/pc_sysfw.c:106 #6 0x55fa646caa1d in object_init_with_type /tmp/qemu/qom/object.c:369 #7 0x55fa646d20b5 in object_initialize_with_type /tmp/qemu/qom/object.c:511 #8 0x55fa646d2606 in object_new_with_type /tmp/qemu/qom/object.c:687 #9 0x55fa639431e9 in qemu_init /tmp/qemu/softmmu/vl.c:3878 #10 0x55fa6335c1b8 in main /tmp/qemu/softmmu/main.c:48 #11 0x7f9d2cf06e0a in __libc_start_main ../csu/libc-start.c:308 #12 0x55fa6335f8e9 in _start (/tmp/qemu/build/i386-softmmu/qemu-system-i386) Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Message-Id: <20200701145231.19531-1-alxndr@bu.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10cpus: Move CPU code from exec.c to cpus-common.cPhilippe Mathieu-Daudé
This code was introduced with SMP support in commit 6a00d60127, later commit 267f685b8b moved CPU list management to common code but forgot this code. Move now and simplify ifdef'ry. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20200702104017.14057-1-philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: Correct the warning message of Intel PTLuwei Kang
The CPUID level need to be set to 0x14 manually on old machine-type if Intel PT is enabled in guest. E.g. the CPUID[0].EAX(level)=7 and CPUID[7].EBX[25](intel-pt)=1 when the Qemu with "-machine pc-i440fx-3.1 -cpu qemu64,+intel-pt" parameter. This patch corrects the warning message of the previous submission(ddc2fc9). Signed-off-by: Luwei Kang <luwei.kang@intel.com> Message-Id: <1593499113-4768-1-git-send-email-luwei.kang@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10checkpatch: Change occurences of 'kernel' to 'qemu' in user messagesAleksandar Markovic
It is odd that we inform user that, for example, his current working directory is not kernel root, when, in face, we mean qemu root. Replace that and few other similar odd user messages. Signed-off-by: Aleksandar Markovic <aleksandar.qemu.devel@gmail.com> Message-Id: <20200620133207.26849-3-aleksandar.qemu.devel@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10iscsi: return -EIO when sense fields are meaninglessXie Yongji
When an I/O request failed, now we only return correct value on scsi check condition. We should also have a default errno such as -EIO in other case. Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Message-Id: <20200701105444.3226-2-xieyongji@bytedance.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10iscsi: handle check condition status in retry loopXie Yongji
The handling of check condition was incorrect because we would only do it after retries exceed maximum. Fixes: 8c460269aa ("iscsi: base all handling of check condition on scsi_sense_to_errno") Signed-off-by: Xie Yongji <xieyongji@bytedance.com> Message-Id: <20200701105444.3226-1-xieyongji@bytedance.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: sev: fail query-sev-capabilities if QEMU cannot use SEVPaolo Bonzini
In some cases, such as if the kvm-amd "sev" module parameter is set to 0, SEV will be unavailable but query-sev-capabilities will still return all the information. This tricks libvirt into erroneously reporting that SEV is available. Check the actual usability of the feature and return the appropriate error if QEMU cannot use KVM or KVM cannot use SEV. Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: sev: provide proper error reporting for query-sev-capabilitiesPaolo Bonzini
The query-sev-capabilities was reporting errors through error_report; change it to use Error** so that the cause of the failure is clearer. Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10KVM: x86: believe what KVM says about WAITPKGPaolo Bonzini
Currently, QEMU is overriding KVM_GET_SUPPORTED_CPUID's answer for the WAITPKG bit depending on the "-overcommit cpu-pm" setting. This is a bad idea because it does not even check if the host supports it, but it can be done in x86_cpu_realizefn just like we do for the MONITOR bit. This patch moves it there, while making it conditional on host support for the related UMWAIT MSR. Cc: qemu-stable@nongnu.org Reported-by: Maxim Levitsky <mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: implement undocumented "smsw r32" behaviorPaolo Bonzini
In 32-bit mode, the higher 16 bits of the destination register are undefined. In practice CR0[31:0] is stored, just like in 64-bit mode, so just remove the "if" that currently differentiates the behavior. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reported-by: Roman Bolshakov <r.bolshakov@yadro.com> Reviewed-by: Roman Bolshakov <r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10target/i386: remove gen_io_endPaolo Bonzini
Force the end of a translation block after an I/O instruction in icount mode. For consistency, all CF_USE_ICOUNT code is kept in disas_insn instead of having it in gen_ins and gen_outs. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-07-10Makefile: simplify MINIKCONF rulesPaolo Bonzini
There is no reason to write MINIKCONF_DEPS manually, since minikconf.py emits a dependency file, and also no reason to list multiple Kconfig files on the command line since they can be included from a master file in the top-level source directory. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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