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'remotes/kraxel/tags/seabios-20191118-pull-request' into staging
seabios: update to pre-1.13 snapshot again (lchs fixed)
# gpg: Signature made Mon 18 Nov 2019 14:23:50 GMT
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/seabios-20191118-pull-request:
seabios: update to pre-1.13 snapshot again
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Due to lchs support merge in upstream seabios gone wrong (applied v3
instead of v4) here is another seabios snapshot update with the
mis-merge fixed up, so lchs support should actually work in -rc2.
Also picked up two tpm bugfixes.
git shortlog from previous snapshot
===================================
Gerd Hoffmann (4):
Revert "geometry: Apply LCHS values for boot devices"
Revert "config: Add toggle for bootdevice information"
Revert "geometry: Add boot_lchs_find_*() utility functions"
Revert "geometry: Read LCHS from fw_cfg"
Sam Eiderman (4):
geometry: Read LCHS from fw_cfg
boot: Build ata and scsi paths in function
geometry: Add boot_lchs_find_*() utility functions
geometry: Apply LCHS values for boot devices
Stefan Berger (2):
tpm: Require a response to have minimum size of a valid response header
tcgbios: Check for enough bytes returned from TPM2_GetCapability
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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into staging
ppc patch queue 2019-11-15
Several fixes for 4.2.0-rc2:
fix mos6522 performance issue,
xive/xics issues,
fix /chosen device-tree on reset
and KVM default cpu-model for all machine classes
# gpg: Signature made Mon 18 Nov 2019 10:52:19 GMT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "lvivier@redhat.com"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/ppc-for-4.2-pull-request:
mos6522: fix T1 and T2 timers
spapr/kvm: Set default cpu model for all machine classes
spapr: Add /chosen to FDT only at reset time to preserve kernel and initramdisk
ppc: Skip partially initialized vCPUs in 'info pic'
xive, xics: Fix reference counting on CPU objects
ppc: Add intc_destroy() handlers to SpaprInterruptController/PnvChip
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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With the Quadra 800 emulation, mos6522 timers processing can consume
until 70% of the host CPU time with an idle guest (I guess the problem
should also happen with PowerMac emulation).
On a recent system, it can be painless (except if you look at top), but
on an old host like a PowerMac G5 the guest kernel can be terribly slow
during the boot sequence (for instance, unpacking initramfs can take 15
seconds rather than only 3 seconds).
We can avoid this CPU overload by enabling QEMU internal timers only if
the mos6522 counter interrupts are enabled. Sometime the guest kernel
wants to read the counters values, but we don't need the timers to
update the counters.
With this patch applied, an idle Q800 consumes only 3% of host CPU time
(and the guest can boot in a decent time).
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20191102154919.17775-1-laurent@vivier.eu>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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We have to set the default model of all machine classes, not just for
the active one. Otherwise, "query-machines" will indicate the wrong
CPU model (e.g. "power9_v2.0-powerpc64-cpu" instead of
"host-powerpc64-cpu") as "default-cpu-type".
s390x already fixed this in de60a92e "s390x/kvm: Set default cpu model for
all machine classes". This patch applies a similar fix for the pseries-*
machine types on ppc64.
Doing a
{"execute":"query-machines"}
under KVM now results in
{
"hotpluggable-cpus": true,
"name": "pseries-4.2",
"numa-mem-supported": true,
"default-cpu-type": "host-powerpc64-cpu",
"is-default": true,
"cpu-max": 1024,
"deprecated": false,
"alias": "pseries"
},
{
"hotpluggable-cpus": true,
"name": "pseries-4.1",
"numa-mem-supported": true,
"default-cpu-type": "host-powerpc64-cpu",
"cpu-max": 1024,
"deprecated": false
},
...
Libvirt probes all machines via "-machine none,accel=kvm:tcg" and will
currently see the wrong CPU model under KVM.
Reported-by: Jiři Denemark <jdenemar@redhat.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Igor Mammedov <imammedo@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: David Hildenbrand <david@redhat.com>
Reviewed-by: Greg Kurz <groug@kaod.org>
Tested-by: Jiri Denemark <jdenemar@redhat.com>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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Since "spapr: Render full FDT on ibm,client-architecture-support" we build
the entire flatten device tree (FDT) twice - at the reset time and
when "ibm,client-architecture-support" (CAS) is called. The full FDT from
CAS is then applied on top of the SLOF internal device tree.
This is mostly ok, however there is a case when the QEMU is started with
-initrd and for some reason the guest decided to move/unpack the init RAM
disk image - the guest correctly notifies SLOF about the change but
at CAS it is overridden with the QEMU initial location addresses and
the guest may fail to boot if the original initrd memory was changed.
This fixes the problem by only adding the /chosen node at the reset time
to prevent the original QEMU's linux,initrd-start/linux,initrd-end to
override the updated addresses.
This only treats /chosen differently as we know there is a special case
already and it is unlikely anything else will need to change /chosen at CAS
we are better off not touching /chosen after we handed it over to SLOF.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Message-Id: <20191024041308.5673-1-aik@ozlabs.ru>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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CPU_FOREACH() can race with vCPU hotplug/unplug on sPAPR machines, ie.
we may try to print out info about a vCPU with a NULL presenter pointer.
Check that in order to prevent QEMU from crashing.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157192725327.3146912.12047076483178652551.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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When a VCPU gets connected to the XIVE interrupt controller, we add a
const link targetting the CPU object to the TCTX object. Similar links
are added to the ICP object when using the XICS interrupt controller.
As explained in <qom/object.h>:
* The caller must ensure that @target stays alive as long as
* this property exists. In the case @target is a child of @obj,
* this will be the case. Otherwise, the caller is responsible for
* taking a reference.
We're in the latter case for both XICS and XIVE. Add the missing
calls to object_ref() and object_unref().
This doesn't fix any known issue because the life cycle of the TCTX or
ICP happens to be shorter than the one of the CPU or XICS fabric, but
better safe than sorry.
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Message-Id: <157192724770.3146912.15400869269097231255.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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SpaprInterruptControllerClass and PnvChipClass have an intc_create() method
that calls the appropriate routine, ie. icp_create() or xive_tctx_create(),
to establish the link between the VCPU and the presenter component of the
interrupt controller during realize.
There aren't any symmetrical call to be called when the VCPU gets unrealized
though. It is assumed that object_unparent() is the only thing to do.
This is questionable because the parenting logic around the CPU and
presenter objects is really an implementation detail of the interrupt
controller. It shouldn't be open-coded in the machine code.
Fix this by adding an intc_destroy() method that undoes what was done in
intc_create(). Also NULLify the presenter pointers to avoid having
stale pointers around. This will allow to reliably check if a vCPU has
a valid presenter.
Signed-off-by: Greg Kurz <groug@kaod.org>
Message-Id: <157192724208.3146912.7254684777515287626.stgit@bahia.lan>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: Laurent Vivier <lvivier@redhat.com>
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Build error message:
qemu-doc.texi:34: node `Top' lacks menu item for `Recently removed features' despite being its Up target
Fixes: 3264ffced3d0 ("dirty-bitmaps: remove deprecated autoload parameter")
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: John Snow <jsnow@redhat.com>
Reviewed-by: Markus Armbruster <armbru@redhat.com>
Tested-by: Laszlo Ersek <lersek@redhat.com>
Message-id: 20191023101956.19120-1-kraxel@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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into staging
RISC-V Fixes for 4.2-rc2
This contains a handful of patches that I'd like to target for 4.2:
* OpenSBI upgrade to 0.5
* Increase in the flash size of the virt board.
* A non-functional cleanup.
* A cleanup to our MIP handling that avoids atomics.
This passes "make check" and boots OpenEmbedded for me.
# gpg: Signature made Thu 14 Nov 2019 18:39:27 GMT
# gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41
# gpg: issuer "palmer@dabbelt.com"
# gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown]
# gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41
* remotes/palmer/tags/riscv-for-master-4.2-rc2:
riscv/virt: Increase flash size
opensbi: Upgrade from v0.4 to v0.5
target/riscv: Remove atomic accesses to MIP CSR
remove unnecessary ifdef TARGET_RISCV64
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Coreboot developers have requested that they have at least 32MB of flash
to load binaries. We currently have 32MB of flash, but it is split in
two to allow loading two flash binaries. Let's increase the flash size
from 32MB to 64MB to ensure we have a single region that is 32MB.
No QEMU release has include flash in the RISC-V virt machine, so this
isn't a breaking change.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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This release has:
Lot of critical fixes
Hypervisor extension support
SBI v0.2 base extension support
Debug prints support
Handle traps when doing unpriv load/store
Allow compiling without FP support
Use git describe to generate boot-time banner
Andes AE350 platform support
ShortLog:
Anup Patel (14):
platform: sifive/fu540: Move FDT further up
lib: Allow compiling without FP support
lib: Introduce sbi_dprintf() API
lib: Use sbi_dprintf() for invalid CSRs
lib: Handle traps when doing unpriv load/store in get_insn()
lib: Delegate supervisor ecall to HS-mode when H extension available
lib: Extend sbi_hart_switch_mode() to support hypervisor extension
lib: Extend sbi_trap_redirect() for hypervisor extension
lib: Redirect WFI trapped from VS/VU mode to HS-mode
include: Extend get_insn() to read instruction from VS/VU mode
lib: Emulate HTIMEDELTA CSR for platforms not having TIME CSR
Makefile: Minor fix in OPENSBI_VERSION_GIT
lib: Fix coldboot race condition observed on emulators/simulators
include: Bump-up version to 0.5
Atish Patra (16):
lib: Provide an atomic exchange function unsigned long
lib: Fix race conditions in tlb fifo access.
platform: Remove the ipi_sync method from all platforms.
lib: Fix timer for 32 bit
lib: Support atomic swap instructions
lib: Upgrade to full flush if size is at least threshold
docs: Update the fu540 platform guide as per U-Boot documents.
lib: Change tlb range flush threshold to 4k page instead of 1G
lib: provide a platform specific tlb range flush threshold
lib: Fix tlb flush range limit value
Test: Move test payload related code out of interface header
lib: Align error codes as per SBI specification.
lib: Rename existing SBI implementation as 0.1.
lib: Remove redundant variable assignment
lib: Implement SBI v0.2
lib: Provide a platform hook to implement vendor specific SBI extensions.
Bin Meng (6):
platform: sifive: fu540: Use standard value string for cpu node status
README: Document 32-bit / 64-bit images build
treewide: Use conventional names for 32-bit and 64-bit
platform: sifive: fu540: Expand FDT size before any patching
firmware: Use macro instead of magic number for boot status
docs: platform: Update descriptions for qemu/sifive_u support
Damien Le Moal (4):
kendryte/k210: Use sifive UART driver
kendryte/k210: remove sysctl code
README: Update license information
kendryte/k210: remove unused file
Georg Kotheimer (1):
utils: Use cpu_to_fdt32() when writing to fdt
Jacob Garber (4):
lib: Use bitwise & instead of boolean &&
lib: Use correct type for return value
lib: Prevent unintended sign extensions
lib: Correct null pointer check
Lukas Auer (1):
firmware: do not use relocated _boot_status before it is valid
Nylon Chen (3):
firmware: Fix the loop condition of _wait_relocate_copy_done section
platform: Add Andes AE350 initial support
scripts: Add AE350 to platform list in the binary archive script
Palmer Dabbelt (1):
Include `git describe` in OpenSBI
Zong Li (1):
Write MSIP by using memory-mapped control register
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
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Instead of relying on atomics to access the MIP register let's update
our helper function to instead just lock the IO mutex thread before
writing. This follows the same concept as used in PPC for handling
interrupts
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Palmer Dabbelt <palmer@dabbelt.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
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Signed-off-by: Hiroyuki Obinata <hiroyuki.obinata@gmail.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
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'remotes/kraxel/tags/seabios-20191113-pull-request' into staging
seabios: update to pre-1.13 snapshot (with ahci fix included).
# gpg: Signature made Wed 13 Nov 2019 14:03:25 GMT
# gpg: using RSA key 4CB6D8EED3E87138
# gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full]
# gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full]
# gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full]
# Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138
* remotes/kraxel/tags/seabios-20191113-pull-request:
seabios: update to pre-1.13 snapshot
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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seabios 1.13 will be released later this month. This patch updates the
seabios submodule and binaries in qemu to a snapshot of git master.
That will increase the test coverage of the upcoming seabios release and
will also make the number of changes smaller when we update to the final
1.13 release during qemu code freeze for 4.2.
v3: add ahci bugfix
v2: build binaries with gcc 4.8.5 instead of gcc 8.3.1 (rhel7).
git shortlog rel-1.12.1..
=========================
David Woodhouse (2):
csm: Sanitise alignment constraint in Legacy16GetTableAddress
csm: Fix boot priority translation
Denis Plotnikov (1):
virtio: extend virtio queue size to 256
Gerd Hoffmann (21):
vga: move modelist from bochsvga.c to new svgamodes.c
vga: make memcpy_high() public
vga: add atiext driver
vga: add ati bios tables
vbe: add edid support.
ati: add edid support.
bochsvga: add edid support.
bochsdisplay: add edid support.
bochsdisplay: parse resolution from edid.
add get_keystroke_full() helper
bootmenu: add support for more than 9 entries
optionrom: disallow int19 redirect for pnp roms.
ati-vga: make less verbose
ati-vga: fix ati_read()
ati-vga: make i2c register and bits configurable
ati-vga: try vga ddc first
ati-vga: add rage128 edid support
bochsdisplay: add copyright and license to bochsdisplay.c
ramfb: add copyright and license to ramfb.c
cp437: add license to cp437.c
ahci: zero-initialize port struct
Joseph Pacheco-Corwin (1):
bootsplash: Added support for 16/24/32bpp in one function
Kevin O'Connor (10):
output: Avoid thunking to 16bit mode in printf() if no vgabios
docs: Update mailing list archive links
docs: Fix cut-and-paste error in Mailinglist.md archive link
usb-ehci: Clear pipe token on pipe reallocate
pciinit: Use %pP shorthand for printing device ids in intel_igd_setup()
virtio-pci: Use %pP format in dprintf() calls
Makefile: Build with -Wno-address-of-packed-member
svgamodes: Add copyright notice to vgasrc/svgamodes.c
docs: Add developer-certificate-of-origin
docs: Note release date for v1.12.1
Liran Alon (1):
pvscsi: ring_desc do not have to be page aligned
Sam Eiderman (6):
smbios: Add missing zero byte to Type 0
geometry: Read LCHS from fw_cfg
boot: Reorder functions in boot.c
geometry: Add boot_lchs_find_*() utility functions
config: Add toggle for bootdevice information
geometry: Apply LCHS values for boot devices
Stefan Berger (2):
tcgbios: Use table to convert hash to buffer size
tcgbios: Implement TPM 2.0 menu item to activate and deactivate PCR banks
Stefano Garzarella (1):
qemu: avoid debug prints if debugcon is not enabled
Stephen Douthit (1):
tpm: Check for TPM related ACPI tables before attempting hw probe
Uwe Kleine-König (3):
cbvga: reuse svga modes definitions from svgamodes.c
Add additional resolutions for 16:9 displays: 1600x900 and 2560x1440
Remove dos line endings introduced in the last two commits
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
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Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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'remotes/vivier2/tags/linux-user-for-4.2-pull-request' into staging
Fix CID 1407221 and stime()
# gpg: Signature made Tue 12 Nov 2019 16:16:43 GMT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/linux-user-for-4.2-pull-request:
linux-user: remove host stime() syscall
linux-user: fix missing break
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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'remotes/edgar/tags/edgar/xilinx-next-2019-11-12.for-upstream' into staging
For upstream
# gpg: Signature made Tue 12 Nov 2019 15:41:43 GMT
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83
* remotes/edgar/tags/edgar/xilinx-next-2019-11-12.for-upstream:
target/microblaze: Plug temp leak around eval_cond_jmp()
target/microblaze: Plug temp leaks with delay slot setup
target/microblaze: Plug temp leaks for loads/stores
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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stime() has been withdrawn from glibc
(12cbde1dae6f "Use clock_settime to implement stime; withdraw stime.")
Implement the target stime() syscall using host
clock_settime(CLOCK_REALTIME, ...) as it is done internally in glibc.
Tested qemu-ppc/x86_64 with:
#include <time.h>
#include <stdio.h>
int main(void)
{
time_t t;
int ret;
/* date -u -d"2019-11-12T15:11:00" "+%s" */
t = 1573571460;
ret = stime(&t);
printf("ret %d\n", ret);
return 0;
}
# date; ./stime; date
Tue Nov 12 14:18:32 UTC 2019
ret 0
Tue Nov 12 15:11:00 UTC 2019
Buglink: https://bugs.launchpad.net/qemu/+bug/1852115
Reported-by: Cole Robinson <crobinso@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20191112142556.6335-1-laurent@vivier.eu>
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Reported by Coverity (CID 1407221)
Fixes: a2d866827bd8 ("linux-user: Support for NETLINK socket options")
cc: Josh Kunz <jkz@google.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <20191112105055.32269-1-laurent@vivier.eu>
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Plug temp leak around eval_cond_jmp().
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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Plug temp leaks with delay slot setup.
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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Simplify endian reversion of address also plugging TCG temp
leaks for loads/stores.
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Luc Michel <luc.michel@greensocs.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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'remotes/stsquad/tags/pull-testing-and-tcg-121119-1' into staging
Testing and plugins for rc1
- add plugin API versioning
- tests/vm add netbsd autoinstall
- disable ipmi-bt-test for non-Linux
- single-thread make check
# gpg: Signature made Tue 12 Nov 2019 14:34:30 GMT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-testing-and-tcg-121119-1:
tcg plugins: expose an API version concept
.travis.yml: don't run make check with multiple jobs
tests/vm: support sites with sha512 checksums
tests: only run ipmi-bt-test if CONFIG_LINUX
tests/vm: update netbsd to version 8.1
tests/vm: use console_consume for netbsd
tests/vm: add console_consume helper
tests/vm: netbsd autoinstall, using serial console
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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This is a very simple versioning API which allows the plugin
infrastructure to check the API a plugin was built against. We also
expose a min/cur API version to the plugin via the info block in case
it wants to avoid using old deprecated APIs in the future.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Robert Foley <robert.foley@linaro.org>
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Let's challenge the convention that doing more at a time helps. It
certainly doesn't tell you unambiguously where in the test cycle you
were before the test hangs and exceeds the job time limit.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
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The NetBSD project uses SHA512 for its checksums so lets support that
in the download helper.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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This test has been unstable on NetBSD for awhile. It seems the
mechanism used to listen to a random port is a Linux-ism (although a
received wisdom Linux-ism rather than a well documented one). As
working around would add more hard to test complexity to the test I've
gone for the easier option of making it CONFIG_LINUX only.
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Cc: Corey Minyard <cminyard@mvista.com>
Cc: Kamil Rytarowski <kamil@netbsd.org>
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Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20191031085306.28888-5-kraxel@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Use new helper to read all pending console output,
not just a single char. Unblocks installer boot.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20191031085306.28888-4-kraxel@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Helper function to read all console output.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Message-Id: <20191031085306.28888-3-kraxel@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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Instead of fetching the prebuilt image from patchew download the install
iso and prepare the image locally. Install to disk, using the serial
console. Create qemu user, configure ssh login. Install packages
needed for qemu builds.
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Reviewed-by: Kamil Rytarowski <n54@gmx.com>
Tested-by: Thomas Huth <thuth@redhat.com>
[ehabkost: rebased to latest qemu.git master]
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Message-Id: <20191031085306.28888-2-kraxel@redhat.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
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'remotes/vivier2/tags/trivial-branch-pull-request' into staging
Trivial fixes (20191112)
ivshmem-server, error messages (numa, qom) and
Makefile (bios-microvm) fixes
# gpg: Signature made Tue 12 Nov 2019 10:04:03 GMT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/trivial-branch-pull-request:
ivshmem-server: Terminate also on SIGINT
ivshmem-server: Clean up shmem on shutdown
numa: Add missing \n to error message
qom: Fix error message in object_class_property_add()
Makefile: install bios-microvm like other binary blobs
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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'remotes/huth-gitlab/tags/pull-request-2019-11-12' into staging
- Fix memory leaks for QTESTS
- Update MAINTAINERS file
- Check for the availability of bzip2 in "configure"
# gpg: Signature made Tue 12 Nov 2019 06:09:09 GMT
# gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5
# gpg: issuer "thuth@redhat.com"
# gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [full]
# gpg: aka "Thomas Huth <thuth@redhat.com>" [full]
# gpg: aka "Thomas Huth <huth@tuxfamily.org>" [full]
# gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown]
# Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* remotes/huth-gitlab/tags/pull-request-2019-11-12:
configure: Check bzip2 is available
configure: Only decompress EDK2 blobs for X86/ARM targets
tests/migration: Print some debug on bad status
MAINTAINERS: slirp: Remove myself as maintainer
cpu-plug-test: fix leaks
qtest: fix qtest_qmp_device_add leak
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Allows to shutdown a foreground session via ctrl-c.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Claudio Fontana <claudio.fontana@suse.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Message-Id: <99c1a7bd-1876-66a2-4b8e-d5bc86116fe7@web.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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So far, the server leaves the posix shared memory object behind when
terminating, requiring the user to explicitly remove it in order to
start a new instance.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Reviewed-by: Claudio Fontana <claudio.fontana@suse.com>
Message-Id: <d938a62c-7538-9d2b-cc0a-13b240ab9141@web.de>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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If memory allocation fails when using -mem-path, QEMU is supposed to print
out a message to indicate that fallback to anonymous RAM is deprecated. This
is done with error_printf() which does output buffering. As a consequence,
the message is only printed at the next flush, eg. when quiting QEMU, and
it also lacks a trailing newline:
qemu-system-ppc64: unable to map backing store for guest RAM: Cannot allocate memory
qemu-system-ppc64: warning: falling back to regular RAM allocation
QEMU 4.1.50 monitor - type 'help' for more information
(qemu) q
This is deprecated. Make sure that -mem-path specified path has sufficient resources to allocate -m specified RAM amountgreg@boss02:~/Work/qemu/qemu-spapr$
Add the missing \n to fix both issues.
Fixes: cb79224b7e4b "deprecate -mem-path fallback to anonymous RAM"
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <157304440026.351774.14607704217028190097.stgit@bahia.lan>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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The error message in object_class_property_add() was copied from
object_property_add() in commit 16bf7f522a2ff. Clarify that it is
about a class, not an object.
While here, have the format string in both functions to fit in a
single line for better grep-ability, despite the checkpatch warning.
Signed-off-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <157287383591.234942.311840593519058490.stgit@bahia.tlslab.ibm.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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Commit 0d5fae3e52e introduced bios-microvm.bin but forgot to add
it to the list of blobs being installed.
Add it to the list of BLOBS that get installed.
Fixes: 0d5fae3e52e "roms: add microvm-bios (qboot) as binary"
Signed-off-by: Bruce Rogers <brogers@suse.com>
[PMD: Reworded description]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Stefano Garzarella <sgarzare@redhat.com>
Reviewed-by: Sergio Lopez <slp@redhat.com>
Message-Id: <20191102114346.6445-1-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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Remove no-longer-true statement that TCG is BSD-licensed
# gpg: Signature made Mon 11 Nov 2019 15:24:06 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth/tags/pull-tcg-20191111:
tcg/LICENSE: Remove out of date claim about TCG subdirectory licensing
tcg/ppc/tcg-target.opc.h: Add copyright/license
tcg/i386/tcg-target.opc.h: Add copyright/license
tcg/aarch64/tcg-target.opc.h: Add copyright/license
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Since 2008 the tcg/LICENSE file has not changed: it claims that
everything under tcg/ is BSD-licensed.
This is not true and hasn't been true for years: in 2013 we
accepted the tcg/aarch64 target code under a GPLv2-or-later
license statement. We also have generic vector optimisation
code under the LGPL2.1-or-later, and the TCI backend is
GPLv2-or-later. Further, many of the files are not BSD
licensed but MIT licensed.
We don't really consider the tcg subdirectory to be a distinct part
of QEMU anyway.
Remove the LICENSE file, since claiming false information
about the license of the code is confusing.
Update the main project LICENSE file also to be clearer about
the licenses used by TCG.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20191025155848.17362-5-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h.
This file has had only two commits, 4b06c216826b7e4 and
d9897efa1fd3174ec, both by a Linaro engineer.
The license is MIT, since that's what the rest of tcg/ppc/ is.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20191025155848.17362-4-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Add the copyright/license boilerplate for tcg/i386/tcg-target.opc.h.
This file has had only one commit, 770c2fc7bb70804a, by
a Linaro engineer.
The license is MIT, since that's what the rest of tcg/i386/ is.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20191025155848.17362-3-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Add the copyright/license boilerplate for target/aarch64/tcg-target.opc.h.
This file has only had two commits: 14e4c1e2355473ccb29
and 79525dfd08262d8, both by the same Linaro engineer.
The license is GPL-2-or-later, since that's what the
rest of tcg/aarch64 uses.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20191025155848.17362-2-peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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'remotes/pmaydell/tags/pull-target-arm-20191111' into staging
target-arm queue:
* Remove old unassigned_access CPU hook API
* Remove old ptimer_init_with_bh() API
* hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine
# gpg: Signature made Mon 11 Nov 2019 13:56:56 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20191111:
hw/arm/boot: Set NSACR.{CP11, CP10} in dummy SMC setup routine
Remove unassigned_access CPU hook
ptimer: Remove old ptimer_init_with_bh() API
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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The boot.c code usually puts the CPU into NS mode directly when it is
booting a kernel. Since fc1120a7f5f2d4b6 this has included a
requirement to set NSACR to give NS state access to the FPU; we fixed
that for the usual code path in ece628fcf6. However, it is also
possible for a board model to request an alternative mode of booting,
where its 'board_setup' code hook runs in Secure state and is
responsible for doing the S->NS transition after it has done whatever
work it must do in Secure state. In this situation the board_setup
code now also needs to update NSACR.
This affects all boards which set info->secure_board_setup, which is
currently the 'raspi' and 'highbank' families. They both use the
common arm_write_secure_board_setup_dummy_smc().
Set the NSACR CP11 and CP10 bits in the code written by that
function, to allow FPU access in Non-Secure state when using dummy
SMC setup routine. Otherwise an AArch32 kernel booted on the
highbank or raspi boards will UNDEF as soon as it tries to use the
FPU.
Update the comment describing secure_board_setup to note the new
requirements on users of it.
This fixes a kernel panic when booting raspbian on raspi2.
Successfully tested with:
2017-01-11-raspbian-jessie-lite.img
2018-11-13-raspbian-stretch-lite.img
2019-07-10-raspbian-buster-lite.img
Fixes: fc1120a7f5
Signed-off-by: Clement Deschamps <clement.deschamps@greensocs.com>
Tested-by: Laurent Bonnans <laurent.bonnans@here.com>
Message-id: 20191104151137.81931-1-clement.deschamps@greensocs.com
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
[PMM: updated comment to boot.h to note new requirement on
users of secure_board_setup; edited/rewrote commit message]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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All targets have now migrated away from the old unassigned_access
hook to the new do_transaction_failed hook. This means we can remove
the core-code infrastructure for that hook and the code that calls it.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20191108173732.11816-1-peter.maydell@linaro.org
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Now all the users of ptimers have converted to the transaction-based
API, we can remove ptimer_init_with_bh() and all the code paths
that are used only by bottom-half based ptimers, and tidy up the
documentation comments to consider the transaction-based API the
only possibility.
The code changes result from:
* s->bh no longer exists
* s->callback is now always non-NULL
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20191025142411.17085-1-peter.maydell@linaro.org
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