aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2008-12-10Accept password as an argument to 'change vnc password' monitor command ↵aliguori
(Chris Webb) This allows easier use of the change vnc password monitor command from management scripts, without having to implement expect(1)-like behaviour. Signed-off-by: Chris Webb <chris@arachsys.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5967 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10Fix off-by-one bug limiting VNC passwords to 7 chars (Chris Webb)aliguori
monitor_readline expects buf_size to include the terminating \0, but do_change_vnc in monitor.c calls it as though it doesn't. The other site where monitor_readline reads a password (in vl.c) passes the buffer length correctly. Signed-off-by: Chris Webb <chris@arachsys.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5966 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10target-ppc: enable SPE and Altivec in user modeaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5965 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10target-ppc: initialize MSR appropriately in user-modeaurel32
Mask the initial MSR with the mask from the PowerPC CPU definition. Noticed by Nathan Froyd. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5964 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10target-i386: Fix jmp im on x86_64 when executing 32-bit codeaurel32
When running grub-install (32-bit) on an x86_64 Linux system in qemu, it hangs on a pagefault forever, because an integer overflow occurs on the IP on "jmp im". This patch masks overflows for 32 bit IPs on a 64 bit system, just like it is done for 16 bit IPs already. Using this patch, x86_64 openSUSE installation works again. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Kevin Wolf <kwolf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5963 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-10MIPS Magnum: fix memory-mapped i8042aurel32
Current implementation of memory-mapped i8042 controller is atm implemented with an interface shift (it_shift) parameter, like most all memory-mapped devices in Qemu. However, this isn't suitable for MIPS Magnum, where i8042 controller is at 0x80005000 up to 0x80005fff. Thomas Bogendoerfer (from #mipslinux) tested the behaviour of a real machine, and found that odd addresses are for status/command register, and even addresses for data register. Attached patch implements this behaviour by replacing the it_shift parameter by a mask one. Incidentally, keyboard now works on OpenBSD 2.3, which accesses i8042 controller at 0x80005060 and 0x80005061. Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5962 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-09KVM: Coalesced MMIO supportaliguori
MMIO exits are more expensive in KVM or Xen than in QEMU because they involve, at least, privilege transitions. However, MMIO write operations can be effectively batched if those writes do not have side effects. Good examples of this include VGA pixel operations when in a planar mode. As it turns out, we can get a nice boost in other areas too. Laurent mentioned a 9.7% performance boost in iperf with the coalesced MMIO changes for the e1000 when he originally posted this work for KVM. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5961 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-09Disable KVM support if the kernel modules have broken memory slot handlingaliguori
Prior to kvm-80, memory slot deletion was broken in the KVM kernel modules. In kvm-81, a new capability is introduced to signify that this problem has been fixed. Since we rely on being able to delete memory slots, refuse to work with any kernel module that does not have this capability present. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5960 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08linux-user: mremap(): handle MREMAP_FIXED and MREMAP_MAYMOVE correctlyaurel32
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5959 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08linux-user: mmap: add check if requested memory area fits target address spaceaurel32
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5958 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08linux-user: Fix h2g usage in page_find_allocaurel32
Paul's comment on my first approach to fix the h2g usage in page_find_alloc finally open my eyes about what the code is actually supposed to do: With the help of h2g_valid we can no cleanly check if a freshly allocate page (for host usage) is guest-reachable and, in case it is, mark it reserved in the guest's address range. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5957 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08linux-user: Introduce h2g_validaurel32
Introduce h2g_valid to check if a given host address can be converted into a valid guest address. Based on a patch from Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5956 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08linux-user: Safety belt for h2gaurel32
h2g can only work on 64-bit hosts if the provided address is mappable to the guest range. Neglecting this was already the source for several bugs. Instrument the macro so that it will trigger earlier in the future (at least as long as we have this kind of mapping mechanism). Based on a patch from Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5955 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08linux-user: Move abi_* typedefs into qemu-types.haurel32
Signed-off-by: Kirill A. Shutemov <kirill@shutemov.name> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5954 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08configure: also close stdout when calling ccaurel32
Remove some ugly outputs with colorgcc Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5953 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08target-ppc: kill a warningaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5952 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08target-ppc: cleanup op_helper.c after TCG conversionaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5951 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08target-ppc: enable access type in MMUaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5950 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-08target-ppc: memory load/store reworkaurel32
Rework the memory load/store: - Unify load/store functions for 32-bit and 64-bit CPU - Don't swap values twice for bit-reverse load/store functions in little endian mode. - On a 64-bit CPU in 32-bit mode, do the address truncation for address computation instead of every load store. Truncate the address when incrementing the address (if needed) - Cache writes to access_types. - Add a few missing calls to gen_set_access_type() Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5949 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Make memory load functions (ldxx_y(ptr)) take a const pointer.balrog
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5948 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Fix 64-bit targets compilation on ARM host.balrog
Only fix compilation, probably doesn't run. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5947 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Move spitz microdrive to PCMCIA socket 0.balrog
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5946 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07target-alpha: gdb-stub supportaurel32
(Vince Weaver) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5945 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07MIPS: remove a few warningsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5944 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07gdbstub: kill a warningaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5943 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Parallel port resetaurel32
Attached patch adds a reset handler to parallel port, so it gets correct register values after a reset. (Hervé Poussineau) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5942 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07target-ppc: kill a few warningsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5941 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Quote configure's arguments and location while storing them in config_host.makmalc
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5940 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH4: SCI improvementaurel32
This patch simply implement one register of SH4's SCI := Serial Communication Interface. R2D evaluation board uses SCI for SPI connection. So, Linux kernel for R2D with default configuration causes a QEMU assertion failure when it initializes SPI driver. This patch avoids it and reduces the kernel config modification work for QEMU. Completing SCI implementation task is left. Other board support is desirable to confirm this task, which uses SCI for a serial terminal. (Shin-ichiro KAWASAKI) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5939 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH4: kill a few warningsaurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5938 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH4: Implement FD bitaurel32
SH4 manual say that if a floating point instruction is executed while FD bit in the status register is 1, an exception should be raised. QEMU presently does not do that, so the kernel does not initialize FP state for any thread, nor does it save/restore FP state. The most apparent consequence is that while recent gcc/libc expect double-precision mode to be set by kernel, they run in single-precision mode, and all FP code produces wrong values. This patch fixes this. It also fixes a couple of places where PC was not updated before handling an exception, although both those places deal with invalid instruction and don't lead to any user-visible bugs. (Vladimir Prus) git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5937 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some cleanups after dyngen removalaurel32
1. hostregs_helper.h: fix comment 2. translate-all.c: rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) 3. tcg.c: - rename dyngen_table_op_count to tcg_table_op_count - no need to generate a log of dyngen ops generated - rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) 4. tcg.h: rename dyngen_code(_search_pc) to tcg_gen_code(_search_pc) Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5936 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH4: Eliminate P4 to A7 mangling (Takashi YOSHII).balrog
Main purpose of this is to delete *physical = address & 0x1fffffff; at target-sh4/helper.c:449, using new mmio rule introduced by #5849 This masking is a nice trick to realize P4/A7 duality of SH registers. But, IMHO, it is logically wrong. Most of SH4 cpu control registers in P4 area(0xfc000000...0xffffffff) have one more address called A7 which is usually P4 address with upper 3bits masked. This is an address only appears in TLB's physical address part. Current code use trick writing drivers as if they are really in A7 (that's why you see many *_A7 in hw/sh*.c), and using translation P4 to A7. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5935 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH: improve the way sh7750 registers io memory (Takashi YOSHII).balrog
Fixes to be needed for commit #5849 "Change MMIO callbacks..." hw/sh7750.c: - Divide region of CPU control registers to avoid overlapping to peripheral modules. - Delete unused var "icr", which had moved to hw/sh_intc.c. hw/sm501.c: - Merge non page aligned palette registers into the region of control registers. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5934 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Fix some new warnings introduced after r5022blueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5933 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH: r2d pci support (Takashi YOSHII).balrog
This patch adds pci support to sh/r2d board. This is the first user of PCIC support I formerly sent. PCIC actually is inside of chip with CPU core on SH7751. But, this code is written as if SH7750 and PCIC are on board. I care little about physical device boundary, but fitting with qemu's design. This patch also adds some BSC (Bus State Controller) registers, because PCI device driver software have to accesses them. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5932 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Enable gcc flag -Wredundant-declsblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5931 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Enable gcc flag -Wstrict-prototypesblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5930 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Enable gcc flag -Wmissing-prototypesblueswir1
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5929 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH: Don't subtract bases from access addresses in PCIC.balrog
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5928 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07SH: On-chip PCI controller support (Takashi YOSHII).balrog
This patch adds SuperH on-chip PCI controller(PCIC) support. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5927 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07sh4: Add r2d onboard FPGA IRQ controller (Takashi YOSHII).balrog
This adds IRQ controller in FPGA on r2d, and use it for CF. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5926 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07sh4: Add IRL (4-bit encoded interrupt input) support (Takashi YOSHII).balrog
This patch adds IRL(4bit encoded 15 level interrupt input) support to SH using qemu_irq as a multi level (!=on/off) signal. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5925 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07sh4: mmio based CF support on r2d board (Takashi YOSHII).balrog
This patch adds emulation for a CompactFlash on sh4/r2d board. The device is CF, but wired to be worked as True-IDE mode, and connected directly to SH bus. So, this code is to support generally mmio based IDEs which are supported by "pata_platform" driver in linux kernel. Signed-off-by: Takashi YOSHII <takasi-y@ops.dti.ne.jp> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5924 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Remove FORCE_RET() and RETURN()aurel32
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5923 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some cleanups after dyngen removalaurel32
this patch removes some now unused things after dyngen removal. 1. dyngen-exec.h: op_param, op _jmp and some associated macros are now unused; 2. Makefile.target: tcg-dyngen is not needed anymore 2. tcg/tcg-op.h, tcg/tcg-opc.h: gen-op.h is dead 3. tcg.c: - INDEX_op_end is now the first op - CONFIG_DYNGEN_OP is never defined 4. tcg.h: dyngen_op not needed anymore 5. exec-all.h: remove some ASM macros. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5922 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07target-i386: fix CVE-2007-1322aurel32
The icebp instruction can be abused to terminate the emulation, resulting in denial of service. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5921 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07slirp: fix CVE 2007-5729aurel32
The emulated network cards in QEMU allows local users to execute arbitrary code by writing Ethernet frames with a size larger than the slirp's default MTU, which triggers a heap-based buffer overflow in the slirp library. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5920 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07Some fixes for TCG debuggingblueswir1
This fixes a few things after Paul's improvements for TCG debugging: - change TCGv_i64 field name to something different from TCGv_i32 - fix things in tcg that the above change made visible. Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5919 c046a42c-6fe2-441c-8c8c-71466251a162
2008-12-07target-ppc: disable single steppingaurel32
... which left was enabled by mistake. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5918 c046a42c-6fe2-441c-8c8c-71466251a162
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-29 06:07:24 +0000