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2017-01-31qtest: convert ivshmem-test to use libqosLaurent Vivier
This will allow to use it with ppc64. Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31libqos: fix spapr qpci_map()Laurent Vivier
Signed-off-by: Laurent Vivier <lvivier@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31qtest: add display-vga-test to ppc64Laurent Vivier
Only enable for ppc64 in the Makefile, but added code in the file to check cirrus card only on architectures supporting it (alpha, mips, i386, x86_64). Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Tested-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31qtest: add netfilter tests for ppc64Laurent Vivier
Signed-off-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Tested-by: Greg Kurz <groug@kaod.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31ppc: Validate compatibility modes when settingDavid Gibson
Current ppc_set_compat() will attempt to set any compatiblity mode specified, regardless of whether it's available on the CPU. The caller is expected to make sure it is setting a possible mode, which is awkwward because most of the information to make that decision is at the CPU level. This begins to clean this up by introducing a ppc_check_compat() function which will determine if a given compatiblity mode is supported on a CPU (and also whether it lies within specified minimum and maximum compat levels, which will be useful later). It also contains an assertion that the CPU has a "virtual hypervisor"[1], that is, that the guest isn't permitted to execute hypervisor privilege code. Without that, the guest would own the PCR and so could override any mode set here. Only machine types which use a virtual hypervisor (i.e. 'pseries') should use ppc_check_compat(). ppc_set_compat() is modified to validate the compatibility mode it is given and fail if it's not available on this CPU. [1] Or user-only mode, which also obviously doesn't allow access to the hypervisor privileged PCR. We don't use that now, but could in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2017-01-31ppc: Rewrite ppc_get_compat_smt_threads()David Gibson
To continue consolidation of compatibility mode information, this rewrites the ppc_get_compat_smt_threads() function using the table of compatiblity modes in target-ppc/compat.c. It's not a direct replacement, the new ppc_compat_max_threads() function has simpler semantics - it just returns the number of threads the cpu model has, taking into account any compatiblity mode it is in. This no longer takes into account kvmppc_smt_threads() as the previous version did. That check wasn't useful because we check in ppc_cpu_realizefn() that CPUs aren't instantiated with more threads than kvm allows (or if we didn't things will already be broken and this won't make it any worse). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2017-01-31ppc: Rewrite ppc_set_compat()David Gibson
This rewrites the ppc_set_compat() function so that instead of open coding the various compatibility modes, it reads the relevant data from a table. This is a first step in consolidating the information on compatibility modes scattered across the code into a single place. It also makes one change to the logic. The old code masked the bits to be set in the PCR (Processor Compatibility Register) by which bits are valid on the host CPU. This made no sense, since it was done regardless of whether our guest CPU was the same as the host CPU or not. Furthermore, the actual PCR bits are only relevant for TCG[1] - KVM instead uses the compatibility mode we tell it in kvmppc_set_compat(). When using TCG host cpu information usually isn't even present. While we're at it, we put the new implementation in a new file to make the enormous translate_init.c a little smaller. [1] Actually it doesn't even do anything in TCG, but it will if / when we get to implementing compatibility mode logic at that level. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2017-01-31pseries: Add pseries-2.9 machine typeDavid Gibson
Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com>
2017-01-31prep: do not use global variable to access nvramHervé Poussineau
Signed-off-by: Hervé Poussineau <hpoussin@reactos.org> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31hw/ppc/spapr: Fix boot path of usb-host storage devicesThomas Huth
When passing through an USB storage device to a pseries guest, it is currently not possible to automatically boot from the device if the "bootindex" property has been specified, too (e.g. when using "-device nec-usb-xhci -device usb-host,hostbus=1,hostaddr=2,bootindex=0" at the command line). The problem is that QEMU builds a device tree path like "/pci@800000020000000/usb@0/usb-host@1" and passes it to SLOF in the /chosen/qemu,boot-list property. SLOF, however, probes the USB device, recognizes that it is a storage device and thus changes its name to "storage", and additionally adds a child node for the SCSI LUN, so the correct boot path in SLOF is something like "/pci@800000020000000/usb@0/storage@1/disk@101000000000000" instead. So when we detect an USB mass storage device with SCSI interface, we've got to adjust the firmware boot-device path properly that SLOF can automatically boot from the device. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1354177 Signed-off-by: Thomas Huth <thuth@redhat.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement stxvll instructionsNikunj A Dadhania
stxvll: Store VSX Vector Left-justified with Length Vector (8-bit elements) in BE/LE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Storing 14 bytes would result in following Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement stxvl instructionNikunj A Dadhania
stxvl: Store VSX Vector with Length Vector (8-bit elements) in BE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Vector (8-bit elements) in LE: +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"| +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Storing 14 bytes would result in following Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement lxvll instructionNikunj A Dadhania
lxvll: Load VSX Vector Left-justified with Length Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Loading 14 bytes to vector (8-bit elements) in BE/LE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement lxvl instructionNikunj A Dadhania
lxvl: Load VSX Vector with Length Little/Big-endian Storage: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Loading 14 bytes results in: Vector (8-bit elements) in BE: +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ |“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00| +---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+ Vector (8-bit elements) in LE: +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ |00|00|“T”|“S”|“E”|“T”|“ ”|“a”|“ ”|“s”|“i”|“ ”|“s”|“i”|"h"|"T"| +--+--+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Add xxperm and xxpermr instructionsBharata B Rao
xxperm: VSX Vector Permute xxpermr: VSX Vector Permute Right-indexed Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement xscpsgnqp instructionNikunj A Dadhania
xscpsgnqp: VSX Scalar Copy Sign Quad-Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement xsnegqp instructionNikunj A Dadhania
xsnegqp: VSX Scalar Negate Quad-Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Implement bcd_is_valid functionJose Ricardo Ziviani
A function to check if all digits of a given BCD number is valid is here presented because more instructions will need to reuse the same code. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement xsabsqp/xsnabsqp instructionDavid Gibson
xsabsqp: VSX Scalar Absolute Quad-Precision xsnabsqp: VSX Scalar Negative Absolute Quad-Precision Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement stop instructionNikunj A Dadhania
Use the nap code. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: move ppc_vsr_t to common headerNikunj A Dadhania
The structure and corresponding defines and functions need to be used outside of fpu_helper.c as well. Add u8, u16, u32 and Int128 to the structure. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31ppc/spapr: implement H_SIGNAL_SYS_RESETNicholas Piggin
The H_SIGNAL_SYS_RESET hcall allows a guest CPU to raise a system reset exception on CPUs within the same guest -- all CPUs, all-but-self, or a specific CPU (including self). This has not made its way to a PAPR release yet, but we have an hcall number assigned. H_SIGNAL_SYS_RESET = 0x380 Syntax: hcall(uint64 H_SIGNAL_SYS_RESET, int64 target); Generate a system reset NMI on the threads indicated by target. Values for target: -1 = target all online threads including the caller -2 = target all online threads except for the caller All other negative values: reserved Positive values: The thread to be targeted, obtained from the value of the "ibm,ppc-interrupt-server#s" property of the CPU in the OF device tree. Semantics: - Invalid target: return H_Parameter. - Otherwise: Generate a system reset NMI on target thread(s), return H_Success. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31ppc: Rename cpu_version to compat_pvrDavid Gibson
The 'cpu_version' field in PowerPCCPU is badly named. It's named after the 'cpu-version' device tree property where it is advertised, but that meaning may not be obvious in most places it appears. Worse, it doesn't even really correspond to that device tree property. The property contains either the processor's PVR, or, if the CPU is running in a compatibility mode, a special "logical PVR" representing which mode. Rename the cpu_version field, and a number of related variables to compat_pvr to make this clearer. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: Thomas Huth <thuth@redhat.com>
2017-01-31ppc: Clean up and QOMify hypercall emulationDavid Gibson
The pseries machine type is a bit unusual in that it runs a paravirtualized guest. The guest expects to interact with a hypervisor, and qemu emulates the functions of that hypervisor directly, rather than executing hypervisor code within the emulated system. To implement this in TCG, we need to intercept hypercall instructions and direct them to the machine's hypercall handlers, rather than attempting to perform a privilege change within TCG. This is controlled by a global hook - cpu_ppc_hypercall. This cleanup makes the handling a little cleaner and more extensible than a single global variable. Instead, each CPU to have hypercalls intercepted has a pointer set to a QOM object implementing a new virtual hypervisor interface. A method in that interface is called by TCG when it sees a hypercall instruction. It's possible we may want to add other methods in future. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2017-01-31pseries: Make cpu_update during CAS unconditionalDavid Gibson
spapr_h_cas_compose_response() includes a cpu_update parameter which controls whether it includes updated information on the CPUs in the device tree fragment returned from the ibm,client-architecture-support (CAS) call. Providing the updated information is essential when CAS has negotiated compatibility options which require different cpu information to be presented to the guest. However, it should be safe to provide in other cases (it will just override the existing data in the device tree with identical data). This simplifies the code by removing the parameter and always providing the cpu update information. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Alexey Kardashevskiy <aik@ozlabs.ru>
2017-01-31pseries: Always use core objects for CPU constructionDavid Gibson
Currently the pseries machine has two paths for constructing CPUs. On newer machine type versions, which support cpu hotplug, it constructs cpu core objects, which in turn construct CPU threads. For older machine versions it individually constructs the CPU threads. This division is going to make some future changes to the cpu construction harder, so this patch unifies them. Now cpu core objects are always created. This requires some updates to allow core objects to be created without a full complement of threads (since older versions allowed a number of cpus not a multiple of the threads-per-core). Likewise it needs some changes to the cpu core hot/cold plug path so as not to choke on the old machine types without hotplug support. For good measure, we move the cpu construction to its own subfunction, spapr_init_cpus(). Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Reviewed-by: Greg Kurz <groug@kaod.org>
2017-01-31target-ppc: add vextu[bhw][lr]x instructionsAvinesh Kumar
vextublx: Vector Extract Unsigned Byte Left vextuhlx: Vector Extract Unsigned Halfword Left vextuwlx: Vector Extract Unsigned Word Left vextubrx: Vector Extract Unsigned Byte Right-Indexed VX-form vextuhrx: Vector Extract Unsigned Halfword Right-Indexed VX-form vextuwrx: Vector Extract Unsigned Word Right-Indexed VX-form Signed-off-by: Avinesh Kumar <avinesku@linux.vnet.ibm.com> Signed-off-by: Hariharan T.S. <hari@linux.vnet.ibm.com> [ implement using int128_rshift ] Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Implement bcdsetsgn. instructionJose Ricardo Ziviani
bcdsetsgn.: Decimal set sign. This instruction copies the register value to the result register but adjust the signal according to the preferred sign value. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Implement bcdcpsgn. instructionJose Ricardo Ziviani
bcdcpsgn.: Decimal copy sign. Given two registers vra and vrb, it copies the vra value with vrb sign to the result register vrt. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Implement bcdctsq. instructionJose Ricardo Ziviani
bcdctsq.: Decimal convert to signed quadword. It is possible to convert packed decimal values to signed quadwords. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Implement bcdcfsq. instructionJose Ricardo Ziviani
bcdcfsq.: Decimal convert from signed quadword. It is not possible to convert values less than -10^31-1 or greater than 10^31-1 to be represented in packed decimal format. Signed-off-by: Jose Ricardo Ziviani <joserz@linux.vnet.ibm.com> [dwg: Corrected constant which should be 10^16-1 but was 10^17-1] Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement lxv/lxvx and stxv/stxvxNikunj A Dadhania
lxv: Load VSX Vector lxvx: Load VSX Vector Indexed Little/Big-endian Storage +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ Vector load results: BE: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ LE: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |E7|E6|E5|E4|E3|E2|E1|E0|F7|F6|F5|F4|F3|F2|F1|F0| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ stxv: Store VSX Vector stxvx: Store VSX Vector Indexed Vector (8-bit elements) in BE: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ Vector (8-bit elements) in LE: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |E7|E6|E5|E4|E3|E2|E1|E0|F7|F6|F5|F4|F3|F2|F1|F0| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ Store results in following: +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ |F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7| +--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+ Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement stxsd and stxsspNikunj A Dadhania
stxsd: Store VSX Scalar Dword stxssp: Store VSX Scalar SP Moreover, DQ-Form/DS-FORM instructions shares the same primary opcode(0x3D). For DQ-FORM bits 29:31 are used, for DS-FORM bits 30:31 are used. Common routine to decode primary opcode(0x3D) - ds-form/dq-form instructions is required. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: implement lxsd and lxssp instructionsNikunj A Dadhania
lxsd: Load VSX Scalar Dword lxssp: Load VSX Scalar Single Moreover, DS-Form instructions shares the same primary opcode, bits 30:31 are used to decode the instruction. Use a common routine to decode primary opcode(0x39) - ds-form instructions and branch-out depending on bits 30:31. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Add xscmpoqp and xscmpuqp instructionsBharata B Rao
xscmpoqp - VSX Scalar Compare Ordered Quad-Precision xscmpuqp - VSX Scalar Compare Unordered Quad-Precision Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Add xscmpexp[dp,qp] instructionsBharata B Rao
xscmpexpdp: VSX Scalar Compare Exponents Double-Precision xscmpexpqp: VSX Scalar Compare Exponents Quad-Precision Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Fix xscmpodp and xscmpudp instructionsBharata B Rao
- xscmpodp & xscmpudp are missing flags reset. - In xscmpodp, VXCC should be set only if VE is 0 for signalling NaN case and VXCC should be set by explicitly checking for quiet NaN case. - Comparison is being done only if the operands are not NaNs. However as per ISA, it should be done even when operands are NaNs. Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: rename CRF_* defines as CRF_*_BITNikunj A Dadhania
Add _BIT to CRF_[GT,LT,EQ_SO] and introduce CRF_[GT,LT,EQ,SO] for usage without shifts in the code. This would simplify the code. Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31target-ppc: Consolidate instruction decode helpersBharata B Rao
Move instruction decode helpers to target-ppc/internal.h so that some of these can be used from outside of translate.c. This movement also helps to get rid of some duplicate helpers from target-ppc/fpu_helper.c. Suggested-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Signed-off-by: Bharata B Rao <bharata@linux.vnet.ibm.com> Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-31disas/ppc: Fix indefinite articles in commentsStefan Weil
Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-01-30Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* SCSI max_transfer support for scsi-generic (Eric) * x86 SMI broadcast (Laszlo) * Character device QOMification (Marc-André) * Record/replay improvements (Pavel) * iscsi fixes (Peter L.) * "info mtree -f" command (Peter Xu) * TSC clock rate reporting (Phil) * DEVICE_CATEGORY_CPU (Thomas) * Memory sign-extension fix (Ladi) # gpg: Signature made Fri 27 Jan 2017 17:08:51 GMT # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (41 commits) memory: don't sign-extend 32-bit writes chardev: qom-ify vc: use a common prefix for chr callbacks baum: use a common prefix for chr callbacks gtk: overwrite the console.c char driver char: use error_report() spice-char: improve error reporting char: rename TCPChardev and NetChardev char: rename CharDriverState Chardev bt: use qemu_chr_alloc() char: allocate CharDriverState as a single object char: use a feature bit for replay char: introduce generic qemu_chr_get_kind() char: fold single-user functions in caller char: move callbacks in CharDriver char: use a static array for backends char: use a const CharDriver doc: fix spelling char: add qemu_chr_fe_add_watch() Returns description qemu-options: stdio is available on win32 ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-01-27memory: don't sign-extend 32-bit writesLadi Prosek
ldl_p has a signed return type so assigning it to uint64_t implicitly sign-extends the value. This results in devices with min_access_size = 8 seeing unexpected values passed to their write handlers. Example: guest performs a 32-bit write of 0x80000000 to an mmio region and the handler receives 0xFFFFFFFF80000000 in its value argument. Signed-off-by: Ladi Prosek <lprosek@redhat.com> Message-Id: <1485440557-10384-1-git-send-email-lprosek@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27chardev: qom-ifyMarc-André Lureau
Turn Chardev into Object. qemu_chr_alloc() is replaced by the qemu_chardev_new() constructor. It will call qemu_char_open() to open/intialize the chardev with the ChardevCommon *backend settings. The CharDriver::create() callback is turned into a ChardevClass::open() which is called from the newly introduced qemu_chardev_open(). "chardev-gdb" and "chardev-hci" are internal chardev and aren't creatable directly with -chardev. Use a new internal flag to disable them. We may want to use TYPE_USER_CREATABLE interface instead, or perhaps allow -chardev usage. Although in general we keep typename and macros private, unless the type is being used by some other file, in this patch, all types and common helper macros for qemu-char.c are in char.h. This is to help transition now (some types must be declared early, while some aren't shared) and when splitting in several units. This is to be improved later. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27vc: use a common prefix for chr callbacksMarc-André Lureau
vc_chr_write() is more appropriate than _puts() since no newline is appended, even though it's not used only as a callback. Keep "qemu_chr_parse" prefix, most chardev parse functions use this prefix atm. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27baum: use a common prefix for chr callbacksMarc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27gtk: overwrite the console.c char driverMarc-André Lureau
Instead of registering a vc handler to allocate the Gtk VC Chardev, overwrite the console.c char driver. A later patch, when switching to QOM, will register a default console vc QOM class if none has been registered before. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27char: use error_report()Marc-André Lureau
Prefer error_report() over fprintf(stderr..) Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27spice-char: improve error reportingMarc-André Lureau
Set errp to report errors up to the right monitor. Use error_append_hint() to give hints about parameters on !qmp monitors, instead of a direct fprintf() call. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27char: rename TCPChardev and NetChardevMarc-André Lureau
Rename the types to follow the name of the chardev kind. - socket: TCPChardev -> SocketChardev - udp: NetChardev -> UdpChardev Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-01-27char: rename CharDriverState ChardevMarc-André Lureau
Pick a uniform chardev type name. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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