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2013-02-27Set virtio-serial device to have a default of 2 MSI vectors.Gal Hammer
The virtio-serial device is expected to use 2 MSI vectors, one for control queue and a second shared for all queues. Signed-off-by: Gal Hammer <ghammer@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-02-27ICH9 LPC: Reset Control Register, basic implementationLaszlo Ersek
This commit does the same for the ICH9 LPC as commit 1ec4ba74 for the PIIX3. For the present we're ignoring the Full Reset (FULL_RST) and System Reset (SYS_RST) bits; the guest can read them back but that's it. Signed-off-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-02-27Fix guest OS hang when 64bit PCI bar presentAlexey Korolev
This patch addresses the issue fully described here: http://lists.nongnu.org/archive/html/qemu-devel/2013-02/msg01804.html Linux kernels prior to 2.6.36 do not disable the PCI device during enumeration process. Since lower and higher parts of a 64bit BAR are programmed separately this leads to qemu receiving a request to occupy a completely wrong address region for a short period of time. We have found that the boot process screws up completely if kvm-apic range is overlapped even for a short period of time (it is fine for other regions though). This patch raises the priority of the kvm-apic memory region, so it is never pushed out by PCI devices. The patch is quite safe as it does not touch memory manager. Signed-off-by: Alexey Korolev <akorolex@gmail.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-02-27e1000: unbreak the guest network migration to 1.3Michael S. Tsirkin
QEMU 1.3 does not emulate the link auto negotiation, so if migrate to a 1.3 machine during link auto negotiation, the guest link will be set to down. Fix this by just disabling auto negotiation for 1.3 and older. Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2013-02-26vhost: memory sync fixesMichael S. Tsirkin
This fixes two bugs related to memory sync during migration: - ram address calculation was missing the chunk address, so the wrong page was dirtied - one after last was used instead of the end address of a region, which might overflow to 0 and cause us to skip the region when the region ends at ~0x0ull. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Tested-by: Jason Wang <jasowang@redhat.com>
2013-02-26Merge remote-tracking branch 'kwolf/for-anthony' into stagingAnthony Liguori
# By Paolo Bonzini (7) and others # Via Kevin Wolf * kwolf/for-anthony: (22 commits) pc: add compatibility machine types for 1.4 blockdev: enable discard by default qemu-nbd: add --discard option blockdev: add discard suboption to -drive block: implement BDRV_O_UNMAP block: complete all IOs before .bdrv_truncate coroutine: trim down nesting level in perf_nesting test coroutine: move pooling to common code qemu-iotests: Test qcow2 image creation options qemu-iotests: Add qemu-img compare test qemu-img: Add compare subcommand qemu-img: Add "Quiet mode" option block: Add synchronous wrapper for bdrv_co_is_allocated_above block: refuse negative iops and bps values block: use Error in do_check_io_limits() qcow2: support compressed clusters in BlockFragInfo qemu-img: add compressed clusters to BlockFragInfo qemu-img: fix missing space in qemu-img check output qcow2: record fragmentation statistics during check qcow2: introduce check_refcounts_l1/l2() flags ...
2013-02-26Merge remote-tracking branch 'quintela/stats.next' into stagingAnthony Liguori
# By Juan Quintela # Via Juan Quintela * quintela/stats.next: migration: calculate expected_downtime migration: don't account sleep time for calculating bandwidth migration: calculate end time after we have sent the data migration: change initial value of expected_downtime
2013-02-26Merge remote-tracking branch 'luiz/queue/qmp' into stagingAnthony Liguori
# By Markus Armbruster # Via Luiz Capitulino * luiz/queue/qmp: check-qjson: More thorough testing of UTF-8 in strings
2013-02-25target-ppc: Fix SUBFE carryRichard Henderson
While ~T0+T1+CF = T1-T0+CF-1 is true for the low 32-bits, it does not produce the correct carry-out to bit 33. Do exactly what the manual says. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-25target-arm: Fix sbc_CC carryRichard Henderson
While T0+~T1+CF = T0-T1+CF-1 is true for the low 32-bits, it does not produce the correct carry-out to bit 33. Do exactly what the manual says. Using the ~T1 makes the add and subtract code paths nearly identical, so have sbc_CC use adc_CC. Cc: Peter Maydell <peter.maydell@linaro.org> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-25arm/translate.c: Fix adc_CC/sbc_CC implementationPeter Crosthwaite
commits 49b4c31efcce45ab714f286f14fa5d5173f9069d and 2de68a4900ef6eb67380b0c128abfe1976bc66e8 reworked the implementation of adc_CC and sub_CC. The new implementations (on the TCG_TARGET_HAS_add2_i32 code path) are incorrect. The new logic is: CF:NF = 0:A +/- 0:CF CF:NF = CF:A +/- 0:B The lower 32 bits of the intermediate result stored in NF needs to be passes into the second addition in place of A (s/CF:A/CF:NF): CF:NF = 0:A +/- 0:CF CF:NF = CF:NF +/- 0:B This patch fixes the issue. Cc: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2013-02-23target-mips: fix for sign-issue in MULQ_W helperPetar Jovanovic
Correct sign-propagation before multiplication in MULQ_W helper. The change also fixes previously incorrect expected values in the tests for MULQ_RS.W and MULQ_S.W. Signed-off-by: Petar Jovanovic <petarj@mips.com> Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-02-23target-mips: fix for incorrect multiplication with MULQ_S.PHPetar Jovanovic
The change corrects sign-related issue with MULQ_S.PH. It also includes extension to the already existing test which will trigger the issue. Signed-off-by: Petar Jovanovic <petarj@mips.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2013-02-23target-xtensa: Use add2/sub2 for macRichard Henderson
Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-xtensa: Use mul*2 for mul*hiRichard Henderson
Cc: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-unicore32: Use mul*2 for do_multRichard Henderson
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-sh4: Use mul*2 for dmul*Richard Henderson
Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-sparc: Use mul*2 for multiplyRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-sparc: Use official add2/sub2 interfaces for addx/subxRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute mullwo without branchesRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute arithmetic shift carry without branchesRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Implement neg in terms of subfRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Use add2 for carry generationRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute addition carry with setcondRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Compute addition overflow without branchesRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Use setcond in gen_op_cmpRichard Henderson
Which means that callers need not copy data into local tmps. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Split out SO, OV, CA fields from XERRichard Henderson
In preparation for more efficient setting of these fields. Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-ppc: Use mul*2 in mulh* insnsRichard Henderson
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-cris: Use mul*2 in mul* insnsRichard Henderson
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-mips: Use mul[us]2 in [D]MULT[U] insnsRichard Henderson
Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Implement sbc_cc inlineRichard Henderson
Use sub2 if available, otherwise use 64-bit arithmetic. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Implement adc_cc inlineRichard Henderson
Use add2 if available, otherwise use 64-bit arithmetic. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Use add2 in gen_add_CCRichard Henderson
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Use mul[us]2 and add2 in umlal et alRichard Henderson
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-arm: Use mul[us]2 in gen_mul[us]_i64_i32Richard Henderson
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-s390x: Use mulu2 for mlgr insnRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-alpha: Use mulu2 for umulh insnRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Apply life analysis to 64-bit multiword arithmetic opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement muls2 with mulu2Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23target-i386: Use add2 to implement the ADX extensionRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-arm: Implement muls2_i32Richard Henderson
We even had the encoding of smull already handy... Cc: Andrzej Zaborowski <balrogg@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-i386: Implement multiword arithmetic opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement multiword addition helpersRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement multiword multiply helpersRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Implement a 64-bit to 32-bit extraction helperRichard Henderson
We're going to have use for this shortly in implementing other helpers. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add signed multiword multiplication operationsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Add 64-bit multiword arithmetic operationsRichard Henderson
Matching the 32-bit multiword arithmetic that we already have. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-sparc: Always implement 32-bit multiword opsRichard Henderson
Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg-i386: Always implement 32-bit multiword opsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-23tcg: Make 32-bit multiword operations optional for 64-bit hostsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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