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2020-10-30pci: Disallow improper BAR registration for type 1Ben Widawsky
Prevent future developers working on root complexes, root ports, or bridges that also wish to implement a BAR for those, from shooting themselves in the foot. PCI type 1 headers only support 2 base address registers. It is incorrect and difficult to figure out what is wrong with the device when this mistake is made. With this, it is immediate and obvious what has gone wrong. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201015181411.89104-2-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pci: Change error_report to assert(3)Ben Widawsky
Asserts are used for developer bugs. As registering a bar of the wrong size is not something that should be possible for a user to achieve, this is a developer bug. While here, use the more obvious helper function. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201015181411.89104-1-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2020-10-30pci: advertise a page aligned ATSJason Wang
After Linux kernel commit 61363c1474b1 ("iommu/vt-d: Enable ATS only if the device uses page aligned address."), ATS will be only enabled if device advertises a page aligned request. Unfortunately, vhost-net is the only user and we don't advertise the aligned request capability in the past since both vhost IOTLB and address_space_get_iotlb_entry() can support non page aligned request. Though it's not clear that if the above kernel commit makes sense. Let's advertise a page aligned ATS here to make vhost device IOTLB work with Intel IOMMU again. Note that in the future we may extend pcie_ats_init() to accept parameters like queue depth and page alignment. Cc: qemu-stable@nongnu.org Signed-off-by: Jason Wang <jasowang@redhat.com> Message-Id: <20200909081731.24688-1-jasowang@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pc: Implement -no-hpet as sugar for -machine hpet=onEduardo Habkost
Get rid of yet another global variable. The default will be hpet=on only if CONFIG_HPET=y. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20201021144716.1536388-1-ehabkost@redhat.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30vhost: Don't special case vq->used_phys in vhost_get_log_size()Greg Kurz
The first loop in vhost_get_log_size() computes the size of the dirty log bitmap so that it allows to track changes in the entire guest memory, in terms of GPA. When not using a vIOMMU, the address of the vring's used structure, vq->used_phys, is a GPA. It is thus already covered by the first loop. When using a vIOMMU, vq->used_phys is a GIOVA that will be translated to an HVA when the vhost backend needs to update the used structure. It will log the corresponding GPAs into the bitmap but it certainly won't log the GIOVA. So in any case, vq->used_phys shouldn't be explicitly used to size the bitmap. Drop the second loop. This fixes a crash of the source when migrating a guest using in-kernel vhost-net and iommu_platform=on on POWER, because DMA regions are put over 0x800000000000000ULL. The resulting insanely huge log size causes g_malloc0() to abort. BugLink: https://bugzilla.redhat.com/show_bug.cgi?id=1879349 Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <160208823418.29027.15172801181796272300.stgit@bahia.lan> Acked-by: Jason Wang <jasowang@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30pci: Assert irqnum is between 0 and bus->nirqs in pci_bus_change_irq_levelMark Cave-Ayland
These assertions similar to those in the adjacent pci_bus_get_irq_level() function ensure that irqnum lies within the valid PCI bus IRQ range. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201011082022.3016-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201024203900.3619498-3-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30hw/pci: Extract pci_bus_change_irq_level() from pci_change_irq_level()Philippe Mathieu-Daudé
Extract pci_bus_change_irq_level() from pci_change_irq_level() to make it clearer it operates on the bus. Reported-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201024203900.3619498-2-f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30hw/virtio/vhost-vdpa: Fix Coverity CID 1432864Philippe Mathieu-Daudé
Fix uninitialized value issues reported by Coverity: Field 'msg.reserved' is uninitialized when calling write(). Fixes: a5bd05800f8 ("vhost-vdpa: batch updating IOTLB mappings") Reported-by: Coverity (CID 1432864: UNINIT) Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20201028154004.776760-1-philmd@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30acpi/crs: Support ranges > 32b for hostsBen Widawsky
According to PCIe spec 5.0 Type 1 header space Base Address Registers are defined by 7.5.1.2.1 Base Address Registers (same as Type 0). The _CRS region should allow for the same range (up to 64b). Prior to this change, any host bridge utilizing more than 32b for the BAR would have the address truncated and likely lead to conflicts when the operating systems reads the _CRS object. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201026193924.985014-2-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2020-10-30acpi/crs: Prevent bad ranges for host bridgesBen Widawsky
Prevent _CRS resources being quietly chopped off and instead throw an assertion. _CRS is used by host bridges to declare regions of io and/or memory that they consume. On some (all?) platforms the host bridge doesn't have PCI header space and so they need some way to convey the information. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Message-Id: <20201026193924.985014-1-ben.widawsky@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Igor Mammedov <imammedo@redhat.com>
2020-10-30vhost-vsock: set vhostfd to non-blocking modeStefano Garzarella
vhost IOTLB API uses read()/write() to exchange iotlb messages with the kernel module. The QEMU implementation expects a non-blocking fd, indeed commit c471ad0e9b ("vhost_net: device IOTLB support") set it for vhost-net. Without this patch, if we enable iommu for the vhost-vsock device, QEMU can hang when exchanging IOTLB messages. As commit 894022e616 ("net: check if the file descriptor is valid before using it") did for tap, let's use qemu_try_set_nonblock() when fd is provided by the user. Signed-off-by: Stefano Garzarella <sgarzare@redhat.com> Message-Id: <20201029144849.70958-1-sgarzare@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-30vhost-vdpa: negotiate VIRTIO_NET_F_STATUS with driverSi-Wei Liu
Vendor driver may not support or implement config interrupt delivery for link status notifications. In this event, vendor driver is expected to NACK the feature, but guest will keep link always up. Signed-off-by: Si-Wei Liu <si-wei.liu@oracle.com> Message-Id: <1601582985-14944-1-git-send-email-si-wei.liu@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2020-10-29Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-5.2-20201028' ↵Peter Maydell
into staging ppc patch queue 2020-10-28 Here's the next pull request for ppc and spapr related patches, which should be the last things for soft freeze. Includes: * Numerous error handling cleanups from Greg Kurz * Cleanups to cpu realization and hotplug handling from Greg Kurz * A handful of other small fixes and cleanups This does include a change to pc_dimm_plug() that isn't in my normal areas of concern. That's there as a a prerequisite for ppc specific changes, and has an ack from Igor. # gpg: Signature made Tue 27 Oct 2020 14:13:21 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-5.2-20201028: ppc/: fix some comment spelling errors spapr: Improve spapr_reallocate_hpt() error reporting target/ppc: Fix kvmppc_load_htab_chunk() error reporting spapr: Use error_append_hint() in spapr_reallocate_hpt() spapr: Simplify error handling in spapr_memory_plug() spapr: Pass &error_abort when getting some PC DIMM properties spapr: Use appropriate getter for PC_DIMM_SLOT_PROP spapr: Use appropriate getter for PC_DIMM_ADDR_PROP pc-dimm: Drop @errp argument of pc_dimm_plug() spapr: Simplify spapr_cpu_core_realize() and spapr_cpu_core_unrealize() spapr: Make spapr_cpu_core_unrealize() idempotent spapr: Drop spapr_delete_vcpu() unused argument spapr: Unrealize vCPUs with qdev_unrealize() spapr: Fix leak of CPU machine specific data spapr: Move spapr_create_nvdimm_dr_connectors() to core machine code hw/net: move allocation to the heap due to very large stack frame ppc/spapr: re-assert IRQs during event-scan if there are pending spapr: Clarify why DR connectors aren't user creatable Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-29Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20201027-1' into staging target-arm queue: * raspi: add model of cprman clock manager * sbsa-ref: add an SBSA generic watchdog device * arm/trace: Fix hex printing * raspi: Add models of Pi 3 model A+, Pi Zero and Pi A+ * hw/arm/smmuv3: Set the restoration priority of the vSMMUv3 explicitly * Nuvoton NPCM7xx: Add USB, RNG, GPIO and watchdog support * hw/arm: fix min_cpus for xlnx-versal-virt platform * hw/arm/highbank: Silence warnings about missing fallthrough statements * linux-user: Support Aarch64 BTI * Armv7M systick: fix corner case bugs by rewriting to use ptimer # gpg: Signature made Tue 27 Oct 2020 11:27:10 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20201027-1: (48 commits) hw/timer/armv7m_systick: Rewrite to use ptimers hw/core/ptimer: Support ptimer being disabled by timer callback hw/arm/sbsa-ref: add SBSA watchdog device hw/watchdog: Implement SBSA watchdog device hw/arm/bcm2835_peripherals: connect the UART clock hw/char/pl011: add a clock input hw/misc/bcm2835_cprman: add sane reset values to the registers hw/misc/bcm2835_cprman: add the DSI0HSCK multiplexer hw/misc/bcm2835_cprman: implement clock mux behaviour hw/misc/bcm2835_cprman: add a clock mux skeleton implementation hw/misc/bcm2835_cprman: implement PLL channels behaviour hw/misc/bcm2835_cprman: add a PLL channel skeleton implementation hw/misc/bcm2835_cprman: implement PLLs behaviour hw/misc/bcm2835_cprman: add a PLL skeleton implementation hw/arm/raspi: add a skeleton implementation of the CPRMAN hw/arm/raspi: fix CPRMAN base address hw/core/clock: trace clock values in Hz instead of ns hw/core/clock: provide the VMSTATE_ARRAY_CLOCK macro arm/trace: Fix hex printing hw/arm/raspi: Add the Raspberry Pi 3 model A+ ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-29Merge remote-tracking branch 'remotes/armbru/tags/pull-qmp-2020-10-27' into ↵Peter Maydell
staging QMP patches patches for 2020-10-27 # gpg: Signature made Tue 27 Oct 2020 10:13:00 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qmp-2020-10-27: scripts/qmp: delete 'qmp' script qmp-shell: Sort by key when pretty-printing Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-29util: include the target address in socket connect failuresDaniel P. Berrangé
Reporting "Failed to connect socket" is essentially useless for a user attempting to diagnose failure. It needs to include the target address details. Similarly when failing to create a socket we should include the socket family info, so the user understands what particular feature was missing in their kernel build (IPv6, VSock in particular). Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-10-29io: Don't use '#' flag of printf formatAlexChen
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: AlexChen <alex.chen@huawei.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-10-29authz: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-10-29crypt: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-10-29io: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Signed-off-by: Daniel P. Berrangé <berrange@redhat.com>
2020-10-29modules: turn off lazy bindingGerd Hoffmann
We want missing symbols fail module load right away instead of having qemu abort later on in case lazy binding fails. Can happen -- for example -- when trying to load a module for a pci device (virtio-gpu-pci) into a qemu without pci support (qemu-system-avr). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201028054944.5772-1-kraxel@redhat.com
2020-10-29modules: unbreak them on macosGerd Hoffmann
Using the correct shared library suffix helps ;) Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201027120603.3625-1-kraxel@redhat.com
2020-10-29virtio-gpu: only compile virtio-gpu-3d.c for CONFIG_VIRGL=yGerd Hoffmann
There is no actual code in the CONFIG_VIRGL=n case. So building is (a) pointless and (b) makes macos ranlib complain. Reported-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20201026142851.28735-1-kraxel@redhat.com
2020-10-29virtio-gpu: add virtio-vga moduleGerd Hoffmann
Build virtio-gpu vga devices modular. Must be a separate module because not all qemu softmmu variants come with VGA support. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20201023064618.21409-3-kraxel@redhat.com
2020-10-29virtio-gpu: add virtio-gpu-pci moduleGerd Hoffmann
Build virtio-gpu pci devices modular. Must be a separate module because not all qemu softmmu variants come with PCI support. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201023064618.21409-2-kraxel@redhat.com
2020-10-28Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-testing-and-misc-271020-1' into staging Testing and gitdm updates - add some more individual contributors - include SDL2 in centos images - skip checkpatch check when no commits found - use random port for gdb reverse debugging - make gitlab use it's own mirrors to clone - fix detection of make -nqp # gpg: Signature made Tue 27 Oct 2020 09:55:55 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-misc-271020-1: makefile: handle -n / -k / -q correctly gitlab-ci: Clone from GitLab itself tests/acceptance: pick a random gdb port for reverse debugging scripts: fix error from checkpatch.pl when no commits are found gitlab: skip checkpatch.pl checks if no commit delta on branch tests/docker/dockerfiles/centos: Use SDL2 instead of SDL1 contrib/gitdm: Add more individual contributors Adding ani's email as an individual contributor Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-28Merge remote-tracking branch 'remotes/philmd-gitlab/tags/renesas-20201027' ↵Peter Maydell
into staging Renesas patches (SH4 and RX) - Fix few warnings (Thomas Huth) - Fix typos (Lichang Zhao, Chetan Pant) CI jobs results: . https://cirrus-ci.com/build/6368903343374336 . https://gitlab.com/philmd/qemu/-/pipelines/207919103 . https://travis-ci.org/github/philmd/qemu/builds/739133105 # gpg: Signature made Mon 26 Oct 2020 23:27:39 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/renesas-20201027: target/rx: Fix Lesser GPL version number target/rx: Fix some comment spelling errors target/sh4: fix some comment spelling errors target/sh4: Update coding style to make checkpatch.pl happy hw/timer/sh_timer: Remove superfluous "break" statements hw/timer/sh_timer: Silence warnings about missing fallthrough statements hw/timer/sh_timer: Coding style clean-up elf: Add EM_RX definition Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-28Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/linux-user-for-5.2-pull-request' into staging Update syscall numbers to 5.9-rc7 Fixes for prctl(), accept4() and xtensa # gpg: Signature made Mon 26 Oct 2020 22:02:56 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-5.2-pull-request: target/xtensa: enable all coprocessors for linux-user linux-user: correct errno returned from accept4() syscall linux-user: remove _sysctl linux-user: update syscall.tbl to Linux 5.9-rc7 linux-user: update mips/syscall-args-o32.c.inc to Linux 5.9-rc7 linux-user: update syscall_nr.h to Linux 5.9-rc7 linux-user: Support f_flags in statfs64 when available. Fix stack smashing when handling PR_GET_PDEATHSIG Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-28Revert series: virtiofsd: Announce submounts to the guestAlex Williamson
This reverts the following commits due to their basis on a bogus linux kernel header update: c93a656f7b65 ("tests/acceptance: Add virtiofs_submounts.py") 45ced7ca2f27 ("tests/acceptance/boot_linux: Accept SSH pubkey") 08dce386e77e ("virtiofsd: Announce sub-mount points") eba8b096c17c ("virtiofsd: Store every lo_inode's parent_dev") ede24b6be798 ("virtiofsd: Add fuse_reply_attr_with_flags()") e2577435d343 ("virtiofsd: Add attr_flags to fuse_entry_param") 2f10415abfc5 ("virtiofsd: Announce FUSE_ATTR_FLAGS") 97d741cc96dd ("linux/fuse.h: Pull in from Linux") Cc: Max Reitz <mreitz@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Cc: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Alex Williamson <alex.williamson@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Max Reitz <mreitz@redhat.com> Message-id: 160385090886.20017.13382256442750027666.stgit@gimli.home Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-28hw/pci-host/sabre: Simplify code initializing variable oncePhilippe Mathieu-Daudé
We only need to zero-initialize 'val' once. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-4-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28hw/pci-host/sabre: Remove superfluous address range checkPhilippe Mathieu-Daudé
The region is registered as 64KiB in sabre_init(): memory_region_init_io(&s->sabre_config, OBJECT(s), &sabre_config_ops, s, "sabre-config", 0x10000); Remove the superfluous check. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-3-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28hw/pci-host/sabre: Update documentation linkPhilippe Mathieu-Daudé
The current link redirects to https://www.oracle.com/sun/ announcing "Oracle acquired Sun Microsystems in 2010, ..." but does not give hint where to find the datasheet. Use the archived PDF on the Wayback Machine, which works. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20201012170950.3491912-2-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sabre: increase number of PCI bus IRQs from 32 to 64Mark Cave-Ayland
The rework of the sabre IRQs in commit 6864fa3897 "sun4u: update PCI topology to include simba PCI bridges" changed the IRQ routing so that both PCI and legacy OBIO IRQs are routed through the sabre PCI host bridge to the CPU. Unfortunately this commit failed to increase the number of PCI bus IRQs accordingly meaning that access to the legacy IRQs OBIO (irqnum >= 0x20) would overflow the PCI bus IRQ array causing strange failures running qemu-system-sparc64 in NetBSD. Cc: qemu-stable@nongnu.org Reported-by: Harold Gutch <logix@foobar.franken.de> Fixes: https://bugs.launchpad.net/qemu/+bug/1838658 Fixes: 6864fa3897 ("sun4u: update PCI topology to include simba PCI bridges") Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201011081347.2146-1-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28hw/display/tcx: Allow 64-bit accesses to framebuffer stippler and blitterPhilippe Mathieu-Daudé
The S24/TCX datasheet is listed as "Unable to locate" on [1]. However the NetBSD revision 1.32 of the driver introduced 64-bit accesses to the stippler and blitter [2]. It is safe to assume these memory regions are 64-bit accessible. QEMU implementation is 32-bit, so fill the 'impl' fields. Michael Lorenz (author of the NetBSD code [2]) provided us with more information in [3]: > IIRC the real hardware *requires* 64bit accesses for stipple and > blitter operations to work. For stipples you write a 64bit word into > STIP space, the address defines where in the framebuffer you want to > draw, the data contain a 32bit bitmask, foreground colour and a ROP. > BLIT space works similarly, the 64bit word contains an offset were to > read pixels from, and how many you want to copy. > > One more thing since there seems to be some confusion - 64bit accesses > on the framebuffer are fine as well. TCX/S24 is *not* an SBus device, > even though its node says it is. > S24 is a card that plugs into a special slot on the SS5 mainboard, > which is shared with an SBus slot and looks a lot like a horizontal > UPA slot. Both S24 and TCX are accessed through the Micro/TurboSPARC's > AFX bus which is 64bit wide and intended for graphics. > Early FFB docs even mentioned connecting to both AFX and UPA, > no idea if that was ever realized in hardware though. [1] http://web.archive.org/web/20111209011516/http://wikis.sun.com/display/FOSSdocs/Home [2] http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/dev/sbus/tcx.c.diff?r1=1.31&r2=1.32 [3] https://www.mail-archive.com/qemu-devel@nongnu.org/msg734928.html Cc: qemu-stable@nongnu.org Reported-by: Andreas Gustafsson <gson@gson.org> Buglink: https://bugs.launchpad.net/bugs/1892540 Fixes: 55d7bfe2293 ("tcx: Implement hardware acceleration") Tested-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Andreas Gustafsson <gson@gson.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201024205100.3623006-1-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sabre: don't call sysbus_mmio_map() in sabre_realize()Mark Cave-Ayland
The device should not map itself but instead should be mapped to sysbus by the sun4u machine. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-7-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-ledma: don't reference nd_table directly within the deviceMark Cave-Ayland
Instead use qdev_set_nic_properties() to configure the on-board NIC at the sun4m machine level. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-5-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-espdma: use object_initialize_child() for esp child objectMark Cave-Ayland
Store the child object directly within the sparc32-espdma object rather than using link properties. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-4-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-ledma: use object_initialize_child() for lance child objectMark Cave-Ayland
Store the child object directly within the sparc32-ledma object rather than using link properties. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-3-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-28sparc32-dma: use object_initialize_child() for espdma and ledma child objectsMark Cave-Ayland
Store the child objects directly within the sparc32-dma object rather than using link properties. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200926140216.7368-2-mark.cave-ayland@ilande.co.uk> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2020-10-27Merge remote-tracking branch 'remotes/philmd-gitlab/tags/led-api-20201026' ↵Peter Maydell
into staging API to model LED. CI jobs results: . https://cirrus-ci.com/build/4879251751043072 . https://gitlab.com/philmd/qemu/-/pipelines/207661784 . https://travis-ci.org/github/philmd/qemu/builds/738958191 . https://app.shippable.com/github/philmd/qemu/runs/891/summary/console # gpg: Signature made Mon 26 Oct 2020 22:03:59 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/led-api-20201026: hw/arm/tosa: Replace fprintf() calls by LED devices hw/misc/mps2-scc: Use the LED device hw/misc/mps2-fpgaio: Use the LED device hw/arm/aspeed: Add the 3 front LEDs drived by the PCA9552 #1 hw/misc/led: Emit a trace event when LED intensity has changed hw/misc/led: Allow connecting from GPIO output hw/misc/led: Add a LED device Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27Merge remote-tracking branch ↵Peter Maydell
'remotes/philmd-gitlab/tags/acceptance-testing-20201026' into staging Acceptance testing patches - More ARM tests - Documentation update CI jobs results: . https://cirrus-ci.com/build/5754555684093952 . https://gitlab.com/philmd/qemu/-/pipelines/207807648 # gpg: Signature made Mon 26 Oct 2020 19:06:52 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/acceptance-testing-20201026: docs/devel/testing.rst: Update outdated Avocado URLs tests/acceptance: Allow running Orange Pi test using cached artifacts tests/acceptance: Add a 'virt_kvm' test using the GICv3 tests/boot_linux_console: Boot Trusted Firmware-A on the Raspberry Pi 3 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-10-27accel/tcg: Add CPU_LOG_EXEC tracing for cpu_io_recompile()Peter Maydell
When using -icount, it's useful for the CPU_LOG_EXEC logging to include information about when cpu_io_recompile() was called, because it alerts the reader of the log that the tracing of a previous TB execution may not actually correspond to an actually executed instruction. For instance if you're using -icount and also -singlestep then a guest instruction that makes an IO access appears in two "Trace" lines, once in a TB that triggers the cpu_io_recompile() and then again in the TB that actually executes. (This is a similar reason to why the "Stopped execution of TB chain before..." logging in cpu_tb_exec() is helpful when trying to track execution flow in the logs.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20201013122658.4620-1-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-27tcg/optimize: Flush data at labels not TCG_OPF_BB_ENDRichard Henderson
We can easily propagate temp values through the entire extended basic block (in this case, the set of blocks connected by fallthru), simply by not discarding the register state at the branch. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-27tcg: Do not kill globals at conditional branchesRichard Henderson
We can easily register allocate the entire extended basic block (in this case, the set of blocks connected by fallthru), simply by not discarding the register state at the branch. This does not help blocks starting with a label, as they are reached via a taken branch, and that would require saving the complete register state at the branch. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-10-27CHANGELOG: remove disused fileJohn Snow
There's no reason to keep this here; the versions described are ancient. Everything here is still mirrored on https://wiki.qemu.org/ChangeLog/old if anyone is curious; otherwise, use the git history. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20201026195131.13848-1-jsnow@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-27qdev: Fix two typosMaxim Levitsky
Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201019163702.471239-2-mlevitsk@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-27scripts/qmp: delete 'qmp' scriptJohn Snow
This script has not seen a patch that was specifically for this script since it was moved to this location in 2013, and I doubt it is used. It uses "man qmp" for its help message, which does not exist. It also presumes there is a manual page for qmp-XXX, for each defined qmp command XXX. I don't think that's true. The format it expects arguments in is something like: block-dirty-bitmap-add --node=foo --name=bar and has no capacity to support nested JSON arguments, either. Most developers use either qmp-shell or socat (or pasting JSON directly into qmp stdio), so this duplication and additional alternate syntax is not helpful. Remove it. Leave a breadcrumb script just in case, to be removed next release cycle. Signed-off-by: John Snow <jsnow@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201019210430.1063390-1-jsnow@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-27cryptodev: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201014133722.14041-1-chetan4windows@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-27io: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Acked-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20201014134033.14095-1-chetan4windows@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2020-10-27cpus: Drop declaration of cpu_remove()Greg Kurz
cpu_remove() got superseded by cpu_remove_sync() in commit dbadee4ff4a0, but its prototype wasn't removed. We could possibly keep the shorter cpu_remove() naming but it seems better to highligth that this blocks until the CPU thread is joined. Fixes: dbadee4ff4a0 ("cpus: join thread when removing a vCPU") Cc: pbonzini@redhat.com Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <160268285707.1107461.15035929822602623985.stgit@bahia.lan> Signed-off-by: Laurent Vivier <laurent@vivier.eu>