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2017-11-15util/stats64: Fix min/max comparisonsMax Reitz
stat64_min_slow() and stat64_max_slow() compare the wrong way. This makes iotest 136 fail with clang and -m32. Signed-off-by: Max Reitz <mreitz@redhat.com> Message-Id: <20171114232223.25207-1-mreitz@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14cpu-exec: avoid cpu_exec_nocache infinite loop with record/replayPavel Dovgalyuk
This patch ensures that icount_decr.u32.high is clear before calling cpu_exec_nocache when exception is pending. Because the exception is caused by the first instruction in the block and it cannot be executed without resetting the flag. There are two parts in the fix. First, clear icount_decr.u32.high in cpu_handle_interrupt (just before processing the "dependent" request, stored in cpu->interrupt_request or cpu->exit_request) rather than cpu_loop_exec_tb; this ensures that cpu_handle_exception is always reached with zero icount_decr.u32.high unless another interrupt has happened in the meanwhile. Second, try to cause the exception at the beginning of cpu_handle_exception, and exit immediately if the TB cannot execute. With this change, interrupts are processed and cpu_exec_nocache can make process. Signed-off-by: Maria Klimushenkova <maria.klimushenkova@ispras.ru> Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Message-Id: <20171114081818.27640.33165.stgit@pasha-VirtualBox> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14cpu-exec: don't overwrite exception_indexPavel Dovgalyuk
This patch adds a condition before overwriting exception_index fiels. It is needed when exception_index is already set to some meaningful value. Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Message-Id: <20171114081812.27640.26372.stgit@pasha-VirtualBox> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14vhost-user-scsi: add missing virtqueue_size paramDariusz Stojaczyk
Commit 5c0919d0 [1] introduced virtqueue_size parameter for common virtio-scsi path, without updaing the vhost-user-scsi code. vhost-user-scsi devices right now report size 0 for each vq. This patch introduces virtqueue_size param to vhost-user-scsi, that can now be set by the user. However, the most importantly, it now has a default value of 128 (same as QEMU's virtio-scsi). [1] 5c0919d0 ("virtio-scsi: Add virtqueue_size parameter allowing virtqueue size to be set.") Change-Id: I70e87eab702ebf1196c028dbf17d54fdc0c89a14 Signed-off-by: Dariusz Stojaczyk <dariuszx.stojaczyk@intel.com> Message-Id: <1510676916-76409-1-git-send-email-dariuszx.stojaczyk@intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14target-i386: adds PV_TLB_FLUSH CPUID feature bitWanpeng Li
Adds PV_TLB_FLUSH CPUID feature bit. Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim KrÄmář <rkrcmar@redhat.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Wanpeng Li <wanpeng.li@hotmail.com> Message-Id: <1510299947-11287-1-git-send-email-wanpeng.li@hotmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14thread-posix: fix qemu_rec_mutex_trylock macroEmilio G. Cota
We never noticed because it has no users. Signed-off-by: Emilio G. Cota <cota@braap.org> Message-Id: <1510273811-13419-1-git-send-email-cota@braap.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14Makefile: simpler/faster "make help"Philippe Mathieu-Daudé
Using obscure black magic introduced in eaa2ddbb767 :) In an out-of-tree directory, running "../configure && make help" will generate some required files (.mak), then clone some submodules, compile at least the capstone submodule, generate QMP and Trace files, and finally display the help. On an outdated computer (Sun Blade workstation), running "make help" took more than 5h :) With this patch it took roughly 37min. Suggested-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20171108032052.20029-1-f4bug@amsat.org> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-14ioapic/tracing: Remove last DPRINTFsDr. David Alan Gilbert
Remove the last few DPRINTFs from hw/intc/ioapic.c and turn them into tracing. In one case it's a new trace, in the others it's just adding a parameter to the existing traces. Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Message-Id: <20171102180310.24760-1-dgilbert@redhat.com> Reviewed-by: Peter Xu <peterx@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-06Enable 8-byte wide MMIO for 16550 serial devicesMike Nawrocki
Some drivers for the PPMC7400 PowerPC evaluation board accesses the serial registers through the floating point unit (stfd/ldfd), which is an 8-byte wide access. This patch enables that behavior. Signed-off-by: Mike Nawrocki <michael.nawrocki@gtri.gatech.edu> Message-Id: <20171106161039.32596-1-michael.nawrocki@gtri.gatech.edu> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-06Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell
staging # gpg: Signature made Mon 06 Nov 2017 11:20:18 GMT # gpg: using RSA key 0x9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: aio-posix: drop QEMU_AIO_POLL_MAX_NS env var Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-06aio-posix: drop QEMU_AIO_POLL_MAX_NS env varStefan Hajnoczi
This hunk should not have been merged but I forgot to remove it. Let's remove it before it slips into a QEMU release. ¯\_(ツ)_/¯ Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20171103154041.12617-1-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-11-06Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into stagingPeter Maydell
* Remove legacy KVM PCI device assignment * Fix qemu-pr-helper.c compilation on older compilers # gpg: Signature made Sun 05 Nov 2017 13:52:36 GMT # gpg: using RSA key 0xBFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: build: disable -Wmissing-braces on older compilers pci-assign: Remove Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-05build: disable -Wmissing-braces on older compilersPaolo Bonzini
GCC 4.9 and newer stopped warning for missing braces around the "universal" C zero initializer {0}. One such initializer sneaked into scsi/qemu-pr-helper.c and is breaking the build with such older GCC versions. Detect the lack of support for the idiom, and disable the warning in that case. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-05pci-assign: RemovePaolo Bonzini
Legacy PCI device assignment has been removed from Linux in 4.12, and had been deprecated 2 years ago there. We can remove it from QEMU as well. The ROM loading code was shared with Xen PCI passthrough, so move it to hw/xen. Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2017-11-03Merge remote-tracking branch ↵Peter Maydell
'remotes/stsquad/tags/pull-ci-updates-for-softfreeze-021117-2' into staging One fix for win32/64 cross compiles. # gpg: Signature made Thu 02 Nov 2017 11:55:46 GMT # gpg: using RSA key 0xFBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-ci-updates-for-softfreeze-021117-2: docker: add python stdlib dependency (required by keycodemapdb) Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-03Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20171103' into stagingPeter Maydell
Queued tcg patches # gpg: Signature made Fri 03 Nov 2017 08:37:58 GMT # gpg: using RSA key 0x64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-tcg-20171103: cpu-exec: Exit exclusive region on longjmp from step_atomic tcg/s390x: Use constant pool for prologue tcg: Allow constant pool entries in the prologue Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-03cpu-exec: Exit exclusive region on longjmp from step_atomicPeter Maydell
Commit ac03ee5331612e44be narrowed the scope of the exclusive region so it only covers when we're executing the TB, not when we're generating it. However it missed that there is more than one execution path out of cpu_tb_exec -- if the atomic insn causes an exception then the code will longjmp out, skipping the code to end the exclusive region. This causes QEMU to hang the next time the CPU calls start_exclusive(), waiting for itself to exit the region. Move the "end the region" code out to the end of the function so that it is run for both normal exit and also for exit-via-longjmp. We have to use a volatile bool flag to decide whether we need to end the region, because we can longjump out of the codegen as well as the execution. (For some reason this only reproduces for me with a clang optimized build, not a gcc debug build.) Reviewed-by: Emilio G. Cota <cota@braap.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Fixes: ac03ee5331612e44beb393df2b578c951d27dc0d Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <1509640536-32160-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-11-03tcg/s390x: Use constant pool for prologueRichard Henderson
Rather than have separate code only used for guest_base, rely on a recent change to handle constant pool entries. Cc: qemu-s390x@nongnu.org Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-11-03tcg: Allow constant pool entries in the prologueRichard Henderson
Both ARMv6 and AArch64 currently may drop complex guest_base values into the constant pool. But generic code wasn't expecting that, and the pool is not emitted. Correct that. Tested-by: Emilio G. Cota <cota@braap.org> Tested-by: Laurent Desnogues <laurent.desnogues@gmail.com> Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2017-11-02oslib-posix: Use sysctl(2) call to resolve exec_dir on NetBSDKamil Rytarowski
NetBSD 8.0(beta) ships with KERN_PROC_PATHNAME in sysctl(2). Older NetBSD versions can use argv[0] parsing fallback. This code section is partly shared with FreeBSD. Signed-off-by: Kamil Rytarowski <n54@gmx.com> Message-id: 20171028194833.23858-1-n54@gmx.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-02ui/cocoa.m: Fix console selection keysJohn Arbuckle
Fix console selection keys so that the right console is selected. Signed-off-by: John Arbuckle <programmingkidx@gmail.com> Message-id: 20171005190449.15591-1-programmingkidx@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-11-02docker: add python stdlib dependency (required by keycodemapdb)Philippe Mathieu-Daudé
Since 927128222b0a QEMU depends of keycodemapdb, which uses the python 'csv' module from stdlib to parse keymaps.csv. Without this package the build fails: GEN ui/input-keymap-linux-to-qcode.c Traceback (most recent call last): File "ui/keycodemapdb/tools/keymap-gen", line 15, in <module> import csv ImportError: No module named csv GEN ui/input-keymap-qcode-to-qnum.c Traceback (most recent call last): File "ui/keycodemapdb/tools/keymap-gen", line 15, in <module> import csv ImportError: No module named csv [...] CC ui/input-keymap.o ui/input-keymap.c:8:44: fatal error: ui/input-keymap-linux-to-qcode.c: No such file or directory make: *** [ui/input-keymap.o] Error 1 Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
2017-11-02Merge remote-tracking branch 'remotes/jnsnow/tags/ide-pull-request' into stagingPeter Maydell
# gpg: Signature made Tue 31 Oct 2017 23:01:18 GMT # gpg: using RSA key 0x7DEF8106AAFC390E # gpg: Good signature from "John Snow (John Huston) <jsnow@redhat.com>" # Primary key fingerprint: FAEB 9711 A12C F475 812F 18F2 88A9 064D 1835 61EB # Subkey fingerprint: F9B7 ABDB BCAC DF95 BE76 CBD0 7DEF 8106 AAFC 390E * remotes/jnsnow/tags/ide-pull-request: ide: avoid referencing NULL dev in rotational rate setting hw/ide/ahci: Move allwinner code into a separate file Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31ide: avoid referencing NULL dev in rotational rate settingDaniel P. Berrange
The 'dev' variable can be NULL when the guest OS calls identify on an IDE unit that does not have a drive attached to it. Signed-off-by: Daniel P. Berrange <berrange@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20171020091403.1479-1-berrange@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2017-10-31Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into ↵Peter Maydell
staging qemu-sparc update # gpg: Signature made Tue 31 Oct 2017 17:43:11 GMT # gpg: using RSA key 0x5BC2C56FAE0F321F # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * remotes/mcayland/tags/qemu-sparc-signed: sun4m: change TYPE_SUN4M_IOMMU macro from "iommu" to "sun4m-iommu" sun4m_iommu: remove legacy sparc_iommu_memory_rw() function sparc32_dma: switch over to using IOMMU memory region and DMA API sun4m: implement IOMMU translation using IOMMU memory region sparc32_dma: add len to esp/le DMA memory tracing sparc32_dma: remove is_ledma hack and replace with memory region alias sparc32_dma: introduce new SPARC32_DMA type container object sparc32_dma: make lance device child of ledma device lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.h sparc32_dma: make esp device child of espdma device esp: move TYPE_ESP and SysBusESPState from esp.c to esp.h sparc32_dma: use object link instead of qdev property to pass IOMMU reference sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.h sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init() sparc32_dma: move type declarations from sparc32_dma.c to sparc32_dma.h sparc32_dma: split esp and le into separate DMA devices sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICE Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31hw/ide/ahci: Move allwinner code into a separate fileThomas Huth
The allwinner code is only needed for the allwinner board (for which we also have a separate CONFIG_ALLWINNER_A10 config switch), so it does not make sense that we compile this for all the other boards that need AHCI, too. Let's move it to a separate file that is only compiled when CONFIG_ALLWINNER_A10 is set. Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1508784509-29377-1-git-send-email-thuth@redhat.com Signed-off-by: John Snow <jsnow@redhat.com>
2017-10-31sun4m: change TYPE_SUN4M_IOMMU macro from "iommu" to "sun4m-iommu"Mark Cave-Ayland
This is a legacy artifact from when the sun4m IOMMU implementation was the only IOMMU available within QEMU. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2017-10-31sun4m_iommu: remove legacy sparc_iommu_memory_rw() functionMark Cave-Ayland
With the switch to the IOMMU memory region and DMA API, this is no longer required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2017-10-31sparc32_dma: switch over to using IOMMU memory region and DMA APIMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2017-10-31sun4m: implement IOMMU translation using IOMMU memory regionMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2017-10-31sparc32_dma: add len to esp/le DMA memory tracingMark Cave-Ayland
This is surprisingly useful when trying to debug DMA issues. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: remove is_ledma hack and replace with memory region aliasMark Cave-Ayland
This hack originated from before the memory region API was introduced, and increased the size of the ledma DMA device to capture incorrect accesses beyond the end of the ledma device. A full analysis can be found on Artyom's blog at http://tyom.blogspot.co.uk/2010/10/bug-in-all-solaris-versions-after-57.html. With the memory API we can now simply alias the incorrect access onto its intended destination allowing us to remove the hack. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: introduce new SPARC32_DMA type container objectMark Cave-Ayland
Create a new SPARC32_DMA container object (including an appropriate container memory region) and add instances of the SPARC32_ESPDMA_DEVICE and SPARC32_LEDMA_DEVICE as child objects. The benefit is that most of the gpio wiring complexity between esp/espdma and lance/ledma is now hidden within the SPARC32_DMA realize function. Since the sun4m IOMMU is already QOMified we can find a reference to it using object_resolve_path_type() allowing us to completely remove all external references to the iommu pointer. Finally we rework sun4m's sparc32_dma_init() to invoke the new SPARC32_DMA object and wire up the remaining board memory regions/IRQs. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: make lance device child of ledma deviceMark Cave-Ayland
This makes it possible to reference the lance device from the ledma device as required. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31lance: move TYPE_LANCE and SysBusPCNetState from lance.c to lance.hMark Cave-Ayland
This enables them to be used outside of lance.c. We also update the comment to refer to the SPARC32 lance device rather than the AMD PCNet-II device (of which lance is a register-compatible subset). Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Jason Wang <jasowang@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: make esp device child of espdma deviceMark Cave-Ayland
This makes it possible to reference the esp device from the espdma device as required, and by wiring up the device ourselves in sun4m.c we can drop use of the esp_init() function. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31esp: move TYPE_ESP and SysBusESPState from esp.c to esp.hMark Cave-Ayland
This enables them to be used outside of esp.c. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: use object link instead of qdev property to pass IOMMU referenceMark Cave-Ayland
This enables us to remove the last remaining (opaque) qdev property. Whilst we are here, also update iommu_init() to use TYPE_SUN4M_IOMMU instead of a hardcoded string. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sun4m_iommu: move TYPE_SUN4M_IOMMU declaration to sun4m.hMark Cave-Ayland
This is in preparation to allow the type to be used elsewhere. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sun4m: move DMA device wiring from sparc32_dma_init() to sun4m_hw_init()Mark Cave-Ayland
By using the sysbus interface it is possible to wire up the esp/le devices to the sun4m DMA controller directly during sun4m_hw_init() instead of passing qemu_irqs into the sparc32_dma_init() function. This is an intermediate step to allow further reorganisation as more logic is moved into the relevant SPARC32 DMA devices; there will be a final refactoring of sparc32_dma_init() once this work is complete. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: move type declarations from sparc32_dma.c to sparc32_dma.hMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: split esp and le into separate DMA devicesMark Cave-Ayland
Due to slight differences in behaviour accessing the registers for the esp and le devices, create two separate SPARC32_DMA_DEVICE types and update the sun4m machine to use. Note that by using different device types we already know the size of the register block and the value of is_ledma at init time, allowing us to drop the SPARC32_DMA_DEVICE realize function and the is_ledma device property. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31sparc32_dma: rename SPARC32_DMA type to SPARC32_DMA_DEVICEMark Cave-Ayland
Also update the function names to match as appropriate. While we're here rename the type from sparc32_dma to sparc32-dma in order to match the current QOM convention. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Artyom Tarasenko <atar4qemu@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-10-31Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20171031' into staging target-arm queue: * fix instruction-length bit in syndrome for WFI/WFE traps * xlnx-zcu102: Specify the max number of CPUs * msf2: Remove dead code reported by Coverity * msf2: Wire up SYSRESETREQ in SoC for system reset * hw/pci-host/gpex: Improve INTX to gsi routing error checking # gpg: Signature made Tue 31 Oct 2017 13:10:02 GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20171031: hw/pci-host/gpex: Improve INTX to gsi routing error checking msf2: Wire up SYSRESETREQ in SoC for system reset msf2: Remove dead code reported by Coverity xlnx-zcu102: Specify the max number of CPUs fix WFI/WFE length in syndrome register Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31Merge remote-tracking branch 'remotes/ericb/tags/pull-nbd-2017-10-30' into ↵Peter Maydell
staging nbd patches for 2017-10-30 Vladimir Sementsov-Ogievskiy (some patches co-authored by Eric Blake): 00/12 nbd minimal structured read # gpg: Signature made Mon 30 Oct 2017 20:54:54 GMT # gpg: using RSA key 0xA7A16B4A2527436A # gpg: Good signature from "Eric Blake <eblake@redhat.com>" # gpg: aka "Eric Blake (Free Software Programmer) <ebb9@byu.net>" # gpg: aka "[jpeg image of size 6874]" # Primary key fingerprint: 71C2 CC22 B1C4 6029 27D2 F3AA A7A1 6B4A 2527 436A * remotes/ericb/tags/pull-nbd-2017-10-30: nbd: Minimal structured read for client nbd: Move nbd_read() to common header nbd/client: prepare nbd_receive_reply for structured reply nbd/client: refactor nbd_receive_starttls nbd/server: Include human-readable message in structured errors nbd: Minimal structured read for server nbd/server: Refactor zero-length option check nbd/server: Simplify nbd_negotiate_options loop nbd/server: Report error for write to read-only export nbd: Expose constants and structs for structured read nbd: Move nbd_errno_to_system_errno() to public header nbd: Include error names in trace messages Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31hw/pci-host/gpex: Improve INTX to gsi routing error checkingEric Auger
We exposed gpex_set_irq_num() for machines to set the INTx to GSI routing. However if the machine forgets to call that function we currently do not check the association was properly done. Let's initialize gsi values to -1 and if this value is found in gpex_route_intx_pin_to_irq, set the routing mode as disabled. Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 1508776211-22175-1-git-send-email-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31msf2: Wire up SYSRESETREQ in SoC for system resetSubbaraya Sundeep
Implemented system reset by creating SYSRESETREQ gpio out from nvic. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Message-id: 1509253165-7434-1-git-send-email-sundeep.lkml@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31msf2: Remove dead code reported by CoveritySubbaraya Sundeep
Fixed incorrect frame size mask, validated maximum frame size in spi_write and removed dead code. Signed-off-by: Subbaraya Sundeep <sundeep.lkml@gmail.com> Reviewed-by: Darren Kenny <darren.kenny@oracle.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1508898544-10307-1-git-send-email-sundeep.lkml@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31xlnx-zcu102: Specify the max number of CPUsAlistair Francis
Specify the number of CPUs that can run on ZynqMP. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-10-31fix WFI/WFE length in syndrome registerStefano Stabellini
WFI/E are often, but not always, 4 bytes long. When they are, we need to set ARM_EL_IL_SHIFT in the syndrome register. Pass the instruction length to HELPER(wfi), use it to decrement pc appropriately and to pass an is_16bit flag to syn_wfx, which sets ARM_EL_IL_SHIFT if needed. Set dc->insn in both arm_tr_translate_insn and thumb_tr_translate_insn. Signed-off-by: Stefano Stabellini <sstabellini@kernel.org> Message-id: alpine.DEB.2.10.1710241055160.574@sstabellini-ThinkPad-X260 [PMM: move setting of dc->insn for Thumb so it is correct for 32 bit insns] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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