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2014-06-23tcg-ppc: Merge cache-utils into the backendRichard Henderson
As a "utility", it only supported ppc, and in a way that other tcg backends provided directly in tcg-target.h. Removing this disparity is easier now that the two ppc backends are merged. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23qemu/osdep: Remove the need for qemu_init_auxvalRichard Henderson
Instead of getting backup auxv data from the env pointer given to main, read it from /proc/self/auxv. We can do this at any time, so we're not tied to any ordering wrt a call to qemu_init_auxval from main. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc: Rename the tcg/ppc64 backendRichard Henderson
The other tcg backends that support 32- and 64-bit modes use the 32-bit name for the port. Follow suit. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc: Remove the backendRichard Henderson
Vectoring the 32-bit build to the ppc64 directory. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Merge ppc32 shiftsRichard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Support mulsh_i32Richard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Merge ppc32 register usageRichard Henderson
Good enough to run some instructions before things go awry. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Merge ppc32 qemu_ld/stRichard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Merge ppc32 brcond2, setcond2, muluhRichard Henderson
Now passes tcg_add_target_add_op_defs assertions, but not complete enough to function. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Begin merging ppc32 with ppc64Richard Henderson
Just enough to compile, assuming you edit config-host.mak manually. It will still abort at runtime, due to missing brcond2, setcond2, mulu2. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Fix sub2 implementationRichard Henderson
All sorts of confusion on argument ordering. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Merge 32-bit ABIs into the prologue / frame codeRichard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Adjust tcg_out_call for ELFv2Ulrich Weigand
The new ELFv2 ABI, used by default on powerpc64le-linux hosts, introduced some changes that are incompatible with code currently generated by the ppc64 TGC target. In particular, we no longer use function descriptors. This patch adds support for the ELFv2 ABI in the ppc64 TGC function call and function prologue sequences. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Ulrich Weigand <ulrich.weigand@de.ibm.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Support the ppc64 elfv2 ABIRichard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Use the correct test in tcg_out_callRichard Henderson
The correct test uses the _CALL_AIX macro, not a host-specific macro. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Better parameterize the stack frameRichard Henderson
In preparation for supporting other ABIs. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Fix TCG_TARGET_CALL_STACK_OFFSETRichard Henderson
The calling convention reserves space for the 8 register parameters on the stack, so using only 6*8=48 as the offset was wrong. We never saw this bug because we don't have any helpers with more than 5 parameters. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Move call macros out of tcg-target.hRichard Henderson
These values are private to tcg.c; we don't need to expose this nonsense to the translators. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Make TCG_AREG0 and TCG_REG_CALL_STACK enum constantsRichard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Use tcg_out_{ld,st,cmp} internallyRichard Henderson
Rather than using tcg_out32 and opcodes directly. This allows us to remove LD_ADDR and CMP_L macros. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Relax register restrictions in tcg_out_mem_longRichard Henderson
In order to be able to use tcg_out_ld/st sensibly with scratch registers, assert only when we'd incorrectly clobber a scratch. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Move functions aroundRichard Henderson
Code movement only. This will allow us to make use of the other tcg_out_* functions in tidying their implementations. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc64: Avoid some hard-codings of TCG_TYPE_I64Richard Henderson
Using more appropriate _PTR or _REG where possible. Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23tcg-ppc: Use uintptr_t in ppc_tb_set_jmp_targetRichard Henderson
Tested-by: Tom Musta <tommusta@gmail.com> Signed-off-by: Richard Henderson <rth@twiddle.net>
2014-06-23Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell
staging Block pull request # gpg: Signature made Mon 23 Jun 2014 09:53:49 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/block-pull-request: block: asynchronously stop the VM on I/O errors vl: allow other threads to do qemu_system_vmstop_request sheepdog: fix NULL dereference in sd_create QemuOpts: check NULL opts in qemu_opt_get functions block: m25p80: Support read only bdrvs. block: m25p80: sync_page(): Deindent function body. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into stagingPeter Maydell
* remotes/mcayland/qemu-sparc: apb: Fix out-of-bounds array write access Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23Merge remote-tracking branch 'remotes/mcayland/qemu-openbios' into stagingPeter Maydell
* remotes/mcayland/qemu-openbios: Update OpenBIOS images Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23console: move chardev declarations to sysemu/char.hMichael S. Tsirkin
move generic chardev APIs to sysemu/char.h, to make them available to callers which can not depend on the whole of ui/console.h. This fixes a build error on systems without pixman-devel: ./configure --disable-tools --disable-docs --target-list=arm-linux-user ... pixman none ... make ... In file included from /data/home/nchip/linaro/qemu/include/ui/console.h:4:0, from /data/home/nchip/linaro/qemu/stubs/vc-init.c:2: /data/home/nchip/linaro/qemu/include/ui/qemu-pixman.h:14:20: fatal error: pixman.h: No such file or directory #include <pixman.h> ^ compilation terminated. Reported-by: Riku Voipio <riku.voipio@iki.fi> Tested-by: Riku Voipio <riku.voipio@iki.fi> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1403508500-32691-1-git-send-email-mst@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-23block: asynchronously stop the VM on I/O errorsPaolo Bonzini
With virtio-blk dataplane, I/O errors might occur while QEMU is not in the main I/O thread. However, it's invalid to call vm_stop when we're neither in a VCPU thread nor in the main I/O thread, even if we were to take the iothread mutex around it. To avoid this problem, we can raise a request to the main I/O thread, similar to what QEMU does when vm_stop is called from a CPU thread. We know that bdrv_error_action is called from an AIO callback, and the moment at which the callback will fire is not well-defined; it depends on the moment at which the disk or OS finishes the operation, which can happen at any time. Note that QEMU is certainly not in a CPU thread and we do not need to call cpu_stop_current() like vm_stop() does. However, we need to ensure that any action taken by management will result in correct detection of the error _and_ a running VM. In particular: - the event must be raised after the iostatus has been set, so that "info block" will return an iostatus that matches the event. - the VM must be stopped after the iostatus has been set, so that "info block" will return an iostatus that matches the runstate. The ordering between the STOP and BLOCK_IO_ERROR events is preserved; BLOCK_IO_ERROR is documented to come first. This makes bdrv_error_action() thread safe (assuming QMP events are, which is attacked by a separate series). Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-23vl: allow other threads to do qemu_system_vmstop_requestPaolo Bonzini
There patch protects vmstop_requested with a lock and introduces qemu_system_vmstop_request_prepare. Together with the new call to qemu_vmstop_requested in vm_start, qemu_system_vmstop_request_prepare avoids a race where the VM could remain stopped even though the iostatus of a block device has already been set (for example). qemu_system_vmstop_request_prepare however also lets the caller thread delay observation of the state change until it has itself communicated that change to the user. This delay avoids any possibility of a wrong reordering of the BLOCK_IO_ERROR event and the subsequent STOP event. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-23sheepdog: fix NULL dereference in sd_createLiu Yuan
Following command qemu-img create -f qcow2 sheepdog:test 20g will cause core dump because aio_context is NULL in sd_create. We should initialize it by qemu_get_aio_context() to avoid NULL dereference. Cc: qemu-devel@nongnu.org Cc: Kevin Wolf <kwolf@redhat.com> Cc: Stefan Hajnoczi <stefanha@redhat.com> Signed-off-by: Liu Yuan <namei.unix@gmail.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-21QemuOpts: check NULL opts in qemu_opt_get functionsChunyan Liu
Some places will call bdrv_create_file(filename, NULL, &local_err), where opts is NULL. Check NULL in qemu_opt_get and qemu_opt_get_*_del functions, to avoid extra effort of checking opts before calling them every time. Signed-off-by: Chunyan Liu <cyliu@suse.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-21block: m25p80: Support read only bdrvs.Peter Crosthwaite
By just never doing write-backs. This is completely invisible to the guest, as the entire storage area is implemented as device state (at realize time the entire drive is read in). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-21block: m25p80: sync_page(): Deindent function body.Peter Crosthwaite
sync_page() was conditionalizing it's whole fn body on the bdrv being non-null. Just return for the function immediately on NULL brdv and get rid of the big if. Makes implementation consistent with flash_zynq_area(). Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2014-06-20Update OpenBIOS imagesMark Cave-Ayland
Update OpenBIOS images to SVN r1306 built from submodule. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-20apb: Fix out-of-bounds array write accessStefan Weil
The array regs is declared with IOMMU_NREGS (3) elements and accessed using IOMMU_CTRL (0) and IOMMU_BASE (8). In most cases, those values are right shifted before being used as an index which results in indices 0 and 1. In one case, this right shift was missing for IOMMU_BASE which results in an out-of-bounds write access with index 8. The patch adds the missing shift operation also for IOMMU_CTRL where it is needed only for cosmetic reasons. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-20gt64xxx_pci: Add VMStateDescriptionSanjay Lal
Add VMStateDescription for GT64120 PCI emulation used by the Malta platform, to allow it to work with savevm/loadvm and live migration. The entire register array is saved/restored using VMSTATE_UINT32_ARRAY (fixed length GT_REGS = 1024). Signed-off-by: Sanjay Lal <sanjayl@kymasys.com> [james.hogan@imgtec.com: Convert to VMState] Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Andreas Färber <afaerber@suse.de> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2014-06-20target-mips: copy CP0_Config1 into DisasContextAurelien Jarno
In order to avoid access to the CPUMIPSState structure in the translator, keep a copy of CP0_Config1 into DisasContext. The whole register is read-only so it can be copied as a single value. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2014-06-20Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell
* remotes/kvm/uq/master: hw/mips: malta: Don't boot from flash with KVM T&E MAINTAINERS: Add entry for MIPS KVM target-mips: Enable KVM support in build system hw/mips: malta: Add KVM support hw/mips: In KVM mode, inject IRQ2 (I/O) interrupts via ioctls target-mips: Call kvm_mips_reset_vcpu() from mips_cpu_reset() target-mips: kvm: Add main KVM support for MIPS kvm: Allow arch to set sigmask length target-mips: get_physical_address: Add KVM awareness target-mips: get_physical_address: Add defines for segment bases hw/mips: Add API to convert KVM guest KSEG0 <-> GPA hw/mips/cputimer: Don't start periodic timer in KVM mode target-mips: Reset CPU timer consistently KVM: Fix GSI number space limit Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc,pci,virtio,hotplug fixes, enhancements numa work by Hu Tao and others memory hotplug by Igor vhost-user by Nikolay, Antonios and others guest virtio announcements by Jason qtest fixes by Sergey qdev hotplug fixes by Paolo misc other fixes mostly by myself Signed-off-by: Michael S. Tsirkin <mst@redhat.com> * remotes/mst/tags/for_upstream: (109 commits) numa: use RAM_ADDR_FMT with ram_addr_t qapi/string-output-visitor: fix bugs tests: simplify code qapi: fix input visitor bugs acpi: rephrase comment qmp: add ACPI_DEVICE_OST event handling qmp: add query-acpi-ospm-status command acpi: implement ospm_status() method for PIIX4/ICH9_LPC devices acpi: introduce TYPE_ACPI_DEVICE_IF interface qmp: add query-memory-devices command numa: handle mmaped memory allocation failure correctly pc: acpi: do not hardcode preprocessor qmp: clean out whitespace qdev: recursively unrealize devices when unrealizing bus qdev: reorganize error reporting in bus_set_realized qapi: fix build on glib < 2.28 qapi: make string output visitor parse int list qapi: make string input visitor parse int list tests: fix memory leak in test of string input visitor hmp: add info memdev ... Conflicts: include/hw/i386/pc.h [PMM: fixed minor conflict in pc.h] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20140619' into staging target-arm: * Support PSCI 0.2 when using KVM * fix AIRCR reset value for v7M CPUs * report correct size information for pflash_cfi01 * minor coverity fixes * avoid warnings on Windows builds due to #define clash * implement TTBCR PD0/PD1 bits # gpg: Signature made Thu 19 Jun 2014 18:35:06 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140619: armv7m_nvic: fix AIRCR implementation Use PSCI v0.2 compatible string when KVM or TCG provides it target-arm: Introduce per-CPU field for PSCI version target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64 target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possible target-arm: Common kvm_arm_vcpu_init() for KVM ARM and KVM ARM64 kvm: Handle exit reason KVM_EXIT_SYSTEM_EVENT hw/block/pflash_cfi01: Report correct size info for parallel configs hw/arm/vexpress: Forbid specifying flash contents in two ways at once target-arm/translate-a64.c: Fix dead ?: in handle_simd_shift_fpint_conv() target-arm/translate-a64.c: Remove dead ?: in disas_simd_3same_int() target-arm: Add ULL suffix to calculation of page size hw/arm/spitz: Avoid clash with Windows header symbol MOD_SHIFT target-arm: implement PD0/PD1 bits for TTBCR Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch 'remotes/kraxel/tags/pull-vnc-20140619-1' into ↵Peter Maydell
staging vnc: cleanups and fixes # gpg: Signature made Thu 19 Jun 2014 12:02:09 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-vnc-20140619-1: vnc: fix screen updates vnc: Drop superfluous conditionals around g_strdup() vnc: Drop superfluous conditionals around g_free() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20spice: fix 32bit buildGerd Hoffmann
Tested-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 1403244764-8622-1-git-send-email-kraxel@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20Merge remote-tracking branch 'remotes/rth/tcg-next' into stagingPeter Maydell
* remotes/rth/tcg-next: tcg/optimize: Don't special case TCG_OPF_CALL_CLOBBER Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-20hw/mips: malta: Don't boot from flash with KVM T&EJames Hogan
In KVM trap & emulate (T&E) mode the flash reset region at 0xbfc00000 isn't executable, which is why the minimal kernel bootloader is loaded and executed from the last 1MB of DRAM instead. Therefore if no kernel is provided on the command line and KVM is enabled, exit with an error since booting from flash will fail. Reported-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-19armv7m_nvic: fix AIRCR implementationOran Avraham
The returned reset value was wrong (off by one zero nibble), and qemu didn't log unimplemented writes to the PRIGROUP field. Signed-off-by: Oran Avraham <oranav@gmail.com> Message-id: 1403010447-4627-1-git-send-email-oranav@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19Use PSCI v0.2 compatible string when KVM or TCG provides itPranavkumar Sawargaonkar
If we have PSCI v0.2 emulation available for KVM ARM/ARM64 or TCG then we need to provide PSCI v0.2 compatible string via generated DTB. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Rob Herring <rob.herring@linaro.org> Message-id: 1402901605-24551-9-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Introduce per-CPU field for PSCI versionPranavkumar Sawargaonkar
We require to know the PSCI version available to given CPU at potentially many places. Currently, we need to know PSCI version when generating DTB for virt machine. This patch introduce per-CPU 32bit field representing the PSCI version available to the CPU. The encoding of this 32bit field is same as described in PSCI v0.2 spec. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-8-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Implement kvm_arch_reset_vcpu() for KVM ARM64Pranavkumar Sawargaonkar
To implement kvm_arch_reset_vcpu(), we simply re-init the VCPU using kvm_arm_vcpu_init() so that all registers of VCPU are set to their reset values by in-kernel KVM code. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-7-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-19target-arm: Enable KVM_ARM_VCPU_PSCI_0_2 feature when possiblePranavkumar Sawargaonkar
Latest linux kernel supports in-kernel emulation of PSCI v0.2 but to enable it we need to select KVM_ARM_VCPU_PSCI_0_2 feature using KVM_ARM_VCPU_INIT ioctl. Also, we can use KVM_ARM_VCPU_PSCI_0_2 feature for VCPU only when linux kernel has KVM_CAP_ARM_PSCI_0_2 capability. This patch updates kvm_arch_init_vcpu() to enable KVM_ARM_VCPU_PSCI_0_2 feature for VCPU when KVM ARM/ARM64 has KVM_CAP_ARM_PSCI_0_2 capability. Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org> Signed-off-by: Anup Patel <anup.patel@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1402901605-24551-6-git-send-email-pranavkumar@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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