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2013-02-16cpu: Add CPUArchState pointer to CPUStateAndreas Färber
The target-specific ENV_GET_CPU() macros have allowed us to navigate from CPUArchState to CPUState. The reverse direction was not supported. Avoid introducing CPU_GET_ENV() macros by initializing an untyped pointer that is initialized in derived instance_init functions. The field may not be called "env" due to it being poisoned. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cputlb: Pass CPUState to cpu_unlink_tb()Andreas Färber
CPUArchState is no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Move current_tb field to CPUStateAndreas Färber
Explictly NULL it on CPU reset since it was located before breakpoints. Change vapic_report_tpr_access() argument to CPUState. This also resolves the use of void* for cpu.h independence. Change vAPIC patch_instruction() argument to X86CPU. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Move exit_request field to CPUStateAndreas Färber
Since it was located before breakpoints field, it needs to be reset. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Move running field to CPUStateAndreas Färber
Pass CPUState to cpu_exec_{start,end}() functions. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Move host_tid field to CPUStateAndreas Färber
Change gdbstub's cpu_index() argument to CPUState now that CPUArchState is no longer used. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-cris: Introduce CRISCPU subclassesAndreas Färber
Use class_init functions to initialize the VR in preparation for overriding v32+ behavior there. Move cpu_cris_init() to cpu.c and hook up a class_by_name callback. This change leads to unknown -cpu model names no longer falling back to a CPU with VR 32 but instead returning NULL. Acked-by: Edgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-m68k: Pass M68kCPU to m68k_set_irq_level()Andreas Färber
Simplifies use of cpu_reset_interrupt() et al. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16mcf_intc: Pass M68kCPU to mcf_intc_init()Andreas Färber
Store it in mcf_intc_state. Prepares for passing it to m68k_set_irq_level(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16mcf5206: Pass M68kCPU to mcf5206_init()Andreas Färber
Store it in m5206_mbar_state. Prepares for passing M68kCPU to m68k_set_irq_level(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-m68k: Return M68kCPU from cpu_m68k_init()Andreas Färber
Turn cpu_init() into a static inline function for backwards compatibility. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16ppc405_uc: Pass PowerPCCPU to ppc40x_{core,chip,system}_reset()Andreas Färber
Prepares for changing cpu_interrupt() argument to CPUState. Signed-off-by: Andreas Färber <afaerber@suse.de> Acked-by: Alexander Graf <agraf@suse.de>
2013-02-16target-xtensa: Move TCG initialization to XtensaCPU initfnAndreas Färber
Combine this with breakpoint handler registration, guarding both with tcg_enabled() to suppress also TCG init for qtest. Rename the handler to xtensa_breakpoint_handler() since it needs to become global. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-unicore32: Move TCG initialization to UniCore32CPU initfnAndreas Färber
Normalize the "inited" logic and add a tcg_enabled() check to suppress it for qtest. Ensures that a QOM-created UniCore32CPU is usable. Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-sparc: Move TCG initialization to SPARCCPU initfnAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-sh4: Move TCG initialization to SuperHCPU initfnAndreas Färber
Add a tcg_enabled() check to suppress it for qtest. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-s390x: Move TCG initialization to S390CPU initfnAndreas Färber
Ensures that a QOM-created S390CPU is usable. Acked-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-ppc: Move TCG initialization to PowerPCCPU initfnAndreas Färber
Ensures that a QOM-created PowerPCCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-mips: Move TCG initialization to MIPSCPU initfnAndreas Färber
Make mips_tcg_init() non-static and add tcg_enabled() check to suppress it for qtest. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-microblaze: Move TCG initialization to MicroBlazeCPU initfnAndreas Färber
Split off TCG initialization from cpu_mb_init() into mb_tcg_init() to call it from the initfn. Ensures that a QOM-created MicroBlazeCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-m68k: Move TCG initialization to M68kCPU initfnAndreas Färber
Add a tcg_enabled() check to suppress it for qtest. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-lm32: Move TCG initialization to LM32CPU initfnAndreas Färber
Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-cris: Move TCG initialization to CRISCPU initfnAndreas Färber
Split out TCG initialization from cpu_cris_init(). Avoid CPUCRISState dependency for v10-specific initialization and for non-v10 by inlining the decision into the initfn as well. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-arm: Move TCG initialization to ARMCPU initfnAndreas Färber
Ensures that a QOM-created ARMCPU is usable. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-xtensa: Introduce QOM realizefn for XtensaCPUAndreas Färber
Introduce realizefn and set realized = true in cpu_xtensa_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-unicore32: Introduce QOM realizefn for UniCore32CPUAndreas Färber
Introduce a realizefn and set realized = true in uc32_cpu_init(). Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [AF: Invoke the parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-sparc: Introduce QOM realizefn for SPARCCPUAndreas Färber
Introduce realizefn and set realized = true in cpu_sparc_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-sh4: Introduce QOM realizefn for SuperHCPUAndreas Färber
Introduce a realizefn and set realized = true in cpu_sh4_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-s390x: Introduce QOM realizefn for S390CPUAndreas Färber
Introduce realizefn and set realized = true in cpu_s390x_init(). Defer CPU reset from initfn to realizefn. Acked-by: Richard Henderson <rth@twiddle.net> [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-mips: Introduce QOM realizefn for MIPSCPUAndreas Färber
Introduce a realizefn and set realized = true from cpu_mips_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-microblaze: Introduce QOM realizefn for MicroBlazeCPUAndreas Färber
Introduce realizefn and set realized = true from cpu_mb_init(). Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-m68k: Introduce QOM realizefn for M68kCPUAndreas Färber
Introduce realizefn and set realized = true in cpu_m68k_init(). Split off GDB registration to a new m68k_cpu_init_gdb() so that it can be called from the realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-lm32: Introduce QOM realizefn for LM32CPUAndreas Färber
Introduce a realizefn and set realized = true in cpu_lm32_init(). Also move cpu_reset() call from initfn to realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-cris: Introduce QOM realizefn for CRISCPUAndreas Färber
Introduce realizefn and set realized = true from cpu_cris_init(). Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-ppc: Update PowerPCCPU to QOM realizefnAndreas Färber
Adapt ppc_cpu_realize() signature, hook it up to DeviceClass and set realized = true in cpu_ppc_init(). Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-openrisc: Update OpenRISCCPU to QOM realizefnAndreas Färber
Update the openrisc_cpu_realize() signature, hook it up to DeviceClass::realize and set realized = true in cpu_openrisc_init(). qapi/error.h is now included through qdev and no longer needed. Signed-off-by: Andreas Färber <afaerber@suse.de> Cc: Jia Liu <proljc@gmail.com>
2013-02-16target-i386: Update X86CPU to QOM realizefnAndreas Färber
Adapt the signature of x86_cpu_realize(), hook up to DeviceClass::realize and set realized = true in cpu_x86_init(). The QOM realizefn cannot depend on errp being non-NULL as in cpu_x86_init(), so use a local Error to preserve error handling behavior on APIC initialization errors. Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-arm: Update ARMCPU to QOM realizefnAndreas Färber
Turn arm_cpu_realize() into a QOM realize function, no longer called via cpu.h prototype. To maintain the semantics of cpu_init(), set realized = true explicitly in cpu_arm_init(). Move GDB coprocessor registration, CPU reset and vCPU initialization into the realizefn. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16target-alpha: Update AlphaCPU to QOM realizefnAndreas Färber
Update the alpha_cpu_realize() signature and hook up to DeviceClass::realize. Set realized = true in cpu_alpha_init(). qapi/error.h is included through qdev now and no longer needed. Acked-by: Richard Henderson <rth@twiddle.net> [AF: Invoke parent's realizefn] Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16cpu: Prepare QOM realizefnAndreas Färber
Overwrite the default implementation with a no-op, no longer attempting to call DeviceClass::init. Signed-off-by: Andreas Färber <afaerber@suse.de>
2013-02-16bitops: Remove routines redundant with host-utilsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16bitops: Replace bitops_ctol with ctzlRichard Henderson
The is the only remaining user. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16bitops: Inline bitops_flslRichard Henderson
This is the only remaining user. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16target-i386: Inline bitops_flslRichard Henderson
Use clz32 directly. Which makes slightly more sense given that the input is type "int" and not type "long". Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16bitops: Write bitops_flsl in terms of clzlRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16memory: Use non-bitops ctzlRichard Henderson
A memory size of zero is invalid, and so that edge condition does not occur. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16bitops: Use non-bitops ctzlRichard Henderson
The use of ctz has already eliminated zero, and thus the difference in edge conditions between the two routines is irrelevant. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16hbitmap: Use non-bitops ctzlRichard Henderson
Both uses of ctz have already eliminated zero, and thus the difference in edge conditions between the two routines is irrelevant. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16host-utils: Fix coding style and add commentsRichard Henderson
Add function comments to the routines, documenting the corner cases upon which we are standardizing. Fix the few instances of non-standard coding style. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2013-02-16host-utils: Add host long specific aliases for clz, ctz, ctpopRichard Henderson
We will standardize on these names, rather than the similar routines currently residing in qemu/bitops.h. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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