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2017-09-04target/arm/kvm: pmu: split init and set-irq stagesAndrew Jones
When adding a PMU with a userspace irqchip we skip the set-irq stage of device creation. Split the 'create' function into two functions 'init' and 'set-irq' so they may be called separately. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org> Message-id: 1500471597-2517-3-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04hw/arm/virt: add pmu interrupt stateAndrew Jones
Mimicking gicv3-maintenance-interrupt, add the PMU's interrupt to CPU state. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500471597-2517-2-git-send-email-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04hw/arm: use defined type name instead of hard-coded stringPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04loader: Ignore zero-sized ELF segmentsPeter Maydell
Some ELF files have program headers that specify segments that are of zero size. Ignore them, rather than trying to create zero-length ROM blobs for them, because the zero-length blob can falsely trigger the overlapping-ROM-blobs check. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Hua Yanghao <huayanghao@gmail.com> Message-id: 1502116754-18867-3-git-send-email-peter.maydell@linaro.org
2017-09-04loader: Handle ELF files with overlapping zero-initialized dataPeter Maydell
For embedded systems, notably ARM, one common use of ELF file segments is that the 'physical addresses' represent load addresses and the 'virtual addresses' execution addresses, such that the load addresses are packed into ROM or flash, and the relocation and zero-initialization of data is done at runtime. This means that the 'memsz' in the segment header represents the runtime size of the segment, but the size that needs to be loaded is only the 'filesz'. In particular, paddr+memsz may overlap with the next segment to be loaded, as in this example: 0x70000001 off 0x00007f68 vaddr 0x00008150 paddr 0x00008150 align 2**2 filesz 0x00000008 memsz 0x00000008 flags r-- LOAD off 0x000000f4 vaddr 0x00000000 paddr 0x00000000 align 2**2 filesz 0x00000124 memsz 0x00000124 flags r-- LOAD off 0x00000218 vaddr 0x00000400 paddr 0x00000400 align 2**3 filesz 0x00007d58 memsz 0x00007d58 flags r-x LOAD off 0x00007f70 vaddr 0x20000140 paddr 0x00008158 align 2**3 filesz 0x00000a80 memsz 0x000022f8 flags rw- LOAD off 0x000089f0 vaddr 0x20002438 paddr 0x00008bd8 align 2**0 filesz 0x00000000 memsz 0x00004000 flags rw- LOAD off 0x000089f0 vaddr 0x20000000 paddr 0x20000000 align 2**0 filesz 0x00000000 memsz 0x00000140 flags rw- where the segment at paddr 0x8158 has a memsz of 0x2258 and would overlap with the segment at paddr 0x8bd8 if QEMU's loader tried to honour it. (At runtime the segments will not overlap since their vaddrs are more widely spaced than their paddrs.) Currently if you try to load an ELF file like this with QEMU then it will fail with an error "rom: requested regions overlap", because we create a ROM image for each segment using the memsz as the size. Support ELF files using this scheme, by truncating the zero-initialized part of the segment if it would overlap another segment. This will retain the existing loader behaviour for all ELF files we currently accept, and also accept ELF files which only need 'filesz' bytes to be loaded. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1502116754-18867-2-git-send-email-peter.maydell@linaro.org
2017-09-04nvic: Implement "user accesses BusFault" SCS region behaviourPeter Maydell
The ARMv7M architecture specifies that most of the addresses in the PPB region (which includes the NVIC, systick and system registers) are not accessible to unprivileged accesses, which should BusFault with a few exceptions: * the STIR is configurably user-accessible * the ITM (which we don't implement at all) is always user-accessible Implement this by switching the register access functions to the _with_attrs scheme that lets us distinguish user mode accesses. This allows us to pull the handling of the CCR.USERSETMPEND flag up to the level where we can make it generate a BusFault as it should for non-permitted accesses. Note that until the core ARM CPU code implements turning MEMTX_ERROR into a BusFault the registers will continue to act as RAZ/WI to user accesses. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-16-git-send-email-peter.maydell@linaro.org
2017-09-04armv7m_nvic.h: Move from include/hw/arm to include/hw/intcPeter Maydell
The armv7m_nvic.h header file was accidentally placed in include/hw/arm; move it to include/hw/intc to match where its corresponding .c file lives. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-15-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Create and use new function arm_v7m_is_handler_mode()Peter Maydell
Add a utility function for testing whether the CPU is in Handler mode; this is just a check whether v7m.exception is non-zero, but we do it in several places and it makes the code a bit easier to read to not have to mentally figure out what the test is testing. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-14-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Don't calculate lr in arm_v7m_cpu_do_interrupt() until neededPeter Maydell
Move the code in arm_v7m_cpu_do_interrupt() that calculates the magic LR value down to when we're actually going to use it. Having the calculation and use so far apart makes the code a little harder to understand than it needs to be. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-13-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Make arm_cpu_dump_state() handle the M-profile XPSRPeter Maydell
Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR rather than assuming it's an A-profile CPSR. On M profile the PSR line of a register dump will now look like this: XPSR=41000000 -Z-- T priv-thread Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-12-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Don't use cpsr_write/cpsr_read to transfer M profile XPSRPeter Maydell
For M profile the XPSR is a similar but not identical format to the A profile CPSR/SPSR. (For instance the Thumb bit is in a different place.) For guest accesses we make the M profile code go through xpsr_read() and xpsr_write() which handle the different layout. However for migration we use cpsr_read() and cpsr_write() to marshal state into and out of the migration data stream. This is pretty confusing and works more by luck than anything else. Make M profile migration use xpsr_read() and xpsr_write() instead. The most complicated part of this is handling the possibility that the migration source is an older QEMU which hands us a CPSR format value; helpfully we can always tell the two apart. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-11-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Don't store M profile PRIMASK and FAULTMASK in daifPeter Maydell
We currently store the M profile CPU register state PRIMASK and FAULTMASK in the daif field of the CPU state in its I and F bits. This is a legacy from the original implementation, which tried to share the cpu_exec_interrupt code between A profile and M profile. We've since separated out the two cases because they are significantly different, so now there is no common code between M and A profile which looks at env->daif: all the uses are either in A-only or M-only code paths. Sharing the state fields now is just confusing, and will make things awkward when we implement v8M, where the PRIMASK and FAULTMASK registers are banked between security states. Switch M profile over to using v7m.faultmask and v7m.primask fields for these registers. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-10-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Define and use XPSR bit masksPeter Maydell
The M profile XPSR is almost the same format as the A profile CPSR, but not quite. Define some XPSR_* macros and use them where we definitely dealing with an XPSR rather than reusing the CPSR ones. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-9-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Fix outdated comment about exception exitPeter Maydell
When we switched our handling of exception exit to detect the magic addresses at translate time rather than via a do_unassigned_access hook, we forgot to update a comment; correct the omission. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-8-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Remove incorrect comment about MPU_CTRLPeter Maydell
Remove the comment that claims that some MPU_CTRL bits are stored in sctlr_el[1]. This has never been true since MPU_CTRL was added in commit 29c483a50607 -- the comment is a leftover from Michael Davidsaver's original implementation, which I modified not to use sctlr_el[1]; I forgot to delete the comment then. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-7-git-send-email-peter.maydell@linaro.org
2017-09-04hw/intc/armv7m_nvic.c: Remove out of date commentPeter Maydell
Remove an out of date comment which says there's only one item in the NVIC container region -- we put systick into its own device object a while back and so now there are two things in the container. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-6-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Tighten up Thumb decode where new v8M insns will bePeter Maydell
Tighten up the T32 decoder in the places where new v8M instructions will be: * TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ... which is UNPREDICTABLE: make the UNPREDICTABLE behaviour be to UNDEF * BXNS/BLXNS are distinguished from BX/BLX via the low 3 bits, which in previous architectural versions are SBZ: enforce the SBZ via UNDEF rather than ignoring it, and move the "ARCH(5)" UNDEF case up so we don't leak a TCG temporary * SG is in the encoding which would be LDRD/STRD with rn = r15; this is UNPREDICTABLE and we currently UNDEF: move this check further up the code so that we don't leak TCG temporaries in the UNDEF case and have a better place to put the SG decode. This means that if a v8M binary is accidentally run on v7M or if a test case hits something that we haven't implemented yet the behaviour will be obvious (UNDEF) rather than obscure (plough on treating it as a different instruction). In the process, add some comments about the instruction patterns at these points in the decode. Our Thumb and ARM decoders are very difficult to understand currently, but gradually adding comments like this should help to clarify what exactly has been decoded when. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-5-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Consolidate PMSA handling in get_phys_addr()Peter Maydell
Currently get_phys_addr() has PMSAv7 handling before the "is translation disabled?" check, and then PMSAv5 after it. Tidy this up by making the PMSAv5 code handle the "MPU disabled" case itself, so that we have all the PMSA code in one place. This will make adding the PMSAv8 code slightly cleaner, and also means that pre-v7 PMSA cores benefit from the MPU lookup logging that the PMSAv7 codepath had. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-4-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Don't trap WFI/WFE for M profilePeter Maydell
M profile cores can never trap on WFI or WFE instructions. Check for M profile in check_wfx_trap() to ensure this. The existing code will do the right thing for v7M cores because the hcr_el2 and scr_el3 registers will be all-zeroes and so we won't attempt to trap, but when we start setting ARM_FEATURE_V8 for v8M cores the v8A handling of SCTLR.nTWE and .nTWI will not give the right results. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-3-git-send-email-peter.maydell@linaro.org
2017-09-04target/arm: Use MMUAccessType enum rather than intPeter Maydell
In the ARM get_phys_addr() code, switch to using the MMUAccessType enum and its MMU_* values rather than int and literal 0/1/2. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 1501692241-23310-2-git-send-email-peter.maydell@linaro.org
2017-09-04Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-09-01-v3' ↵Peter Maydell
into staging QAPI patches for 2017-09-01 # gpg: Signature made Mon 04 Sep 2017 12:30:31 BST # gpg: using RSA key 0x3870B400EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * remotes/armbru/tags/pull-qapi-2017-09-01-v3: (47 commits) qapi: drop the sentinel in enum array qapi: Change data type of the FOO_lookup generated for enum FOO qapi: Convert indirect uses of FOO_lookup[...] to qapi_enum_lookup() qapi: Mechanically convert FOO_lookup[...] to FOO_str(...) qapi: Generate FOO_str() macro for QAPI enum FOO qapi: Avoid unnecessary use of enum lookup table's sentinel qapi: Use qapi_enum_parse() in input_type_enum() crypto: Use qapi_enum_parse() in qcrypto_block_luks_name_lookup() quorum: Use qapi_enum_parse() in quorum_open() block: Use qemu_enum_parse() in blkdebug_debug_breakpoint() hmp: Use qapi_enum_parse() in hmp_migrate_set_parameter() hmp: Use qapi_enum_parse() in hmp_migrate_set_capability() tpm: Clean up model registration & lookup tpm: Clean up driver registration & lookup qapi: Drop superfluous qapi_enum_parse() parameter max qapi: Update qapi-code-gen.txt examples to match current code qapi-schema: Improve section headings qapi-schema: Move queries from common.json to qapi-schema.json qapi-schema: Make block-core.json self-contained qapi-schema: Fold event.json back into qapi-schema.json ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-09-04qapi: drop the sentinel in enum arrayMarc-André Lureau
Now that all usages have been converted to user lookup helpers. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-14-marcandre.lureau@redhat.com> [Rebased, superfluous local variable dropped, missing check-qom-proplist.c update added] Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-17-git-send-email-armbru@redhat.com>
2017-09-04qapi: Change data type of the FOO_lookup generated for enum FOOMarc-André Lureau
Currently, a FOO_lookup is an array of strings terminated by a NULL sentinel. A future patch will generate enums with "holes". NULL-termination will cease to work then. To prepare for that, store the length in the FOO_lookup by wrapping it in a struct and adding a member for the length. The sentinel will be dropped next. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-13-marcandre.lureau@redhat.com> [Basically redone] Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-16-git-send-email-armbru@redhat.com> [Rebased]
2017-09-04qapi: Convert indirect uses of FOO_lookup[...] to qapi_enum_lookup()Markus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-15-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi: Mechanically convert FOO_lookup[...] to FOO_str(...)Markus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-14-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi: Generate FOO_str() macro for QAPI enum FOOMarkus Armbruster
The next commit will put it to use. May look pointless now, but we're going to change the FOO_lookup's type, and then it'll help. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-13-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi: Avoid unnecessary use of enum lookup table's sentinelMarkus Armbruster
Currently, the FOO_lookup[] generated for QAPI enum types are terminated by a NULL sentinel. A future patch will generate enums with "holes". NULL-termination will cease to work then. To prepare for that, replace "have we reached the sentinel?" predicates by "have we reached the FOO__MAX value?" predicates. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-12-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi: Use qapi_enum_parse() in input_type_enum()Markus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-11-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04crypto: Use qapi_enum_parse() in qcrypto_block_luks_name_lookup()Markus Armbruster
Cc: "Daniel P. Berrange" <berrange@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-10-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Acked-by: Daniel P. Berrange <berrange@redhat.com>
2017-09-04quorum: Use qapi_enum_parse() in quorum_open()Marc-André Lureau
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-12-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Rebased, qemu_opt_get() factored out, commit message tweaked] Cc: Alberto Garcia <berto@igalia.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-9-git-send-email-armbru@redhat.com>
2017-09-04block: Use qemu_enum_parse() in blkdebug_debug_breakpoint()Marc-André Lureau
The error message on invalid blkdebug events changes from qemu-system-x86_64: LOCATION: Invalid event name "VALUE" to qemu-system-x86_64: LOCATION: invalid parameter value: VALUE Slight degradation, but the message is sub-par even before the patch. When complaining about a parameter value, both parameter name and value should be mentioned, as the value may well not be unique. Left for another day. Also left is the error message's unhelpful location: it points to the config=FILENAME rather than into that file. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-11-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Rebased, commit message rewritten] Cc: Kevin Wolf <kwolf@redhat.com> Cc: Max Reitz <mreitz@redhat.com> Cc: qemu-block@nongnu.org Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-8-git-send-email-armbru@redhat.com>
2017-09-04hmp: Use qapi_enum_parse() in hmp_migrate_set_parameter()Marc-André Lureau
The error message on invalid parameter name changes from Invalid parameter "NAME" to invalid parameter value: NAME Slight degratation, perhaps. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-10-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Rebased, assertion added, commit message rewritten] Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-7-git-send-email-armbru@redhat.com>
2017-09-04hmp: Use qapi_enum_parse() in hmp_migrate_set_capability()Marc-André Lureau
The error message on invalid capability name changes from Invalid parameter "NAME" to invalid parameter value: NAME No worse than before. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-9-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Rebased, commit message rewritten] Cc: "Dr. David Alan Gilbert" <dgilbert@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-6-git-send-email-armbru@redhat.com>
2017-09-04tpm: Clean up model registration & lookupMarkus Armbruster
We have a strict separation between enum TpmModel and tpm_models[]: * TpmModel may have any number of members. It just happens to have one. * tpm_register_model() uses the first empty slot in tpm_models[]. If you register more than tpm_models[] has space, tpn_register_model() fails. Its caller silently ignores the failure. Register the same TpmModel more than once has no effect other than wasting tpm_models[] slots: tpm_model_is_registered() is happy with the first one it finds. Since we only ever register one model, and tpm_models[] has space for just that one, this contraption even works. Turn tpm_models[] into a straight map from enum TpmType to bool. Much simpler. Cc: Stefan Berger <stefanb@us.ibm.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-5-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> [Commit message typo fixed]
2017-09-04tpm: Clean up driver registration & lookupMarc-André Lureau
We have a strict separation between enum TpmType and be_drivers[]: * TpmType may have any number of members. It just happens to have one. * tpm_register_driver() uses the first empty slot in be_drivers[]. If you register more than tpm_models[] has space, tpm_register_driver() fails. Its caller silently ignores the failure. If you register more than one with a given TpmType, tpm_display_backend_drivers() will shows all of them, but tpm_driver_find_by_type() and tpm_get_backend_driver() will find only the one one that registered first. Since we only ever register one driver, and be_drivers[] has space for just that one, this contraption even works. Turn be_drivers[] into a straight map from enum TpmType to driver. Much simpler, and has a decent chance to actually work should we ever acquire additional drivers. While there, use qapi_enum_parse() in tpm_get_backend_driver(). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-Id: <20170822132255.23945-8-marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> [Rebased, superfluous initializer dropped, commit message rewritten] Cc: Stefan Berger <stefanb@us.ibm.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-4-git-send-email-armbru@redhat.com>
2017-09-04qapi: Drop superfluous qapi_enum_parse() parameter maxMarkus Armbruster
The lookup tables have a sentinel, no need to make callers pass their size. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-3-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> [Rebased, commit message corrected]
2017-09-04qapi: Update qapi-code-gen.txt examples to match current codeMarkus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503564371-26090-2-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Improve section headingsMarkus Armbruster
The generated QEMU QMP reference is now structured as follows: 1.1 Introduction 1.2 Stability Considerations 1.3 Common data types 1.4 Socket data types 1.5 VM run state 1.6 Cryptography 1.7 Block devices 1.7.1 Block core (VM unrelated) 1.7.2 QAPI block definitions (vm unrelated) 1.8 Character devices 1.9 Net devices 1.10 Rocker switch device 1.11 TPM (trusted platform module) devices 1.12 Remote desktop 1.12.1 Spice 1.12.2 VNC 1.13 Input 1.14 Migration 1.15 Transactions 1.16 Tracing 1.17 QMP introspection 1.18 Miscellanea Section "1.18 Miscellanea" is still too big: it documents 134 symbols. Section "1.7.1 Block core (VM unrelated)" is also rather big: 128 symbols. All the others are of reasonable size. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-17-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Move queries from common.json to qapi-schema.jsonMarkus Armbruster
query-version and query-commands are in common.json for no good reason. Several similar queries are in qapi-schema.json. Move them there. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-16-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Make block-core.json self-containedMarkus Armbruster
Except for block-core.json, the sub-schemas are self-contained: if they use a symbol defined in another sub-schema, they include that sub-schema. To check, feed the sub-schema to qapi2texi (or any other QAPI generator) along with the pragma from qapi-schema.json. Fix up things to make block-core.json self-contained, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-15-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Fold event.json back into qapi-schema.jsonMarkus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-14-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Move block events from event.json to block.jsonMarkus Armbruster
Cc: Alberto Garcia <berto@igalia.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-13-git-send-email-armbru@redhat.com> Reviewed-by: Alberto Garcia <berto@igalia.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Collect TPM stuff in qapi/tpm.jsonMarkus Armbruster
Sadly, we don't have a TPM maintainer, not even a MAINTAINERS entry. Create one, and mark it orphaned. Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-12-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Collect transaction stuff in qapi/transaction.jsonMarkus Armbruster
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-11-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Collect migration stuff in qapi/migration.jsonMarkus Armbruster
Cc: Juan Quintela <quintela@redhat.com> Cc: Dr. David Alan Gilbert <dgilbert@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-10-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com>
2017-09-04qapi-schema: Collect UI stuff in qapi/ui.jsonMarkus Armbruster
UI stuff is remote desktop stuff (Spice, VNC) and input stuff (mouse, keyboard). Cc: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-9-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com>
2017-09-04qapi-schema: Collect net device stuff in qapi/net.jsonMarkus Armbruster
Cc: Jason Wang <jasowang@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-8-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Collect char device stuff in qapi/char.jsonMarkus Armbruster
Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Marc-André Lureau <marcandre.lureau@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-7-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Collect run state stuff in qapi/run-state.jsonMarkus Armbruster
Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-6-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
2017-09-04qapi-schema: Collect sockets stuff in qapi/sockets.jsonMarkus Armbruster
Cc: "Daniel P. Berrange" <berrange@redhat.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <1503602048-12268-5-git-send-email-armbru@redhat.com> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-01-09 10:55:24 +0000