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2019-07-01hw/arm/msf2-som: Exit when the cpu is not the expected onePhilippe Mathieu-Daudé
This machine correctly defines its default_cpu_type to cortex-m3 and report an error if the user requested another cpu_type, however it does not exit, and this can confuse users trying to use another core: $ qemu-system-arm -M emcraft-sf2 -cpu cortex-m4 -kernel test-m4.elf qemu-system-arm: This board can only be used with CPU cortex-m3-arm-cpu [output related to M3 core ...] The CPU is indeed a M3 core: (qemu) info qom-tree /machine (emcraft-sf2-machine) /unattached (container) /device[0] (msf2-soc) /armv7m (armv7m) /cpu (cortex-m3-arm-cpu) Add the missing exit() call to return to the shell. Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-id: 20190617160136.29930-1-philmd@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01hw/arm/boot: fix direct kernel boot with initrdAndrew Jones
Fix the condition used to check whether the initrd fits into RAM; in some cases if an initrd was also passed on the command line we would get an error stating that it was too big to fit into RAM after the kernel. Despite the error the loader continued anyway, though, so also add an exit(1) when the initrd is actually too big. Fixes: 852dc64d665f ("hw/arm/boot: Diagnose layouts that put initrd or DTB off the end of RAM") Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190618125844.4863-1-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01Merge remote-tracking branch 'remotes/vivier/tags/m68k-next-pull-request' ↵Peter Maydell
into staging remove m68k simulator syscall interface Fix comments format Fix gdbstub # gpg: Signature made Wed 26 Jun 2019 17:20:41 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier/tags/m68k-next-pull-request: linux-user/m68k: remove simulator syscall interface m68k comments break patch submission due to being incorrectly formatted The m68k gdbstub SR reg request doesnt include Condition-Codes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01Merge remote-tracking branch ↵Peter Maydell
'remotes/vivier2/tags/linux-user-for-4.1-pull-request' into staging Update ppc64 feature and default CPU next setsockops() options Improve "-L" option Another fix for 5.2-rc1 headers # gpg: Signature made Wed 26 Jun 2019 13:11:04 BST # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/linux-user-for-4.1-pull-request: linux-user: set default PPC64 CPU linux-user: update PPC64 HWCAP2 feature list linux-user: Add support for setsockopt() options IPV6_<ADD|DROP>_MEMBERSHIP linux-user: Add support for setsockopt() option SOL_ALG linux-user: emulate msgsnd(), msgrcv() and semtimedop() util/path: Do not cache all filenames at startup Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01Merge remote-tracking branch 'remotes/amarkovic/tags/mips-queue-jun-26-2019' ↵Peter Maydell
into staging MIPS queue for June 2016th, 2019 # gpg: Signature made Wed 26 Jun 2019 12:38:58 BST # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-jun-26-2019: target/mips: Fix big endian host behavior for interleave MSA instructions tests/tcg: target/mips: Fix some test cases for pack MSA instructions tests/tcg: target/mips: Add support for MSA MIPS32R6 testings tests/tcg: target/mips: Add support for MSA big-endian target testings tests/tcg: target/mips: Amend tests for MSA int multiply instructions tests/tcg: target/mips: Amend tests for MSA int dot product instructions tests/tcg: target/mips: Add tests for MSA move instructions tests/tcg: target/mips: Add tests for MSA bit move instructions dma/rc4030: Minor code style cleanup dma/rc4030: Fix off-by-one error in specified memory region size hw/mips/gt64xxx_pci: Align the pci0-mem size hw/mips/gt64xxx_pci: Convert debug printf()s to trace events hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf() hw/mips/gt64xxx_pci: Fix 'spaces' coding style issues hw/mips/gt64xxx_pci: Fix 'braces' coding style issues hw/mips/gt64xxx_pci: Fix 'tabs' coding style issues hw/mips/gt64xxx_pci: Fix multiline comment syntax Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01pcie: minor cleanups for slot control/statusMichael S. Tsirkin
Rename function arguments to make intent clearer. Better documentation for slot control logic. Suggested-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com>
2019-07-01pcie: work around for racy guest initMichael S. Tsirkin
During boot, linux guests tend to clear all bits in pcie slot status register which is used for hotplug. If they clear bits that weren't set this is racy and will lose events: not a big problem for manual hotplug on bare-metal, but a problem for us. For example, the following is broken ATM: /x86_64-softmmu/qemu-system-x86_64 -enable-kvm -S -machine q35 \ -device pcie-root-port,id=pcie_root_port_0,slot=2,chassis=2,addr=0x2,bus=pcie.0 \ -device virtio-balloon-pci,id=balloon,bus=pcie_root_port_0 \ -monitor stdio disk.qcow2 (qemu)device_del balloon (qemu)cont Balloon isn't deleted as it should. As a work-around, detect this attempt to clear slot status and revert status to what it was before the write. Note: in theory this can be detected as a duplicate button press which cancels the previous press. Does not seem to happen in practice as guests seem to only have this bug during init. Note2: the right thing to do is probably to fix Linux to read status before clearing it, and act on the bits that are set. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com>
2019-07-01pcie: check that slt ctrl changed before deletingMichael S. Tsirkin
During boot, linux would sometimes overwrites control of a powered off slot before powering it on. Unfortunately QEMU interprets that as a power off request and ejects the device. For example: /x86_64-softmmu/qemu-system-x86_64 -enable-kvm -S -machine q35 \ -device pcie-root-port,id=pcie_root_port_0,slot=2,chassis=2,addr=0x2,bus=pcie.0 \ -monitor stdio disk.qcow2 (qemu)device_add virtio-balloon-pci,id=balloon,bus=pcie_root_port_0 (qemu)cont Balloon is deleted during guest boot. To fix, save control beforehand and check that power or led state actually change before ejecting. Note: this is more a hack than a solution, ideally we'd find a better way to detect ejects, or move away from ejects completely and instead monitor whether it's safe to delete device due to e.g. its power state. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Tested-by: Igor Mammedov <imammedo@redhat.com>
2019-07-01pcie: don't skip multi-mask eventsMichael S. Tsirkin
If we are trying to set multiple bits at once, testing that just one of them is already set gives a false positive. As a result we won't interrupt guest if e.g. presence detection change and attention button press are both set. This happens with multi-function device removal. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel.apfelbaum@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
2019-07-01Merge remote-tracking branch ↵Peter Maydell
'remotes/bkoppelmann2/tags/pull-tricore-20190625' into staging * Add FTOIZ/UTOF/QSEED insns * Fix sync of hflags and swapped args of RRPW_INSERT # gpg: Signature made Tue 25 Jun 2019 14:05:03 BST # gpg: using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69CA14 # gpg: issuer "kbastian@mail.uni-paderborn.de" # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" [full] # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 CA14 * remotes/bkoppelmann2/tags/pull-tricore-20190625: tricore: add QSEED instruction tricore: sync ctx.hflags with tb->flags tricore: fix RRPW_INSERT instruction tricore: add UTOF instruction tricore: add FTOIZ instruction Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01Merge remote-tracking branch 'remotes/aperard/tags/pull-xen-20190624' into ↵Peter Maydell
staging Xen queue * Fix build * xen-block: support feature-large-sector-size * xen-block: Support IOThread polling for PV shared rings * Avoid usage of a VLA * Cleanup Xen headers usage # gpg: Signature made Mon 24 Jun 2019 16:30:32 BST # gpg: using RSA key F80C006308E22CFD8A92E7980CF5572FD7FB55AF # gpg: issuer "anthony.perard@citrix.com" # gpg: Good signature from "Anthony PERARD <anthony.perard@gmail.com>" [marginal] # gpg: aka "Anthony PERARD <anthony.perard@citrix.com>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 5379 2F71 024C 600F 778A 7161 D8D5 7199 DF83 42C8 # Subkey fingerprint: F80C 0063 08E2 2CFD 8A92 E798 0CF5 572F D7FB 55AF * remotes/aperard/tags/pull-xen-20190624: xen: Import other xen/io/*.h Revert xen/io/ring.h of "Clean up a few header guard symbols" xen: Drop includes of xen/hvm/params.h xen: Avoid VLA xen-bus / xen-block: add support for event channel polling xen-bus: allow AioContext to be specified for each event channel xen-bus: use a separate fd for each event channel xen-block: support feature-large-sector-size Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-07-01s390x: add cpu feature/model files to KVM sectionCornelia Huck
The cpu features/models are not only relevant for TCG, but also for KVM. Make sure that the KVM maintainers are cc:ed on patches as well. Message-Id: <20190626130820.12290-1-cohuck@redhat.com> Acked-by: Christian Borntraeger <borntraeger@de.ibm.com> Acked-by: Halil Pasic <pasic@linux.ibm.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2019-07-01Merge remote-tracking branch 'remotes/maxreitz/tags/pull-block-2019-06-24' ↵Peter Maydell
into staging Block patches: - The SSH block driver now uses libssh instead of libssh2 - The VMDK block driver gets read-only support for the seSparse subformat - Various fixes # gpg: Signature made Mon 24 Jun 2019 15:42:56 BST # gpg: using RSA key 91BEB60A30DB3E8857D11829F407DB0061D5CF40 # gpg: issuer "mreitz@redhat.com" # gpg: Good signature from "Max Reitz <mreitz@redhat.com>" [full] # Primary key fingerprint: 91BE B60A 30DB 3E88 57D1 1829 F407 DB00 61D5 CF40 * remotes/maxreitz/tags/pull-block-2019-06-24: iotests: Fix 205 for concurrent runs ssh: switch from libssh2 to libssh vmdk: Add read-only support for seSparse snapshots vmdk: Reduce the max bound for L1 table size vmdk: Fix comment regarding max l1_size coverage iotest 134: test cluster-misaligned encrypted write blockdev: enable non-root nodes for transaction drive-backup source nvme: do not advertise support for unsupported arbitration mechanism Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-06-28build: use $(DESTDIR)x instead of $(DESTDIR)/xStefan Hajnoczi
The GNU make manual[1] demonstrates $(DESTDIR)$(bindir)/foo and QEMU mostly follows that. There are just a few instances of $(DESTDIR)/$(bindir)/foo. Fix these inconsistencies. [1] https://www.gnu.org/software/make/manual/html_node/DESTDIR.html Cc: Daniel P. Berrange <berrange@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-id: 20190521145318.12787-1-stefanha@redhat.com Message-Id: <20190521145318.12787-1-stefanha@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2019-06-28ati-vga: switch to vgabios-ati.binGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 20190620151104.2678-4-kraxel@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-06-28seabios: add ati vgabios binaryGerd Hoffmann
Built from master (commit 6e56ed129c9782ba050a5fbfbf4ac12335b230f7), which has ati vgabios support merged (checkout master branch in roms/seabios submodule, then run "make -C roms seavgabios-ati"). Temporary exception until the next seabios major version is released (probably 1.13, fall 2019). Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 20190620151104.2678-3-kraxel@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-06-28seabios: add config for ati vgabiosGerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 20190620151104.2678-2-kraxel@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-06-28ati-vga: Fixes to offset and pitch registersBALATON Zoltan
Fix bit masks of registers for offset and pitch and also handle default values for both R128P and RV100. This improves picture a bit but does not resolve all problems yet so there might be some more bugs somewhere. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 20190624100005.7A1CA746395@zero.eik.bme.hu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-06-28ati-vga: Implement DDC and EDID info from monitorBALATON Zoltan
This adds DDC support to ati-vga and connects i2c-ddc to it. This allows at least MacOS with an ATI ndrv, Linux radeonfb and MorphOS to get monitor EDID info (although MorphOS splash screen is not displayed and radeonfb needs additional tables from vgabios-rv100). Xorg needs additional support from VESA vgabios, it's missing INT10 0x4F15 function (see https://gitlab.freedesktop.org/xorg/xserver/blob/master/hw/xfree86/vbe/vbe.c) without which no DDC is available that also prevents loading the accelerated X driver. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 046ddebb7ec8db48c4e877ee444ec1c41e385a74.1561028123.git.balaton@eik.bme.hu ati-vga: Clarify comment Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 20190620195213.C54127461AE@zero.eik.bme.hu ati-vga: Add DDC reg names for debug Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-id: 20190621181459.2F8207462AA@zero.eik.bme.hu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-06-28i2c: Move bitbang_i2c.h to include/hw/i2c/BALATON Zoltan
The bitbang i2c implementation is also useful for other device models such as DDC in display controllers. Move the header to include/hw/i2c/ to allow it to be used from other device models and adjust users of this include. This also reverts commit 2b4c1125ac which is no longer needed. Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 5d1fe4db846ab9be4b77ddb0d43cc74cd200a003.1561028123.git.balaton@eik.bme.hu Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2019-06-27hw/riscv: Extend the kernel loading supportAlistair Francis
Extend the RISC-V kernel loader to support Image and uImage files. A Linux kernel can now be booted with: qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel Image Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27hw/riscv: Add support for loading a firmwareAlistair Francis
Add support for loading a firmware file for the virt machine and the SiFive U. This can be run with the following command: qemu-system-riscv64 -machine virt -bios fw_jump.bin -kernel vmlinux Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27hw/riscv: Split out the boot functionsAlistair Francis
Split the common RISC-V boot functions into a seperate file. This allows us to share the common code. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27riscv: sifive_u: Update the plic hart config to support multicoreBin Meng
At present the PLIC is instantiated to support only one hart, while the machine allows at most 4 harts to be created. When more than 1 hart is configured, PLIC needs to instantiated to support multicore, otherwise an SMP OS does not work. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27riscv: sifive_u: Do not create hard-coded phandles in DTBin Meng
At present the cpu, plic and ethclk nodes' phandles are hard-coded to 1/2/3 in DT. If we configure more than 1 cpu for the machine, all cpu nodes' phandles conflict with each other as they are all 1. Fix it by removing the hardcode. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27disas/riscv: Fix `rdinstreth` constraintWladimir J. van der Laan
The constraint for `rdinstreth` was comparing the csr number to 0xc80, which is `cycleh` instead. Fix this. Signed-off-by: Wladimir J. van der Laan <laanwj@gmail.com> Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-27disas/riscv: Disassemble reserved compressed encodings as illegalMichael Clark
Due to the design of the disassembler, the immediate is not known during decoding of the opcode; so to handle compressed encodings with reserved immediate values (non-zero), we need to add an additional check during decompression to match reserved encodings with zero immediates and translate them into the illegal instruction. The following compressed opcodes have reserved encodings with zero immediates: c.addi4spn, c.addi, c.lui, c.addi16sp, c.srli, c.srai, c.andi and c.slli Signed-off-by: Michael Clark <mjc@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> [Palmer: Broke long lines] Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
2019-06-26MAINTAINERS: Change maintership of Xen code under hw/9pfsGreg Kurz
Xen folks are the actual maintainers for this. Signed-off-by: Greg Kurz <groug@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Acked-by: Anthony PERARD <anthony.perard@citrix.com> Acked-by: Paul Durrant <paul.durrant@citrix.com> Acked-by: Stefano Stabellini <sstabellini@kernel.org> Message-Id: <155912548463.2019004.3515830305299809902.stgit@bahia.lan> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26configure: use valid args testing sem_timedwaitDaniel P. Berrangé
The sem_timedwait function has been annotated as requiring non-null args in latest header files from GCC snapshot representing the future 2.30 release. This causes configure to fail when -Werror is used: config-temp/qemu-conf.c: In function ‘main’: config-temp/qemu-conf.c:2:25: error: null argument where non-null required (argument 1) [-Werror=nonnull] 2 | int main(void) { return sem_timedwait(0, 0); } | ^~~~~~~~~~~~~ config-temp/qemu-conf.c:2:25: error: null argument where non-null required (argument 2) [-Werror=nonnull] Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190617114114.24897-1-berrange@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26configure: disallow spaces and colons in source path and build pathAntonio Ospite
The configure script breaks when the qemu source directory is in a path containing white spaces, in particular the list of targets is not correctly generated when calling "./configure --help" because of how the default_target_list variable is built. In addition to that, *building* qemu from a directory with spaces breaks some assumptions in the Makefiles, even if the original source path does not contain spaces like in the case of an out-of-tree build, or when symlinks are involved. To avoid these issues, refuse to run the configure script and the Makefile if there are spaces or colons in the source path or the build path, taking as inspiration what the kbuild system in linux does. Buglink: https://bugs.launchpad.net/qemu/+bug/1817345 Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Antonio Ospite <antonio.ospite@collabora.com> Message-Id: <20190526144747.30019-3-ao2@ao2.it> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26configure: set source_path only once and make its definition more robustAntonio Ospite
Since commit 79d77bcd36 (configure: Remove --source-path option, 2019-04-29) source_path cannot be overridden anymore, move it out of the "default parameters" block since the word "default" may suggest that the value can change, while in fact it does not. While at it, only set source_path once and separate the positional argument of basename with "--" to more robustly cover the case of path names starting with a dash. Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Antonio Ospite <antonio.ospite@collabora.com> Message-Id: <20190526144747.30019-2-ao2@ao2.it> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26linux-user/m68k: remove simulator syscall interfaceLaurent Vivier
This interface has been introduced in 2005 with the coldfire implementation (e6e5906b6e ColdFire target.) and looks like to do what the linux-user interface already does with the TRAP exception rather than the ILLEGAL exception. This interface has not been maintained since that. The semi-hosting interface is not removed so coldfire kernel with semi-hosting is always supported. Signed-off-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190524162049.806-1-laurent@vivier.eu> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26m68k comments break patch submission due to being incorrectly formattedLucien Murray-Pitts
Altering all comments in target/m68k to match Qemu coding styles so that future patches wont fail due to style breaches. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190606234125.GA4830@localhost.localdomain> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26The m68k gdbstub SR reg request doesnt include Condition-CodesLucien Murray-Pitts
The register request via gdbstub would return the SR part which contains the Trace/Master/IRQ state flags, but would be missing the CR (Condition Register) state bits. This fix adds this support by merging them in the m68k specific gdbstub handler m68k_cpu_gdb_read_register for SR register. Signed-off-by: Lucien Murray-Pitts <lucienmp.qemu@gmail.com> Reviewed-by: Laurent Vivier <laurent@vivier.eu> Message-Id: <20190609105154.GA16755@localhost.localdomain> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
2019-06-26target/mips: Fix big endian host behavior for interleave MSA instructionsAleksandar Markovic
Fix big endian host behavior for interleave MSA instructions. Previous fix used TARGET_WORDS_BIGENDIAN instead of HOST_WORDS_BIGENDIAN, which was a mistake. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-9-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Fix some test cases for pack MSA instructionsAleksandar Markovic
Fix certian test cases for MSA pack instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-8-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Add support for MSA MIPS32R6 testingsAleksandar Markovic
Add files for MSA MIPS32R6 target testings (copiling and running). Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-7-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Add support for MSA big-endian target testingsAleksandar Markovic
Add files for MSA big-endian target testings (copiling and running). Little-endian files are renamed and ammended too. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-6-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Amend tests for MSA int multiply instructionsAleksandar Markovic
Amend tests for MSA int multiply instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-5-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Amend tests for MSA int dot product instructionsAleksandar Markovic
Add tests for instructions whose result depends on the value in destination register (prior to instruction execution). Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-4-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Add tests for MSA move instructionsAleksandar Markovic
Add tests for MSA move instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26tests/tcg: target/mips: Add tests for MSA bit move instructionsAleksandar Markovic
Add tests for MSA bit move instructions. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Message-Id: <1561543629-20327-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26dma/rc4030: Minor code style cleanupAleksandar Markovic
Fix some simple checkpatch.pl warnings in rc4030.c. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1561472838-32272-3-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26dma/rc4030: Fix off-by-one error in specified memory region sizeAleksandar Markovic
The size is one byte less than it should be: address-space: rc4030-dma 0000000000000000-00000000fffffffe (prio 0, i/o): rc4030.dma rc4030 is used in MIPS Jazz board context. Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com> Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <1561472838-32272-2-git-send-email-aleksandar.markovic@rt-rk.com>
2019-06-26hw/mips/gt64xxx_pci: Align the pci0-mem sizePhilippe Mathieu-Daudé
One byte is missing, use an aligned size. (qemu) info mtree memory-region: pci0-mem 0000000000000000-00000000fffffffe (prio 0, i/o): pci0-mem ^ Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190624222844.26584-8-f4bug@amsat.org>
2019-06-26hw/mips/gt64xxx_pci: Convert debug printf()s to trace eventsPhilippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190624222844.26584-7-f4bug@amsat.org>
2019-06-26hw/mips/gt64xxx_pci: Use qemu_log_mask() instead of debug printf()Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190624222844.26584-6-f4bug@amsat.org>
2019-06-26hw/mips/gt64xxx_pci: Fix 'spaces' coding style issuesPhilippe Mathieu-Daudé
Since we'll move this code around, fix its style first: ERROR: space prohibited between function name and open parenthesis ERROR: line over 90 characters Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190624222844.26584-5-f4bug@amsat.org>
2019-06-26hw/mips/gt64xxx_pci: Fix 'braces' coding style issuesPhilippe Mathieu-Daudé
Since we'll move this code around, fix its style first: ERROR: braces {} are necessary for all arms of this statement Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190624222844.26584-4-f4bug@amsat.org>
2019-06-26hw/mips/gt64xxx_pci: Fix 'tabs' coding style issuesPhilippe Mathieu-Daudé
Since we'll move this code around, fix its style first: ERROR: code indent should never use tabs Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Aleksandar Markovic <amarkovic@wavecomp.com> Message-Id: <20190624222844.26584-3-f4bug@amsat.org>