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QEMU is a generic and open source machine & userspace emulator and virtualizer
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Author
2013-12-20
Add lxvdsx
Tom Musta
2013-12-20
Add lxsdx
Tom Musta
2013-12-20
Add xxpermdi
Tom Musta
2013-12-20
Add stxvd2x
Tom Musta
2013-12-20
Add lxvd2x
Tom Musta
2013-12-20
Add VSR to Global Registers
Tom Musta
2013-12-20
Add VSX Instruction Decoders
Tom Musta
2013-12-20
Add MSR VSX and Associated Exception
Tom Musta
2013-12-20
Declare and Enable VSX
Tom Musta
2013-12-20
powerpc: add PVR mask support
Alexey Kardashevskiy
2013-12-20
target-ppc: add stubs for KVM breakpoints
Greg Kurz
2013-12-19
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20131217' into st...
Anthony Liguori
2013-12-17
MAINTAINERS: add myself to maintain allwinner-a10
liguang
2013-12-17
hw/arm: add cubieboard support
liguang
2013-12-17
hw/arm: add allwinner a10 SoC support
liguang
2013-12-17
hw/intc: add allwinner A10 interrupt controller
liguang
2013-12-17
hw/timer: add allwinner a10 timer
liguang
2013-12-17
vmstate: Add support for an array of ptimer_state *
Peter Maydell
2013-12-17
MAINTAINERS: Document 'Canon DIGIC' machine
Antony Pavlov
2013-12-17
hw/arm/digic: add NOR ROM support
Antony Pavlov
2013-12-17
hw/arm/digic: add UART support
Antony Pavlov
2013-12-17
hw/arm/digic: add timer support
Antony Pavlov
2013-12-17
hw/arm/digic: prepare DIGIC-based boards support
Antony Pavlov
2013-12-17
hw/arm: add very initial support for Canon DIGIC SoC
Antony Pavlov
2013-12-17
target-arm: A64: add support for logical (immediate) insns
Alexander Graf
2013-12-17
target-arm: A64: add support for 1-src CLS insn
Claudio Fontana
2013-12-17
host-utils: add clrsb32/64 - count leading redundant sign bits
Claudio Fontana
2013-12-17
target-arm: A64: add support for bitfield insns
Claudio Fontana
2013-12-17
target-arm: A64: add support for 1-src REV insns
Claudio Fontana
2013-12-17
target-arm: A64: add support for 1-src RBIT insn
Alexander Graf
2013-12-17
target-arm: A64: add support for 1-src data processing and CLZ
Claudio Fontana
2013-12-17
target-arm: A64: add support for 2-src shift reg insns
Alexander Graf
2013-12-17
target-arm: A64: add support for 2-src data processing and DIV
Alexander Graf
2013-12-17
target-arm: A64: add support for EXTR
Alexander Graf
2013-12-17
target-arm: A64: add support for ADR and ADRP
Alexander Graf
2013-12-17
target-arm: A64: add support for logical (shifted register)
Alexander Graf
2013-12-17
target-arm: A64: add support for conditional select
Claudio Fontana
2013-12-17
target-arm: A64: add support for compare and branch imm
Alexander Graf
2013-12-17
target-arm: A64: add support for 'test and branch' imm
Alexander Graf
2013-12-17
target-arm: A64: add support for conditional branches
Alexander Graf
2013-12-17
target-arm: A64: add support for BR, BLR and RET insns
Alexander Graf
2013-12-17
target-arm: A64: add support for B and BL insns
Alexander Graf
2013-12-17
target-arm: A64: expand decoding skeleton for system instructions
Claudio Fontana
2013-12-17
target-arm: A64: provide skeleton for a64 insn decoding
Claudio Fontana
2013-12-17
target-arm: A64: add stubs for a64 specific helpers
Alexander Graf
2013-12-17
target-arm: Support fp registers in gdb stub
Peter Maydell
2013-12-17
target-arm: A64: provide functions for accessing FPCR and FPSR
Peter Maydell
2013-12-17
target-arm: A64: add set_pc cpu method
Alexander Graf
2013-12-17
target-arm: Split A64 from A32/T32 gen_intermediate_code_internal()
Peter Maydell
2013-12-17
default-configs: Add config for aarch64-softmmu
Peter Maydell
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