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2022-06-22test/avocado/machine_aspeed.py: Move OpenBMC testsCédric Le Goater
It's easier to run. Keep test_arm_ast2600_debian() under the boot_linux_console.py file because it requires the extract_from_deb() helper. We could remove it when we have tests for the AST2600. Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-06-22aspeed: Remove fake RTC device on ast2500-evbCédric Le Goater
The board has no such device. It might have been useful for some tests in the past, it's not anymore and the same can be achieved on the command line. Signed-off-by: Cédric Le Goater <clg@kaod.org>
2022-06-21Merge tag 'pull-tcg-20220621' of https://gitlab.com/rth7680/qemu into stagingRichard Henderson
Speed empty timer list in qemu_clock_deadline_ns_all. Implement remainder for Power3.1 hosts. Optimize ppc host icache flushing. Cleanups to tcg_accel_ops_init. Fix mmio crash accessing unmapped physical memory. # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmKyLesdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8O1wf5AW6JeeUTs2r3owsK # UpVaRqjlLpNeuktoOQoG8lbVzm1ulEv7zgXYJTZg4cc/83WQZ2G8WzTj3W+Qr/S9 # ECRd73Kou+fK3jTo8I+wPLQjLjkIV4xSABMGz/onxhoAeyS+xcAI4qGuSGrtIg2r # sQ61V4fWCwvQJdHMyG756Xsh8Xjf18mrNQZ5PLGkyn/e9UIAc4KH6FsgWJdinGEs # V/oibY20kCXpLxN0ajNmx3x4/NFs/ymMtn1z9fdhVGjAVPY0N6YsxjsGqd/WP/5U # ui/x0wAhl/VNK2M2+z3hVGfNlMpkzTVG2A3ndD+tYI3nofwTYb/UiakhID7ZX1cQ # yKDyAw== # =3Rhw # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Jun 2022 01:45:31 PM PDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20220621' of https://gitlab.com/rth7680/qemu: util/cacheflush: Optimize flushing when ppc host has coherent icache util/cacheflush: Merge aarch64 ctr_el0 usage util: Merge cacheflush.c and cacheinfo.c softmmu: Always initialize xlat in address_space_translate_for_iotlb qemu-timer: Skip empty timer lists before locking in qemu_clock_deadline_ns_all accel/tcg: Reorganize tcg_accel_ops_init() accel/tcg: Init TCG cflags in vCPU thread handler target/avr: Drop avr_cpu_memory_rw_debug() tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-21util/cacheflush: Optimize flushing when ppc host has coherent icacheNicholas Piggin
On linux, the AT_HWCAP bit PPC_FEATURE_ICACHE_SNOOP indicates that we can use a simplified 3 instruction flush sequence. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20220519141131.29839-1-npiggin@gmail.com> [rth: update after merging cacheflush.c and cacheinfo.c] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220621014837.189139-4-richard.henderson@linaro.org>
2022-06-21util/cacheflush: Merge aarch64 ctr_el0 usageRichard Henderson
Merge init_ctr_el0 into arch_cache_info. In flush_idcache_range, use the pre-computed line sizes from the global variables. Use CONFIG_DARWIN in preference to __APPLE__. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220621014837.189139-3-richard.henderson@linaro.org>
2022-06-21util: Merge cacheflush.c and cacheinfo.cRichard Henderson
Combine the two files into cacheflush.c. There's a couple of bits that would be helpful to share between the two, and combining them seems better than exporting the bits. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220621014837.189139-2-richard.henderson@linaro.org>
2022-06-21softmmu: Always initialize xlat in address_space_translate_for_iotlbRichard Henderson
The bug is an uninitialized memory read, along the translate_fail path, which results in garbage being read from iotlb_to_section, which can lead to a crash in io_readx/io_writex. The bug may be fixed by writing any value with zero in ~TARGET_PAGE_MASK, so that the call to iotlb_to_section using the xlat'ed address returns io_mem_unassigned, as desired by the translate_fail path. It is most useful to record the original physical page address, which will eventually be logged by memory_region_access_valid when the access is rejected by unassigned_mem_accepts. Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1065 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20220621153829.366423-1-richard.henderson@linaro.org>
2022-06-21qemu-timer: Skip empty timer lists before locking in qemu_clock_deadline_ns_allIdan Horowitz
This decreases qemu_clock_deadline_ns_all's share from 23.2% to 13% in a profile of icount-enabled aarch64-softmmu. Signed-off-by: Idan Horowitz <idan.horowitz@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220114004358.299534-2-idan.horowitz@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-21Merge tag 'pull-ppc-20220621' of https://gitlab.com/danielhb/qemu into stagingRichard Henderson
ppc patch queue for 2022-06-21: - tcg and target/ppc: vector divide instructions and a vbpermd fix for BE hosts - ppc440_uc.c: fix boot of sam460ex machine - target/ppc: fix stop state on cpu reset - xive2: Access direct mapped thread contexts from all chips - a couple of Coverity fixes # -----BEGIN PGP SIGNATURE----- # # iHUEABYKAB0WIQQX6/+ZI9AYAK8oOBk82cqW3gMxZAUCYrGSLAAKCRA82cqW3gMx # ZEL/AQDhEUUaztu+AWwnPKFZOP9VBU6vO2UIxZF1GHDRnoNlLQD+O6uADnIuxpxl # klUMX8h2RFIkC0zv6xGN285SzhzpyAw= # =/2K2 # -----END PGP SIGNATURE----- # gpg: Signature made Tue 21 Jun 2022 02:41:00 AM PDT # gpg: using EDDSA key 17EBFF9923D01800AF2838193CD9CA96DE033164 # gpg: Good signature from "Daniel Henrique Barboza <danielhb413@gmail.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 17EB FF99 23D0 1800 AF28 3819 3CD9 CA96 DE03 3164 * tag 'pull-ppc-20220621' of https://gitlab.com/danielhb/qemu: target/ppc: cpu_init: Clean up stop state on cpu reset target/ppc: fix unreachable code in fpu_helper.c target/ppc: avoid int32 multiply overflow in int_helper.c ppc/pnv: fix extra indent spaces with DEFINE_PROP* pnv/xive2: Access direct mapped thread contexts from all chips target/ppc: fix vbpermd in big endian hosts ppc: fix boot with sam460ex target/ppc: Implemented vector module quadword target/ppc: Implemented vector module word/doubleword target/ppc: Implemented remaining vector divide extended host-utils: Implemented signed 256-by-128 division host-utils: Implemented unsigned 256-by-128 division target/ppc: Implemented vector divide extended word target/ppc: Implemented vector divide quadword target/ppc: Implemented vector divide instructions Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-20accel/tcg: Reorganize tcg_accel_ops_init()Philippe Mathieu-Daudé
Reorg TCG AccelOpsClass initialization to emphasis icount mode share more code with single-threaded TCG. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220323171751.78612-7-philippe.mathieu.daude@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-20accel/tcg: Init TCG cflags in vCPU thread handlerPhilippe Mathieu-Daudé
Move TCG cflags initialization to thread handler. Remove the duplicated assert checks. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220323171751.78612-6-philippe.mathieu.daude@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-20target/avr: Drop avr_cpu_memory_rw_debug()Bin Meng
CPUClass::memory_rw_debug() holds a callback for GDB memory access. If not provided, cpu_memory_rw_debug() is used by the GDB stub. Drop avr_cpu_memory_rw_debug() which does nothing special. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20220322095004.70682-1-bmeng.cn@gmail.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-20tcg/ppc: implement rem[u]_i{32,64} with mod[su][wd]Matheus Kowalczuk Ferst
Power ISA v3.0 introduced mod[su][wd] insns that can be used to implement rem[u]_i{32,64}. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-20target/ppc: cpu_init: Clean up stop state on cpu resetFrederic Barrat
The 'resume_as_sreset' attribute of a cpu is set when a thread is entering a stop state on ppc books. It causes the thread to be re-routed to vector 0x100 when woken up by an exception. So it must be cleared on reset or a thread might be re-routed unexpectedly after a reset, when it was not in a stop state and/or when the appropriate exception handler isn't set up yet. Using skiboot, it can be tested by resetting the system when it is quiet and most threads are idle and in stop state. After the reset occurs, skiboot elects a primary thread and all the others wait in secondary_wait. The primary thread does all the system initialization from main_cpu_entry() and at some point, the decrementer interrupt starts ticking. The exception vector for the decrementer interrupt is in place, so that shouldn't be a problem. However, if that primary thread was in stop state prior to the reset, and because the resume_as_sreset parameters is still set, it is re-routed to exception vector 0x100. Which, at that time, is still defined as the entry point for BML. So that primary thread restarts as new and ends up being treated like any other secondary thread. All threads are now waiting in secondary_wait. It results in a full system hang with no message on the console, as the uart hasn't been init'ed yet. It's actually not obvious to realise what's happening if not tracing reset (-d cpu_reset). The fix is simply to clear the 'resume_as_sreset' attribute on reset. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220617095222.612212-1-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: fix unreachable code in fpu_helper.cDaniel Henrique Barboza
Commit c29018cc7395 added an env->fpscr OR operation using a ternary that checks if 'error' is not zero: env->fpscr |= error ? FP_FEX : 0; However, in the current body of do_fpscr_check_status(), 'error' is granted to be always non-zero at that point. The result is that Coverity is less than pleased: Control flow issues (DEADCODE) Execution cannot reach the expression "0ULL" inside this statement: "env->fpscr |= (error ? 1073...". Remove the ternary and always make env->fpscr |= FP_FEX. Cc: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Cc: Richard Henderson <richard.henderson@linaro.org> Fixes: Coverity CID 1489442 Fixes: c29018cc7395 ("target/ppc: Implemented xvf*ger*") Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20220602191048.137511-1-danielhb413@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: avoid int32 multiply overflow in int_helper.cDaniel Henrique Barboza
Coverity is not thrilled about the multiply operations being done in ger_rank8() and ger_rank2(), giving an error like the following: Integer handling issues (OVERFLOW_BEFORE_WIDEN) Potentially overflowing expression "sextract32(a, 4 * i, 4) * sextract32(b, 4 * i, 4)" with type "int" (32 bits, signed) is evaluated using 32-bit arithmetic, and then used in a context that expects an expression of type "int64_t" (64 bits, signed). Fix both instances where this occur by adding an int64_t cast in the first operand, forcing the result to be 64 bit. Fixes: Coverity CID 1489444, 1489443 Fixes: 345531533f26 ("target/ppc: Implemented xvi*ger* instructions") Cc: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Cc: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Message-Id: <20220602141449.118173-1-danielhb413@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20ppc/pnv: fix extra indent spaces with DEFINE_PROP*Daniel Henrique Barboza
The DEFINE_PROP* macros in pnv files are using extra spaces for no good reason. Cc: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <20220602215351.149910-1-danielhb413@gmail.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20pnv/xive2: Access direct mapped thread contexts from all chipsFrederic Barrat
When accessing a thread context through the IC BAR, the offset of the page in the BAR identifies the CPU. From that offset, we can compute the PIR (processor ID register) of the CPU to do the data structure lookup. On P10, the current code assumes an access for node 0 when computing the PIR. Everything is almost in place to allow access for other nodes though. So this patch reworks how the PIR value is computed so that we can access all thread contexts through the IC BAR. The PIR is already correct on P9, so no need to modify anything there. Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220602165310.558810-1-fbarrat@linux.ibm.com> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: fix vbpermd in big endian hostsMatheus Ferst
The extract64 arguments are not endian dependent as they are only used for bitwise operations. The current behavior in little-endian hosts is correct; since the indexes in VRB are in PowerISA-ordering, we should always invert the value before calling extract64. Also, using the VsrD macro, we can have a single EXTRACT_BIT definition for big and little-endian with the correct behavior. Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220601125355.1266165-1-matheus.ferst@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20ppc: fix boot with sam460exMichael S. Tsirkin
Recent changes to pcie_host corrected size of its internal region to match what it expects: only the low 28 bits are ever decoded. Previous code just ignored bit 29 (if size was 1 << 29) in the address which does not make much sense. We are now asserting on size > 1 << 28 instead, but PPC 4xx actually allows guest to configure different sizes, and some firmwares seem to set it to 1 << 29. This caused e.g. qemu-system-ppc -M sam460ex to exit with an assert when the guest writes a value to CFGMSK register when trying to map config space. This is done in the board firmware in ppc4xx_init_pcie_port() in roms/u-boot-sam460ex/arch/powerpc/cpu/ppc4xx/4xx_pcie.c It's not clear what the proper fix should be but for now let's force the size to 256MB, so anything outside the expected address range is ignored. Fixes: commit 1f1a7b2269 ("include/hw/pci/pcie_host: Correct PCIE_MMCFG_SIZE_MAX") Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Tested-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220526224229.95183-1-mst@redhat.com> [danielhb: changed commit msg as BALATON Zoltan suggested] Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: Implemented vector module quadwordLucas Mateus Castro (alqotel)
Implement the following PowerISA v3.1 instructions: vmodsq: Vector Modulo Signed Quadword vmoduq: Vector Modulo Unsigned Quadword Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/744 Message-Id: <20220525134954.85056-9-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: Implemented vector module word/doublewordLucas Mateus Castro (alqotel)
Implement the following PowerISA v3.1 instructions: vmodsw: Vector Modulo Signed Word vmoduw: Vector Modulo Unsigned Word vmodsd: Vector Modulo Signed Doubleword vmodud: Vector Modulo Unsigned Doubleword Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-8-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: Implemented remaining vector divide extendedLucas Mateus Castro (alqotel)
Implement the following PowerISA v3.1 instructions: vdivesd: Vector Divide Extended Signed Doubleword vdiveud: Vector Divide Extended Unsigned Doubleword vdivesq: Vector Divide Extended Signed Quadword vdiveuq: Vector Divide Extended Unsigned Quadword Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-7-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20host-utils: Implemented signed 256-by-128 divisionLucas Mateus Castro (alqotel)
Based on already existing QEMU implementation created a signed 256 bit by 128 bit division needed to implement the vector divide extended signed quadword instruction from PowerISA 3.1 Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-6-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20host-utils: Implemented unsigned 256-by-128 divisionLucas Mateus Castro (alqotel)
Based on already existing QEMU implementation, created an unsigned 256 bit by 128 bit division needed to implement the vector divide extended unsigned instruction from PowerISA3.1 Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-5-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: Implemented vector divide extended wordLucas Mateus Castro (alqotel)
Implement the following PowerISA v3.1 instructions: vdivesw: Vector Divide Extended Signed Word vdiveuw: Vector Divide Extended Unsigned Word Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-4-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: Implemented vector divide quadwordLucas Mateus Castro (alqotel)
Implement the following PowerISA v3.1 instructions: vdivsq: Vector Divide Signed Quadword vdivuq: Vector Divide Unsigned Quadword Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-3-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-20target/ppc: Implemented vector divide instructionsLucas Mateus Castro (alqotel)
Implement the following PowerISA v3.1 instructions: vdivsw: Vector Divide Signed Word vdivuw: Vector Divide Unsigned Word vdivsd: Vector Divide Signed Doubleword vdivud: Vector Divide Unsigned Doubleword Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220525134954.85056-2-lucas.araujo@eldorado.org.br> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-06-19Merge tag 'bsd-user-syscall-2022q2-pull-request' of ↵Richard Henderson
ssh://github.com/qemu-bsd-user/qemu-bsd-user into staging bsd-user: Next round of syscalls Implement the next round of system calls. These are open, openat, close, fdatasync, fsync, close_from, revoke, access, eacccess, facccessat, chdir, fchdir, rename, renameat, mkdir, mkdirat, rmdir, _getcwd, dup, dup2, truncate, ftruncate, acct and sync. In addition, the helper functions needed for these to work are included. With the helper functions, all of these system calls are the 'obvious' wrapper... # -----BEGIN PGP SIGNATURE----- # Comment: GPGTools - https://gpgtools.org # # iQIzBAABCgAdFiEEIDX4lLAKo898zeG3bBzRKH2wEQAFAmKvZSwACgkQbBzRKH2w # EQCrdxAA0UeXmh/l1znPSrX4lif7Vhe4H5TdmHavGQX0p7B+dMd160SMLfKFJt7J # HHXuQZbPFNuwqE5qiFPTcXIFjT5tq2WSjd9ZC/ZexfzBJIICwcUWuWvG2WfCA3fD # hth/Ru2fX0vUwoUwvYw7lTPnhb9o52Z1rf5AEFu85E3UjKWEcARHCakm7n8a+Cg+ # PkF1qZ/qFic+bkBZkZLWyHB5qR2p2sIp+VHwlG1ew39Xim457kynQOoF8etIXc1Y # g5PrjePUsVhPR7qm4CFplM4UOyGOOqIykHERppaXKtk2+kP8dp9HWog9Z/IFVOKc # z3huDtf03UtmohjdJBYkpCcCzmd2EETRPgkFaVT5ciVGMb3Nom1b2/DOnndpS9qb # TdE7J6Ek1vp4Mr386QHzm6AfdoHGZc4tH+SpDQZrsWbnugklYnQd3++GCqj8D2rA # LJ8oWInviZP8xWDn5q1sXCNw/lgVup9ZNrMl7TcXmQDZXHSW1tElIAT2PZCebman # rSwg/umr7fPOXdIAkLhF77bAt3J3kAzxhuYwHEstB3kRXEJ2VinLMf3BJBrGLnuK # kr6kJy6hw7luIT5nUNLrrNtwsAAwEu6S7OSGhEiGaUSIhiER96k/tX2u/KOBtwGC # VzIP7vK5V2xYPepyj4tXkVRHkjxxw3s8fYRXf73IsaZ6Avot8pg= # =JmJY # -----END PGP SIGNATURE----- # gpg: Signature made Sun 19 Jun 2022 11:04:28 AM PDT # gpg: using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100 # gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown] # gpg: aka "Warner Losh <imp@bsdimp.com>" [unknown] # gpg: aka "Warner Losh <imp@freebsd.org>" [unknown] # gpg: aka "Warner Losh <imp@village.org>" [unknown] # gpg: aka "Warner Losh <wlosh@bsdimp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 2035 F894 B00A A3CF 7CCD E1B7 6C1C D128 7DB0 1100 * tag 'bsd-user-syscall-2022q2-pull-request' of ssh://github.com/qemu-bsd-user/qemu-bsd-user: bsd-user: Implement acct and sync bsd-user: Implement trunctate and ftruncate bsd-user: Implement dup and dup2 bsd-user: Implement rmdir and undocumented __getcwd bsd-user: Implement mkdir and mkdirat bsd-user: Implement link, linkat, unlink and unlinkat bsd-user: Implement rename and renameat bsd-user: Implement chdir and fchdir bsd-user: Implement revoke, access, eaccess and faccessat bsd-user: Implement fdatasync, fsync and close_from bsd-user: Implement open, openat and close Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-16Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu ↵Richard Henderson
into staging virtio,pc,pci: fixes,cleanups,features more CXL patches RSA support for crypto fixes, cleanups all over the place Signed-off-by: Michael S. Tsirkin <mst@redhat.com> # -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmKrYLMPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpwpwH/2IS+V7wS3q/XXPz1HndJLpUP/z+mkeu9W6+ # X1U9CJ+66Ag4eD5T/jzoN0JEjiTeET/3xM+PY5NYZCh6QTAmA7EfFZv99oNWpGd1 # +nyxOdaMDPSscOKjLfDziVTi/QYIZBtU6TeixL9whkipYCqmgbs5gXV8ynltmKyF # bIJVeaXm5yQLcCTGzKzdXf+HmTErpEGDCDHFjzrLVjICRDdekElGVwYTn+ycl7p7 # oLsWWVDgqo0p86BITlrHUXUrxTXF3wyg2B59cT7Ilbb3o+Fa2GsP+o9IXMuVoNNp # A+zrq1QZ49UO3XwkS03xDDioUQ1T/V0L4w9dEfaGvpY4Horv0HI= # =PvmT # -----END PGP SIGNATURE----- # gpg: Signature made Thu 16 Jun 2022 09:56:19 AM PDT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [undefined] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469 * tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: acpi/erst: fix fallthrough code upon validation failure vhost: also check queue state in the vhost_dev_set_log error routine crypto: Introduce RSA algorithm virtio-iommu: Add an assert check in translate routine virtio-iommu: Use recursive lock to avoid deadlock virtio-iommu: Add bypass mode support to assigned device virtio/vhost-user: Fix wrong vhost notifier GPtrArray size docs/cxl: Add switch documentation pci-bridge/cxl_downstream: Add a CXL switch downstream port pci-bridge/cxl_upstream: Add a CXL switch upstream port Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-16acpi/erst: fix fallthrough code upon validation failureAni Sinha
At any step when any validation fail in check_erst_backend_storage(), there is no need to continue further through other validation checks. Further, by continuing even when record_size is 0, we run the risk of triggering a divide by zero error if we continued with other validation checks. Hence, we should simply return from this function upon validation failure. CC: Peter Maydell <peter.maydell@linaro.org> CC: Eric DeVolder <eric.devolder@oracle.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220513141005.1929422-1-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Eric DeVolder <eric.devolder@oracle.com>
2022-06-16vhost: also check queue state in the vhost_dev_set_log error routineNi Xun
When check queue state in the vhost_dev_set_log routine, it miss the error routine check, this patch also check queue state in error case. Fixes: 1e5a050f5798 ("check queue state in the vhost_dev_set_log routine") Signed-off-by: Ni Xun <richardni@tencent.com> Reviewed-by: Zhigang Lu <tonnylu@tencent.com> Message-Id: <OS0PR01MB57139163F3F3955960675B52EAA79@OS0PR01MB5713.jpnprd01.prod.outlook.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16crypto: Introduce RSA algorithmzhenwei pi
There are two parts in this patch: 1, support akcipher service by cryptodev-builtin driver 2, virtio-crypto driver supports akcipher service In principle, we should separate this into two patches, to avoid compiling error, merge them into one. Then virtio-crypto gets request from guest side, and forwards the request to builtin driver to handle it. Test with a guest linux: 1, The self-test framework of crypto layer works fine in guest kernel 2, Test with Linux guest(with asym support), the following script test(note that pkey_XXX is supported only in a newer version of keyutils): - both public key & private key - create/close session - encrypt/decrypt/sign/verify basic driver operation - also test with kernel crypto layer(pkey add/query) All the cases work fine. Run script in guest: rm -rf *.der *.pem *.pfx modprobe pkcs8_key_parser # if CONFIG_PKCS8_PRIVATE_KEY_PARSER=m rm -rf /tmp/data dd if=/dev/random of=/tmp/data count=1 bs=20 openssl req -nodes -x509 -newkey rsa:2048 -keyout key.pem -out cert.pem -subj "/C=CN/ST=BJ/L=HD/O=qemu/OU=dev/CN=qemu/emailAddress=qemu@qemu.org" openssl pkcs8 -in key.pem -topk8 -nocrypt -outform DER -out key.der openssl x509 -in cert.pem -inform PEM -outform DER -out cert.der PRIV_KEY_ID=`cat key.der | keyctl padd asymmetric test_priv_key @s` echo "priv key id = "$PRIV_KEY_ID PUB_KEY_ID=`cat cert.der | keyctl padd asymmetric test_pub_key @s` echo "pub key id = "$PUB_KEY_ID keyctl pkey_query $PRIV_KEY_ID 0 keyctl pkey_query $PUB_KEY_ID 0 echo "Enc with priv key..." keyctl pkey_encrypt $PRIV_KEY_ID 0 /tmp/data enc=pkcs1 >/tmp/enc.priv echo "Dec with pub key..." keyctl pkey_decrypt $PRIV_KEY_ID 0 /tmp/enc.priv enc=pkcs1 >/tmp/dec cmp /tmp/data /tmp/dec echo "Sign with priv key..." keyctl pkey_sign $PRIV_KEY_ID 0 /tmp/data enc=pkcs1 hash=sha1 > /tmp/sig echo "Verify with pub key..." keyctl pkey_verify $PRIV_KEY_ID 0 /tmp/data /tmp/sig enc=pkcs1 hash=sha1 echo "Enc with pub key..." keyctl pkey_encrypt $PUB_KEY_ID 0 /tmp/data enc=pkcs1 >/tmp/enc.pub echo "Dec with priv key..." keyctl pkey_decrypt $PRIV_KEY_ID 0 /tmp/enc.pub enc=pkcs1 >/tmp/dec cmp /tmp/data /tmp/dec echo "Verify with pub key..." keyctl pkey_verify $PUB_KEY_ID 0 /tmp/data /tmp/sig enc=pkcs1 hash=sha1 Reviewed-by: Gonglei <arei.gonglei@huawei.com> Signed-off-by: lei he <helei.sig11@bytedance.com Signed-off-by: zhenwei pi <pizhenwei@bytedance.com> Message-Id: <20220611064243.24535-2-pizhenwei@bytedance.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16virtio-iommu: Add an assert check in translate routineZhenzhong Duan
With address space switch supported, dma access translation only happen after endpoint is attached to a non-bypass domain. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Message-Id: <20220613061010.2674054-4-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16virtio-iommu: Use recursive lock to avoid deadlockZhenzhong Duan
When switching address space with mutex lock hold, mapping will be replayed for assigned device. This will trigger relock deadlock. Also release the mutex resource in unrealize routine. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Message-Id: <20220613061010.2674054-3-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16virtio-iommu: Add bypass mode support to assigned deviceZhenzhong Duan
Currently assigned devices can not work in virtio-iommu bypass mode. Guest driver fails to probe the device due to DMA failure. And the reason is because of lacking GPA -> HPA mappings when VM is created. Add a root container memory region to hold both bypass memory region and iommu memory region, so the switch between them is supported just like the implementation in virtual VT-d. Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Message-Id: <20220613061010.2674054-2-zhenzhong.duan@intel.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16virtio/vhost-user: Fix wrong vhost notifier GPtrArray sizeYajun Wu
In fetch_or_create_notifier, idx begins with 0. So the GPtrArray size should be idx + 1 and g_ptr_array_set_size should be called with idx + 1. This wrong GPtrArray size causes fetch_or_create_notifier return an invalid address. Passing this invalid pointer to vhost_user_host_notifier_remove causes assert fail: qemu/include/qemu/int128.h:27: int128_get64: Assertion `r == a' failed. shutting down, reason=crashed Backends like dpdk-vdpa which sends out vhost notifier requests almost always hit qemu crash. Fixes: 503e355465 ("virtio/vhost-user: dynamically assign VhostUserHostNotifiers") Signed-off-by: Yajun Wu <yajunw@nvidia.com> Acked-by: Parav Pandit <parav@nvidia.com> Change-Id: I87e0f7591ca9a59d210879b260704a2d9e9d6bcd Message-Id: <20220526034851.683258-1-yajunw@nvidia.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Eddie Dong <eddie.dong@intel.com>
2022-06-16docs/cxl: Add switch documentationJonathan Cameron
Switches were already introduced, but now we support them update the documentation to provide an example in diagram and qemu command line parameter forms. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220616145126.8002-4-Jonathan.Cameron@huawei.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16pci-bridge/cxl_downstream: Add a CXL switch downstream portJonathan Cameron
Emulation of a simple CXL Switch downstream port. The Device ID has been allocated for this use. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220616145126.8002-3-Jonathan.Cameron@huawei.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16pci-bridge/cxl_upstream: Add a CXL switch upstream portJonathan Cameron
An initial simple upstream port emulation to allow the creation of CXL switches. The Device ID has been allocated for this use. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220616145126.8002-2-Jonathan.Cameron@huawei.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2022-06-16Merge tag 'pull-9p-20220616' of https://github.com/cschoenebeck/qemu into ↵Richard Henderson
staging 9pfs: fix 'Twalk' protocol violation Actual fix is patch 5, whereas patch 4 being preparatory, all other patches are test cases to guard this Twalk issue. # -----BEGIN PGP SIGNATURE----- # # iQJLBAABCgA1FiEEltjREM96+AhPiFkBNMK1h2Wkc5UFAmKrDSAXHHFlbXVfb3Nz # QGNydWRlYnl0ZS5jb20ACgkQNMK1h2Wkc5VgoQ//bA/lXYa6hds4f73+opq7iiJ/ # 88gnJO8uPctNWXJ5f6ufXcTFtC99QRcl97jgSQhSIUdaZCfcpg7Pq3fONc060cMt # MNxi5Da31Fq7xz4UhSQHgWlgAfomfClYoBSOtrrxjVbXChA2rB7FXhD9aewimUtt # TlolXdJuPbGR3F6H0glN1itij12Ay5c0DMqFPy5npYlzjNhxmPb8QgFZ8E+lxhcT # hG+OMmS9O5Mk7WKYWC1Iij7tWm45RbThPEUsfCPt6jIJYQqheOQs0ohJG9wyCZu3 # JUCgSBPG1nNY0hgBJ/X7un7e89BoRw8edwqP+sSigfDf+LquUggqRFgz+joTbfvj # Prq+1NTDIckDRZF6CDUSkZE3+Gq3qlIhw/2vS+bjYZrk04lP4x8d9JYPSkT3i8xc # +YT/apDUkT68FjJ6PudfS2j6xRtYt86nOuWuhYukTZ2z5FJ0c9XAJlJX2ZS9Az3n # AqKFCT+8UE4VYKnAJ61xDdqvAdEmKJUi5YutfuwH+j6sS4peLX0gg8mGlNi7y8JK # bsqNjE1ve8rkp24DuUoHmivs/m1ogJi9Jxp5IjB4d26MPhgojrxOpaYUVg98QS7d # os2ES47CSn4KFxqsFMZnZpgzKxIvRQ4C9bBbSClDOffHWHRJub6PCw5F9eCTH4dO # z/QPJ+smDY7bolF+gSg= # =3ejn # -----END PGP SIGNATURE----- # gpg: Signature made Thu 16 Jun 2022 03:59:44 AM PDT # gpg: using RSA key 96D8D110CF7AF8084F88590134C2B58765A47395 # gpg: issuer "qemu_oss@crudebyte.com" # gpg: Good signature from "Christian Schoenebeck <qemu_oss@crudebyte.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: ECAB 1A45 4014 1413 BA38 4926 30DB 47C3 A012 D5F4 # Subkey fingerprint: 96D8 D110 CF7A F808 4F88 5901 34C2 B587 65A4 7395 * tag 'pull-9p-20220616' of https://github.com/cschoenebeck/qemu: tests/9pfs: check fid being unaffected in fs_walk_2nd_nonexistent tests/9pfs: guard recent 'Twalk' behaviour fix 9pfs: fix 'Twalk' to only send error if no component walked 9pfs: refactor 'name_idx' -> 'nwalked' in v9fs_walk() tests/9pfs: compare QIDs in fs_walk_none() test tests/9pfs: Twalk with nwname=0 tests/9pfs: walk to non-existent dir Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-16Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into stagingRichard Henderson
* statistics subsystem * virtio reset cleanups * build system cleanups * fix Cirrus CI # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmKpooQUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroNlFwf+OugLGRZl3KVc7akQwUJe9gg2T31h # VkC+7Tei8FAwe8vDppVd+CYEIi0M3acxD2amRrv2etCCGSuySN1PbkfRcSfPBX01 # pRWpasdhfqnZR8Iidi7YW1Ou5CcGqKH49nunBhW10+osb/mu5sVscMuOJgTDj/lK # CpsmDyk6572yGmczjNLlmhYcTU36clHpAZgazZHwk1PU+B3fCKlYYyvUpT3ItJvd # cK92aIUWrfofl3yTy0k4IwvZwNjTBirlstOIomZ333xzSA+mm5TR+mTvGRTZ69+a # v+snpMp4ILDMoB5kxQ42kK5WpdiN//LnriA9CBFDtOidsDDn8kx7gJe2RA== # =Dxwa # -----END PGP SIGNATURE----- # gpg: Signature made Wed 15 Jun 2022 02:12:36 AM PDT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (21 commits) build: include pc-bios/ part in the ROMS variable meson: put cross compiler info in a separate section q35：Enable TSEG only when G_SMRAME and TSEG_EN both enabled build: fix check for -fsanitize-coverage-allowlist tests/vm: allow running tests in an unconfigured source tree configure: cleanup -fno-pie detection configure: update list of preserved environment variables virtio-mmio: cleanup reset virtio: stop ioeventfd on reset virtio-mmio: stop ioeventfd on legacy reset s390x: simplify virtio_ccw_reset_virtio block: add more commands to preconfig mode hmp: add filtering of statistics by name qmp: add filtering of statistics by name hmp: add filtering of statistics by provider qmp: add filtering of statistics by provider hmp: add basic "info stats" implementation cutils: add functions for IEC and SI prefixes qmp: add filtering of statistics by target vCPU kvm: Support for querying fd-based stats ... Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2022-06-16tests/9pfs: check fid being unaffected in fs_walk_2nd_nonexistentChristian Schoenebeck
Extend previously added test case by checking that fid was unaffected by 'Twalk' request (i.e. when 2nd path component of request being invalid). Do that by subsequently sending a 'Tgetattr' request with the fid previously used for 'Twalk'; that 'Tgetattr' request should return an 'Rlerror' response by 9p server with error code ENOENT as that fid is basically invalid. And as we are at it, also check that the QID returned by 'Twalk' is not identical to the root node's QID. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <6f0813cafdbf683cdac8b1492dd4ef8699c5b1d9.1647339025.git.qemu_oss@crudebyte.com>
2022-06-16tests/9pfs: guard recent 'Twalk' behaviour fixChristian Schoenebeck
Previous 9p patch fixed 'Twalk' request handling, which was previously not behaving as specified by the 9p2000 protocol spec. This patch adds a new test case which guards the new 'Twalk' behaviour in question. More specifically: it sends a 'Twalk' request where the 1st path component is valid, whereas the 2nd path component transmitted to server does not exist. The expected behaviour is that 9p server would respond by sending a 'Rwalk' response with exactly 1 QID (instead of 'Rlerror' response). Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <61bde2f44b87e24b70ec098dfb81765665b2dfcb.1647339025.git.qemu_oss@crudebyte.com>
2022-06-169pfs: fix 'Twalk' to only send error if no component walkedChristian Schoenebeck
Current implementation of 'Twalk' request handling always sends an 'Rerror' response if any error occured. The 9p2000 protocol spec says though: " If the first element cannot be walked for any reason, Rerror is returned. Otherwise, the walk will return an Rwalk message containing nwqid qids corresponding, in order, to the files that are visited by the nwqid successful elementwise walks; nwqid is therefore either nwname or the index of the first elementwise walk that failed. " http://ericvh.github.io/9p-rfc/rfc9p2000.html#anchor33 For that reason we are no longer leaving from an error path in function v9fs_walk(), unless really no path component could be walked successfully or if the request has been interrupted. Local variable 'nwalked' counts and reflects the number of path components successfully processed by background I/O thread, whereas local variable 'name_idx' subsequently counts and reflects the number of path components eventually accepted successfully by 9p server controller portion. New local variable 'any_err' is an aggregate variable reflecting whether any error occurred at all, while already existing variable 'err' only reflects the last error. Despite QIDs being delivered to client in a more relaxed way now, it is important to note though that fid still must remain unaffected if any error occurred. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <bc73e24258a75dc29458024c7936c8a036c3eac5.1647339025.git.qemu_oss@crudebyte.com>
2022-06-169pfs: refactor 'name_idx' -> 'nwalked' in v9fs_walk()Christian Schoenebeck
The local variable 'name_idx' is used in two loops in function v9fs_walk(). Let the first loop use its own variable 'nwalked' instead, which we will use in subsequent patch as the number of (requested) path components successfully walked by background I/O thread. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <d506308e7e343023c4db95d0e6053dd2627ed3c1.1647339025.git.qemu_oss@crudebyte.com>
2022-06-16tests/9pfs: compare QIDs in fs_walk_none() testChristian Schoenebeck
Extend previously added fs_walk_none() test by comparing the QID of the root fid with the QID of the cloned fid. They should be equal. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <5bbe9c6931b4600a9a23742f5ff2d38c1188237d.1647339025.git.qemu_oss@crudebyte.com>
2022-06-16tests/9pfs: Twalk with nwname=0Christian Schoenebeck
Send Twalk request with nwname=0. In this case no QIDs should be returned by 9p server; this is equivalent to walking to dot. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Message-Id: <b5ead2775000203607801f09bcefc04c493d8bfa.1647339025.git.qemu_oss@crudebyte.com>
2022-06-16tests/9pfs: walk to non-existent dirChristian Schoenebeck
Expect ENOENT Rlerror response when trying to walk to a non-existent directory. Signed-off-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Greg Kurz <groug@kaod.org> Based-on: <E1nTpyU-0000yR-9o@lizzy.crudebyte.com> Message-Id: <1f5aa50ace3ba3861ea31e8888367518282065a6.1647339025.git.qemu_oss@crudebyte.com>
2022-06-15Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into stagingRichard Henderson
Pull request This pull request includes an important aio=native I/O stall fix, the experimental vifo-user server, the io_uring_register_ring_fd() optimization for aio=io_uring, and an update to Vladimir Sementsov-Ogievskiy's maintainership details. # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEEhpWov9P5fNqsNXdanKSrs4Grc8gFAmKp/+AACgkQnKSrs4Gr # c8gg9wf/ZG1+eGR2NA0T1szlhtgy2bnp95hrLbKzP7tVxueFq7QCcsIsLGWqfnMd # RREUi6Tgx1v7Agk2oIyUcrjn5rt4LPVOKolVbK6e5Pyou2/Sf/ApkhRjRnzzfACE # J56H8gPU7fS4/8sJYCYGlWEr7pMmJMVJFPl2tNsErPwuZMSjo27n6UqDE/ZSZF1p # w1a+cwo+6YSjtJg4AFB/+izBam4+U6w1YhgZM6p6hx5a7GLoq/w59W6Yb119GANO # tg5qzmSHtMKTieORJmYAt83T1xS5d/iyca4w1PiYQxJsHsqwAaPpoyEhgGT+u+CA # hfb3HDdQCFyVKwlKD5H1a+WD/Hr11w== # =zcl8 # -----END PGP SIGNATURE----- # gpg: Signature made Wed 15 Jun 2022 08:50:56 AM PDT # gpg: using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] * tag 'block-pull-request' of https://gitlab.com/stefanha/qemu: linux-aio: explain why max batch is checked in laio_io_unplug() linux-aio: fix unbalanced plugged counter in laio_io_unplug() vfio-user: handle reset of remote device vfio-user: handle device interrupts vfio-user: handle PCI BAR accesses vfio-user: handle DMA mappings vfio-user: IOMMU support for remote device vfio-user: handle PCI config space accesses vfio-user: run vfio-user context vfio-user: find and init PCI device vfio-user: instantiate vfio-user context vfio-user: define vfio-user-server object vfio-user: build library remote/machine: add vfio-user property remote/machine: add HotplugHandler for remote machine qdev: unplug blocker for devices Use io_uring_register_ring_fd() to skip fd operations MAINTAINERS: update Vladimir's address and repositories Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2025-02-24 22:38:00 +0000