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2020-11-09target/riscv: Add a virtualised MMU ModeAlistair Francis
Add a new MMU mode that includes the current virt mode. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 4b301bc0ea36da962fc1605371b65019ac3073df.1604464950.git.alistair.francis@wdc.com
2020-11-04Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201104-pull-request' ↵Peter Maydell
into staging ui: run screendump in coroutine # gpg: Signature made Wed 04 Nov 2020 13:53:50 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20201104-pull-request: console: make QMP/HMP screendump run in coroutine console: modify ppm_save to take a pixman image ref coroutine: let CoQueue wake up outside a coroutine Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-04Merge remote-tracking branch 'remotes/kraxel/tags/usb-20201104-pull-request' ↵Peter Maydell
into staging usb: bugfixes for usb-serial # gpg: Signature made Wed 04 Nov 2020 12:13:05 GMT # gpg: using RSA key 4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" [full] # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" [full] # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" [full] # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20201104-pull-request: dev-serial: store flow control and xon/xoff characters dev-serial: add support for setting data_bits in QEMUSerialSetParams dev-serial: add always-plugged property to ensure USB device is always attached dev-serial: replace DeviceOutVendor/DeviceInVendor with equivalent macros from usb.h dev-serial: add trace-events for baud rate and data parameters dev-serial: convert from DPRINTF to trace-events dev-serial: use USB_SERIAL QOM macro for USBSerialState assignments dev-serial: style changes to improve readability and checkpatch fixes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-04Merge remote-tracking branch ↵Peter Maydell
'remotes/philmd-gitlab/tags/mips-fixes-20201103' into staging MIPS patches queue - Removal of the 'r4k' machine (deprecated before 5.0) - Fix LGPL license text (Chetan Pant) - Support unaligned accesses on Loongson-3 (Huacai Chen) - Fix out-of-bound access in Loongson-3 embedded I/O interrupt controller (Alex Chen) CI jobs results: . https://cirrus-ci.com/build/6324890389184512 . https://gitlab.com/philmd/qemu/-/pipelines/211275262 . https://travis-ci.org/github/philmd/qemu/builds/741188958 # gpg: Signature made Tue 03 Nov 2020 17:30:30 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-fixes-20201103: target/mips: Add unaligned access support for MIPS64R6 and Loongson-3 target/mips: Fix Lesser GPL version number hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/write hw/mips/boston: Fix Lesser GPL version number hw/mips: Fix Lesser GPL version number hw/mips: Remove the 'r4k' machine Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-04console: make QMP/HMP screendump run in coroutineMarc-André Lureau
Thanks to the monitors' coroutine support (merge commit b7092cda1b3), the screendump handler can trigger a graphic_hw_update(), yield and let the main loop run until update is done. Then the handler is resumed, and ppm_save() will write the screen image to disk in the coroutine context. The IO is still blocking though, as the file is set blocking so far, this could be addressed by some future change (with other caveats). Related to: https://bugzilla.redhat.com/show_bug.cgi?id=1230527 Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 20201027133602.3038018-4-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04console: modify ppm_save to take a pixman image refMarc-André Lureau
The function is going to be called from a coroutine, and may yield. Let's ensure our image reference doesn't change over time (due to resize etc) by keeping a ref. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201027133602.3038018-3-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04coroutine: let CoQueue wake up outside a coroutineMarc-André Lureau
The assert() was added in commit b681a1c73e15 ("block: Repair the throttling code."), when the qemu_co_queue_do_restart() function required to be running in a coroutine. It was later made unnecessary in commit a9d9235567e7 ("coroutine-lock: reschedule coroutine on the AioContext it was running on"). Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Kevin Wolf <kwolf@redhat.com> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Message-id: 20201027133602.3038018-2-marcandre.lureau@redhat.com Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: store flow control and xon/xoff charactersMark Cave-Ayland
Note that whilst the device does not do anything with these values, they are logged with trace events and stored to allow future implementation. The default flow control is set to none at reset as documented in the Linux ftdi_sio.h header file. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Message-id: 20201027150456.24606-9-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: add support for setting data_bits in QEMUSerialSetParamsMark Cave-Ayland
Also implement the behaviour reported in Linux's ftdi_sio.c whereby if an invalid data_bits value is provided then the hardware defaults to using 8. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201027150456.24606-8-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: add always-plugged property to ensure USB device is always attachedMark Cave-Ayland
Some operating systems will generate a new device ID when a USB device is unplugged and then replugged into the USB. If this is done whilst switching between multiple applications over a virtual serial port, the change of device ID requires going back into the OS/application to locate the new device accordingly. Add a new always-plugged property that if specified will ensure that the device always remains attached to the USB regardless of the state of the backend chardev. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Message-id: 20201027150456.24606-7-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: replace DeviceOutVendor/DeviceInVendor with equivalent macros ↵Mark Cave-Ayland
from usb.h The DeviceOutVendor and DeviceInVendor macros can be replaced with their equivalent VendorDeviceOutRequest and VendorDeviceRequest macros from usb.h. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201027150456.24606-6-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: add trace-events for baud rate and data parametersMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201027150456.24606-5-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: convert from DPRINTF to trace-eventsMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201027150456.24606-4-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: use USB_SERIAL QOM macro for USBSerialState assignmentsMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20201027150456.24606-3-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-04dev-serial: style changes to improve readability and checkpatch fixesMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Message-id: 20201027150456.24606-2-mark.cave-ayland@ilande.co.uk Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
2020-11-03Update version for v5.2.0-rc0 releasev5.2.0-rc0Peter Maydell
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03Merge remote-tracking branch ↵Peter Maydell
'remotes/alistair/tags/pull-riscv-to-apply-20201103' into staging This series adds support for migration to RISC-V QEMU and expands the Microchip PFSoC to allow unmodified HSS and Linux boots. # gpg: Signature made Tue 03 Nov 2020 15:19:45 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20201103: target/riscv/csr.c : add space before the open parenthesis '(' hw/riscv: microchip_pfsoc: Hook the I2C1 controller hw/riscv: microchip_pfsoc: Correct DDR memory map hw/riscv: microchip_pfsoc: Map the reserved memory at address 0 hw/riscv: microchip_pfsoc: Connect the SYSREG module hw/misc: Add Microchip PolarFire SoC SYSREG module support hw/riscv: microchip_pfsoc: Connect the IOSCB module hw/misc: Add Microchip PolarFire SoC IOSCB module support hw/riscv: microchip_pfsoc: Connect DDR memory controller modules hw/misc: Add Microchip PolarFire SoC DDR Memory Controller support hw/riscv: microchip_pfsoc: Document where to look at the SoC memory maps target/riscv: Add sifive_plic vmstate target/riscv: Add V extension state description target/riscv: Add H extension state description target/riscv: Add PMP state description target/riscv: Add basic vmstate description of CPU target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit hw/riscv: virt: Allow passing custom DTB hw/riscv: sifive_u: Allow passing custom DTB Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into stagingPeter Maydell
Block layer patches: - iotests: Fix pylint/mypy warnings with Python 3.9 - qmp: fix aio_poll() assertion failure on Windows - Some minor fixes # gpg: Signature made Tue 03 Nov 2020 15:25:01 GMT # gpg: using RSA key DC3DEB159A9AF95D3D7456FE7F09B272C88F2FD6 # gpg: issuer "kwolf@redhat.com" # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" [full] # Primary key fingerprint: DC3D EB15 9A9A F95D 3D74 56FE 7F09 B272 C88F 2FD6 * remotes/kevin/tags/for-upstream: block/vvfat: Fix bad printf format specifiers iotests: Use Python 3 style super() iotests: Disable unsubscriptable-object in pylint iotests.py: Fix type check errors in wait_migration() qemu-img convert: Free @sn_opts in all error cases qmp: fix aio_poll() assertion failure on Windows Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-11-03target/mips: Add unaligned access support for MIPS64R6 and Loongson-3Huacai Chen
MIPSR6 (not only MIPS32R6) processors support unaligned access in hardware, so set MO_UNALN in their default_tcg_memop_mask. Btw, new Loongson-3 (such as Loongson-3A4000) also support unaligned access, since both old and new Loongson-3 use the same binaries, we can simply set MO_UNALN for all Loongson-3 processors. Signed-off-by: Huacai Chen <chenhc@lemote.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <1604053541-27822-3-git-send-email-chenhc@lemote.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03target/mips: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201016143509.26692-1-chetan4windows@gmail.com> [PMD: Split hw/ vs target/] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/writeAlexChen
According to the loongson spec (http://www.loongson.cn/uploadfile/cpu/3B1500/Loongson_3B1500_cpu_user_1.pdf) and the macro definition(#define R_PERCORE_ISR(x) (0x40 + 0x8 * x)), we know that the ISR size per CORE is 8, so here we need to divide (addr - R_PERCORE_ISR(0)) by 8, not 4. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <5FA12391.8090400@huawei.com> [PMD: Shortened subject] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/mips/boston: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201023122633.19466-1-chetan4windows@gmail.com> [PMD: Added hw/mips/ prefix in subject] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/mips: Fix Lesser GPL version numberChetan Pant
There is no "version 2" of the "Lesser" General Public License. It is either "GPL version 2.0" or "Lesser GPL version 2.1". This patch replaces all occurrences of "Lesser GPL version 2" with "Lesser GPL version 2.1" in comment section. Signed-off-by: Chetan Pant <chetan4windows@gmail.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20201016143509.26692-1-chetan4windows@gmail.com> [PMD: Split hw/ vs target/] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2020-11-03hw/mips: Remove the 'r4k' machinePhilippe Mathieu-Daudé
We deprecated the support for the 'r4k' machine for the 5.0 release (commit d32dc61421), which means that our deprecation policy allows us to drop it in release 5.2. Remove the code. To repeat the rationale from the deprecation note: - this virtual machine has no specification - the Linux kernel dropped support for it 10 years ago Users are recommended to use the Malta board instead. Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Thomas Huth <thuth@redhat.com> ACKed-by: Peter Krempa <pkrempa@redhat.com> Message-Id: <20201102201311.2220005-1-f4bug@amsat.org>
2020-11-03block/vvfat: Fix bad printf format specifiersAlexChen
We should use printf format specifier "%u" instead of "%d" for argument of type "unsigned int". In addition, fix two error format problems found by checkpatch.pl: ERROR: space required after that ',' (ctx:VxV) + fprintf(stderr,"%s attributes=0x%02x begin=%u size=%d\n", ^ ERROR: line over 90 characters + fprintf(stderr, "%d, %s (%u, %d)\n", i, commit->path ? commit->path : "(null)", commit->param.rename.cluster, commit->action); Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Alex Chen <alex.chen@huawei.com> Message-Id: <5FA12620.6030705@huawei.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03iotests: Use Python 3 style super()Kevin Wolf
pylint complains about the use of super with the current class and instance as arguments in VM.__init__(): iotests.py:546:8: R1725: Consider using Python 3 style super() without arguments (super-with-arguments) No reason not to follow the advice and make it happy, so let's do this. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201027163806.290960-4-kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03iotests: Disable unsubscriptable-object in pylintKevin Wolf
When run with Python 3.9, pylint incorrectly warns about things like Optional[foo] because it doesn't recognise Optional as unsubscriptable. This is a known pylint bug: https://github.com/PyCQA/pylint/issues/3882 Just disable this check to get rid of the warnings. Disabling this shouldn't make us miss any real bug because mypy also has a similar check ("... is not indexable"). Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201027163806.290960-3-kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03iotests.py: Fix type check errors in wait_migration()Kevin Wolf
Commit 1847a4a8c20 clarified that event_wait() can return None (though only with timeout=0) and commit f12a282ff47 annotated it as returning Optional[QMPMessage]. Type checks in wait_migration() fail because of the unexpected optional return type: iotests.py:750: error: Value of type variable "Msg" of "log" cannot be "Optional[Dict[str, Any]]" iotests.py:751: error: Value of type "Optional[Dict[str, Any]]" is not indexable iotests.py:754: error: Value of type "Optional[Dict[str, Any]]" is not indexable Fortunately, the non-zero default timeout is used in the event_wait() call, so we can make mypy happy by just asserting this. Signed-off-by: Kevin Wolf <kwolf@redhat.com> Message-Id: <20201027163806.290960-2-kwolf@redhat.com> Reviewed-by: John Snow <jsnow@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03qemu-img convert: Free @sn_opts in all error casesTuguoyi
@sn_opts is initialized at the beginning, so it should be deleted after jumping to the lable 'fail_getopt' Signed-off-by: Guoyi Tu <tu.guoyi@h3c.com> Message-Id: <6ff1c5d372944494be3932274f75485d@h3c.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03qmp: fix aio_poll() assertion failure on WindowsVolker Rümelin
Commit 9ce44e2ce2 "qmp: Move dispatcher to a coroutine" modified aio_poll() in util/aio-posix.c to avoid an assertion failure. This change is missing in util/aio-win32.c. Apply the changes to util/aio-posix.c to util/aio-win32.c too. This fixes an assertion failure on Windows whenever QEMU exits. $ ./qemu-system-x86_64.exe -machine pc,accel=tcg -display gtk ** ERROR:../qemu/util/aio-win32.c:337:aio_poll: assertion failed: (in_aio_context_home_thread(ctx)) Bail out! ERROR:../qemu/util/aio-win32.c:337:aio_poll: assertion failed: (in_aio_context_home_thread(ctx)) Fixes: 9ce44e2ce2 ("qmp: Move dispatcher to a coroutine") Signed-off-by: Volker Rümelin <vr_qemu@t-online.de> Message-Id: <20201021064033.8600-1-vr_qemu@t-online.de> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: Kevin Wolf <kwolf@redhat.com>
2020-11-03target/riscv/csr.c : add space before the open parenthesis '('Xinhao Zhang
Fix code style. Space required before the open parenthesis '('. Signed-off-by: Xinhao Zhang <zhangxinhao1@huawei.com> Signed-off-by: Kai Deng <dengkai1@huawei.com> Reported-by: Euler Robot <euler.robot@huawei.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201030004815.4172849-1-zhangxinhao1@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Hook the I2C1 controllerBin Meng
The latest SD card image [1] released by Microchip ships a Linux kernel with built-in PolarFire SoC I2C driver support. The device tree file includes the description for the I2C1 node hence kernel tries to probe the I2C1 device during boot. It is enough to create an unimplemented device for I2C1 to allow the kernel to continue booting to the shell. [1] ftp://ftpsoc.microsemi.com/outgoing/core-image-minimal-dev-icicle-kit-es-sd-20201009141623.rootfs.wic.gz Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-11-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Correct DDR memory mapBin Meng
When system memory is larger than 1 GiB (high memory), PolarFire SoC maps it at address 0x10_0000_0000. Address 0xC000_0000 and above is aliased to the same 1 GiB low memory with different cache attributes. At present QEMU maps the system memory contiguously from 0x8000_0000. This corrects the wrong QEMU logic. Note address 0x14_0000_0000 is the alias to the high memory, and even physical memory is only 1 GiB, the HSS codes still tries to probe the high memory alias address. It seems there is no issue on the real hardware, so we will have to take that into the consideration in our emulation. Due to this, we we increase the default system memory size to 1537 MiB (the minimum required high memory size by HSS) so that user gets notified an error when less than 1537 MiB is specified. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201101170538.3732-1-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Map the reserved memory at address 0Bin Meng
Somehow HSS needs to access address 0 [1] for the DDR calibration data which is in the chipset's reserved memory. Let's map it. [1] See the config_copy() calls in various places in ddr_setup() in the HSS source codes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-9-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Connect the SYSREG moduleBin Meng
Previously SYSREG was created as an unimplemented device. Now that we have a simple SYSREG module, connect it. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-8-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC SYSREG module supportBin Meng
This creates a minimum model for Microchip PolarFire SoC SYSREG module. It only implements the ENVM_CR register to tell guest software that eNVM is running at the configured divider rate. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-7-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Connect the IOSCB moduleBin Meng
Previously IOSCB_CFG was created as an unimplemented device. With the new IOSCB model, its memory range is already covered by the IOSCB hence remove the previous unimplemented device creation in the SoC codes. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-6-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC IOSCB module supportBin Meng
This creates a model for PolarFire SoC IOSCB [1] module. It actually contains lots of sub-modules like various PLLs to control different peripherals. Only the mininum capabilities are emulated to make the HSS DDR memory initialization codes happy. Lots of sub-modules are created as an unimplemented devices. [1] PF_SoC_RegMap_V1_1/MPFS250T/mpfs250t_ioscb_memmap_dri.htm in https://www.microsemi.com/document-portal/doc_download/1244581-polarfire-soc-register-map Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-5-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Connect DDR memory controller modulesBin Meng
Connect DDR SGMII PHY module and CFG module to the PolarFire SoC. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-4-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/misc: Add Microchip PolarFire SoC DDR Memory Controller supportBin Meng
The PolarFire SoC DDR Memory Controller mainly includes 2 modules, called SGMII PHY module and the CFG module, as documented in the chipset datasheet. This creates a single file that groups these 2 modules, providing the minimum functionalities that make the HSS DDR initialization codes happy. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-3-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: microchip_pfsoc: Document where to look at the SoC memory mapsBin Meng
It is not easy to find out the memory map for a specific component in the PolarFire SoC as the information is scattered in different documents. Add some comments so that people can know where to get such information from the Microchip website. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 1603863010-15807-2-git-send-email-bmeng.cn@gmail.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add sifive_plic vmstateYifei Jiang
Add sifive_plic vmstate for supporting sifive_plic migration. Current vmstate framework only supports one structure parameter as num field to describe variable length arrays, so introduce num_enables. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-7-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add V extension state descriptionYifei Jiang
In the case of supporting V extension, add V extension description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-6-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add H extension state descriptionYifei Jiang
In the case of supporting H extension, add H extension description to vmstate_riscv_cpu. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-5-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add PMP state descriptionYifei Jiang
In the case of supporting PMP feature, add PMP state description to vmstate_riscv_cpu. 'vmstate_pmp_addr' and 'num_rules' could be regenerated by pmp_update_rule(). But there exists the problem of updating num_rules repeatedly in pmp_update_rule(). So here extracts pmp_update_rule_addr() and pmp_update_rule_nums() to update 'vmstate_pmp_addr' and 'num_rules' respectively. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-4-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Add basic vmstate description of CPUYifei Jiang
Add basic CPU state description to the newly created machine.c Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-3-jiangyifei@huawei.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unitYifei Jiang
mstatus/mstatush and vsstatus/vsstatush are two halved for RISCV32. This patch expands mstatus and vsstatus to uint64_t instead of target_ulong so that it can be saved as one unit and reduce some ifdefs in the code. Signed-off-by: Yifei Jiang <jiangyifei@huawei.com> Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201026115530.304-2-jiangyifei@huawei.com
2020-11-03hw/riscv: virt: Allow passing custom DTBAnup Patel
Extend virt machine to allow passing custom DTB using "-dtb" command-line parameter. This will help users pass modified DTB to virt machine. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201022053225.2596110-2-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03hw/riscv: sifive_u: Allow passing custom DTBAnup Patel
Extend sifive_u machine to allow passing custom DTB using "-dtb" command-line parameter. This will help users pass modified DTB or Linux SiFive DTB to sifive_u machine. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-id: 20201022053225.2596110-1-anup.patel@wdc.com Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-11-03Merge remote-tracking branch ↵Peter Maydell
'remotes/berrange-gitlab/tags/sock-next-pull-request' into staging - Fix inverted logic in abstract socket QAPI support - Only report abstract socket support in QAPI on Linux hosts - Expand test coverage - Misc other code cleanups # gpg: Signature made Tue 03 Nov 2020 14:00:53 GMT # gpg: using RSA key DAF3A6FDB26B62912D0E8E3FBE86EBB415104FDF # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>" [full] # gpg: aka "Daniel P. Berrange <berrange@redhat.com>" [full] # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E 8E3F BE86 EBB4 1510 4FDF * remotes/berrange-gitlab/tags/sock-next-pull-request: sockets: Make abstract UnixSocketAddress depend on CONFIG_LINUX sockets: Bypass "replace empty @path" for abstract unix sockets char-socket: Fix qemu_chr_socket_address() for abstract sockets sockets: Fix socket_sockaddr_to_address_unix() for abstract sockets sockets: Fix default of UnixSocketAddress member @tight test-util-sockets: Test the complete abstract socket matrix test-util-sockets: Synchronize properly, don't sleep(1) test-util-sockets: Factor out test_socket_unix_abstract_one() test-util-sockets: Clean up SocketAddress construction test-util-sockets: Correct to set has_abstract, has_tight test-util-sockets: Plug file descriptor leak Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-23 17:45:11 +0000