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QEMU is a generic and open source machine & userspace emulator and virtualizer
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Author
2020-12-19
qobject: Make qobject_to_json_pretty() take a pretty argument
Markus Armbruster
2020-12-19
monitor: Use GString instead of QString for output buffer
Markus Armbruster
2020-12-19
hmp: Simplify how qmp_human_monitor_command() gets output
Markus Armbruster
2020-12-19
test-visitor-serialization: Clean up test_primitives()
Markus Armbruster
2020-12-19
test-visitor-serialization: Drop insufficient precision workaround
Markus Armbruster
2020-12-19
string-output-visitor: Fix to use sufficient precision
Markus Armbruster
2020-12-19
test-string-output-visitor: Cover "unround" number
Markus Armbruster
2020-12-19
qobject: Fix qnum_to_string() to use sufficient precision
Markus Armbruster
2020-12-19
tests/check-qnum: Cover qnum_to_string() for "unround" argument
Markus Armbruster
2020-12-19
tests/check-qjson: Replace redundant large_number()
Markus Armbruster
2020-12-19
tests/check-qjson: Cover number 2^63
Markus Armbruster
2020-12-19
tests/check-qjson: Examine QNum more thoroughly
Markus Armbruster
2020-12-19
tests/check-qjson: Don't skip funny QNumber to JSON conversions
Markus Armbruster
2020-12-19
qapi: Use QAPI_LIST_PREPEND() where possible
Eric Blake
2020-12-19
migration: Refactor migrate_cap_add
Eric Blake
2020-12-19
rocker: Revamp fp_port_get_info
Eric Blake
2020-12-18
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201...
Peter Maydell
2020-12-17
riscv/opentitan: Update the OpenTitan memory layout
Alistair Francis
2020-12-17
hw/riscv: Use the CPU to determine if 32-bit
Alistair Francis
2020-12-17
target/riscv: cpu: Set XLEN independently from target
Alistair Francis
2020-12-17
target/riscv: csr: Remove compile time XLEN checks
Alistair Francis
2020-12-17
target/riscv: cpu_helper: Remove compile time XLEN checks
Alistair Francis
2020-12-17
target/riscv: cpu: Remove compile time XLEN checks
Alistair Francis
2020-12-17
target/riscv: Specify the XLEN for CPUs
Alistair Francis
2020-12-17
target/riscv: Add a riscv_cpu_is_32bit() helper function
Alistair Francis
2020-12-17
target/riscv: fpu_helper: Match function defs in HELPER macros
Alistair Francis
2020-12-17
hw/riscv: sifive_u: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: spike: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: virt: Remove compile time XLEN checks
Alistair Francis
2020-12-17
hw/riscv: boot: Remove compile time XLEN checks
Alistair Francis
2020-12-17
riscv: virt: Remove target macro conditionals
Alistair Francis
2020-12-17
riscv: spike: Remove target macro conditionals
Alistair Francis
2020-12-17
target/riscv: Add a TYPE_RISCV_CPU_BASE CPU
Alistair Francis
2020-12-17
hw/riscv: Expand the is 32-bit check to support more CPUs
Alistair Francis
2020-12-17
intc/ibex_plic: Clear interrupts that occur during claim process
Alistair Francis
2020-12-17
target/riscv: Fix definition of MSTATUS_TW and MSTATUS_TSR
Alex Richardson
2020-12-17
target/riscv: Fix the bug of HLVX/HLV/HSV
Yifei Jiang
2020-12-17
hw/core/register.c: Don't use '#' flag of printf format
Xinhao Zhang
2020-12-17
hw/riscv: microchip_pfsoc: add QSPI NOR flash
Vitaly Wool
2020-12-17
hw/riscv: sifive_u: Add UART1 DT node in the generated DTB
Anup Patel
2020-12-17
Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request'...
Peter Maydell
2020-12-16
cpu: Remove unnecessary noop methods
Eduardo Habkost
2020-12-16
tcg: Make CPUClass.debug_excp_handler optional
Eduardo Habkost
2020-12-16
tcg: make CPUClass.cpu_exec_* optional
Eduardo Habkost
2020-12-16
tcg: cpu_exec_{enter,exit} helpers
Eduardo Habkost
2020-12-16
i386: tcg: remove inline from cpu_load_eflags
Claudio Fontana
2020-12-16
i386: move TCG cpu class initialization to tcg/
Claudio Fontana
2020-12-16
x86/cpu: Add AVX512_FP16 cpu feature
Cathy Zhang
2020-12-16
i386: move hyperv_limits initialization to x86_cpu_realizefn()
Vitaly Kuznetsov
2020-12-16
i386: move hyperv_version_id initialization to x86_cpu_realizefn()
Vitaly Kuznetsov
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