slackcoder/qemu - QEMU is a generic and open source machine & userspace emulator and virtualizer

Age	Commit message (Expand)	Author
2020-11-09	target/riscv: Remove the HS_TWO_STAGE flag	Alistair Francis
2020-11-09	target/riscv: Set the virtualised MMU mode when doing hyp accesses	Alistair Francis
2020-11-09	target/riscv: Add a virtualised MMU Mode	Alistair Francis
2020-11-04	Merge remote-tracking branch 'remotes/kraxel/tags/ui-20201104-pull-request' i...	Peter Maydell
2020-11-04	Merge remote-tracking branch 'remotes/kraxel/tags/usb-20201104-pull-request' ...	Peter Maydell
2020-11-04	Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-fixes-20201103'...	Peter Maydell
2020-11-04	console: make QMP/HMP screendump run in coroutine	Marc-André Lureau
2020-11-04	console: modify ppm_save to take a pixman image ref	Marc-André Lureau
2020-11-04	coroutine: let CoQueue wake up outside a coroutine	Marc-André Lureau
2020-11-04	dev-serial: store flow control and xon/xoff characters	Mark Cave-Ayland
2020-11-04	dev-serial: add support for setting data_bits in QEMUSerialSetParams	Mark Cave-Ayland
2020-11-04	dev-serial: add always-plugged property to ensure USB device is always attached	Mark Cave-Ayland
2020-11-04	dev-serial: replace DeviceOutVendor/DeviceInVendor with equivalent macros fro...	Mark Cave-Ayland
2020-11-04	dev-serial: add trace-events for baud rate and data parameters	Mark Cave-Ayland
2020-11-04	dev-serial: convert from DPRINTF to trace-events	Mark Cave-Ayland
2020-11-04	dev-serial: use USB_SERIAL QOM macro for USBSerialState assignments	Mark Cave-Ayland
2020-11-04	dev-serial: style changes to improve readability and checkpatch fixes	Mark Cave-Ayland
2020-11-03	Update version for v5.2.0-rc0 releasev5.2.0-rc0	Peter Maydell
2020-11-03	Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20201...	Peter Maydell
2020-11-03	Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging	Peter Maydell
2020-11-03	target/mips: Add unaligned access support for MIPS64R6 and Loongson-3	Huacai Chen
2020-11-03	target/mips: Fix Lesser GPL version number	Chetan Pant
2020-11-03	hw/intc/loongson: Fix incorrect 'core' calculation in liointc_read/write	AlexChen
2020-11-03	hw/mips/boston: Fix Lesser GPL version number	Chetan Pant
2020-11-03	hw/mips: Fix Lesser GPL version number	Chetan Pant
2020-11-03	hw/mips: Remove the 'r4k' machine	Philippe Mathieu-Daudé
2020-11-03	block/vvfat: Fix bad printf format specifiers	AlexChen
2020-11-03	iotests: Use Python 3 style super()	Kevin Wolf
2020-11-03	iotests: Disable unsubscriptable-object in pylint	Kevin Wolf
2020-11-03	iotests.py: Fix type check errors in wait_migration()	Kevin Wolf
2020-11-03	qemu-img convert: Free @sn_opts in all error cases	Tuguoyi
2020-11-03	qmp: fix aio_poll() assertion failure on Windows	Volker Rümelin
2020-11-03	target/riscv/csr.c : add space before the open parenthesis '('	Xinhao Zhang
2020-11-03	hw/riscv: microchip_pfsoc: Hook the I2C1 controller	Bin Meng
2020-11-03	hw/riscv: microchip_pfsoc: Correct DDR memory map	Bin Meng
2020-11-03	hw/riscv: microchip_pfsoc: Map the reserved memory at address 0	Bin Meng
2020-11-03	hw/riscv: microchip_pfsoc: Connect the SYSREG module	Bin Meng
2020-11-03	hw/misc: Add Microchip PolarFire SoC SYSREG module support	Bin Meng
2020-11-03	hw/riscv: microchip_pfsoc: Connect the IOSCB module	Bin Meng
2020-11-03	hw/misc: Add Microchip PolarFire SoC IOSCB module support	Bin Meng
2020-11-03	hw/riscv: microchip_pfsoc: Connect DDR memory controller modules	Bin Meng
2020-11-03	hw/misc: Add Microchip PolarFire SoC DDR Memory Controller support	Bin Meng
2020-11-03	hw/riscv: microchip_pfsoc: Document where to look at the SoC memory maps	Bin Meng
2020-11-03	target/riscv: Add sifive_plic vmstate	Yifei Jiang
2020-11-03	target/riscv: Add V extension state description	Yifei Jiang
2020-11-03	target/riscv: Add H extension state description	Yifei Jiang
2020-11-03	target/riscv: Add PMP state description	Yifei Jiang
2020-11-03	target/riscv: Add basic vmstate description of CPU	Yifei Jiang
2020-11-03	target/riscv: Merge m/vsstatus and m/vsstatush into one uint64_t unit	Yifei Jiang
2020-11-03	hw/riscv: virt: Allow passing custom DTB	Anup Patel