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2014-06-09char: xilinx_uartlite: Don't reset from initPeter Crosthwaite
This refresh of the device state is intended to be a reset side effect. Move it to a proper reset handler rather than do it at init time. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-06-09net: xilinx_ethlite: Convert to realize()Peter Crosthwaite
SysBusDevice::init is depracated. Convert to Object::init and Device::realize as prescribed by QOM conventions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-06-09net: xilinx_ethlite: Don't reset from initPeter Crosthwaite
This zeroing-out of the rxbuf variable (ping pong state) is a reset side effect. Extract into a proper reset. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-06-09timer: xilinx_timer: Convert to realize()Peter Crosthwaite
SysBusDevice::init is depracated. Convert to Object::init and Device::realize as prescribed by QOM conventions. Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2014-06-05Merge remote-tracking branch 'remotes/mcayland/qemu-sparc' into stagingPeter Maydell
* remotes/mcayland/qemu-sparc: apb: implement IOMMU translation for PCI host bridge apb: handle reading/writing of IOMMU control registers apb: fix IOMMU register sizes apb: Move IOMMU registers into a separate IOMMUState struct tcx: move initialisation from realizefn to initfn tcx: move initialisation from SysBusDevice class to TCX class realizefn cg3: add extra check to prevent CG3 register array overflow cg3: move initialisation from realizefn to initfn Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05Merge remote-tracking branch 'remotes/mdroth/qga-pull-2014-06-05' into stagingPeter Maydell
* remotes/mdroth/qga-pull-2014-06-05: qga: Fix handle fd leak in acquire_privilege() Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stagingPeter Maydell
pc,pci,virtio,qdev fixes, tests new tests for SMBIOS SMBIOS fixes pc, pci fixes qdev patches stayed on list for a month with no review, as I told people on KVM forum I'm merging stuch patches if they look fine. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> * remotes/mst/tags/for_upstream: qdev: Add test of qdev_prop_check_global qdev: Display warning about unused -global tests: add smbios testing tests: rename acpi-test to bios-tables-test virtio-balloon: return empty data when no stats are available pcie_host: Turn pcie_host_init() into an instance_init SMBIOS: Fix type 17 field sizes SMBIOS: Update Type 0 struct generator for machines >= 2.1 SMBIOS: Fix endian-ness when populating multi-byte fields serial-pci: Set prog interface field of pci config to 16550 compatible Conflicts: include/hw/i386/pc.h [PMM: fixed trivial conflict in pc.h] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05Merge remote-tracking branch 'remotes/bonzini/softmmu-smap' into stagingPeter Maydell
* remotes/bonzini/softmmu-smap: (33 commits) target-i386: cleanup x86_cpu_get_phys_page_debug target-i386: fix protection bits in the TLB for SMEP target-i386: support long addresses for 4MB pages (PSE-36) target-i386: raise page fault for reserved bits in large pages target-i386: unify reserved bits and NX bit check target-i386: simplify pte/vaddr calculation target-i386: raise page fault for reserved physical address bits target-i386: test reserved PS bit on PML4Es target-i386: set correct error code for reserved bit access target-i386: introduce support for 1 GB pages target-i386: introduce do_check_protect label target-i386: tweak handling of PG_NX_MASK target-i386: commonize checks for PAE and non-PAE target-i386: commonize checks for 4MB and 4KB pages target-i386: commonize checks for 2MB and 4KB pages target-i386: fix coding standards in x86_cpu_handle_mmu_fault target-i386: simplify SMAP handling in MMU_KSMAP_IDX target-i386: fix kernel accesses with SMAP and CPL = 3 target-i386: move check_io helpers to seg_helper.c target-i386: rename KSMAP to KNOSMAP ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05apb: implement IOMMU translation for PCI host bridgeMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-05apb: handle reading/writing of IOMMU control registersMark Cave-Ayland
While the registers are documented as being 64-bit, Linux seems to access them in two halves as 2 x 32-bit accesses. Make sure that we can correctly handle this case. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-05apb: fix IOMMU register sizesMark Cave-Ayland
According to the referenced documentation, the IOMMU has 3 64-bit registers consisting of a control register, base register and flush register. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-05apb: Move IOMMU registers into a separate IOMMUState structMark Cave-Ayland
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
2014-06-05tcx: move initialisation from realizefn to initfnMark Cave-Ayland
Initialisation cleanup as suggested by Andreas. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Andreas Färber <afaerber@suse.de>
2014-06-05tcx: move initialisation from SysBusDevice class to TCX class realizefnMark Cave-Ayland
This is an intermediate step to bring TCX in line with CG3. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Andreas Färber <afaerber@suse.de>
2014-06-05cg3: add extra check to prevent CG3 register array overflowMark Cave-Ayland
The case statements in the CG3 read and write register routines have a maximum value of CG3_REG_SIZE, so if a value were written to this offset then it would overflow the register array. Currently this cannot be exploited since the MemoryRegion restricts accesses to the range 0 ... CG3_REG_SIZE - 1, but it seems worth clarifying this for future review and/or static analysis. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05cg3: move initialisation from realizefn to initfnMark Cave-Ayland
Initialisation cleanup as suggested by Andreas. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Andreas Färber <afaerber@suse.de>
2014-06-05Merge remote-tracking branch 'remotes/rth/tcg-next' into stagingPeter Maydell
* remotes/rth/tcg-next: TCG: Fix tcg_gen_extr_i64_tl for 32bit tcg: Remove TCG_TARGET_HAS_new_ldst tci: Convert to new ldst opcodes tcg-i386: Fix win64 qemu store Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05Merge remote-tracking branch 'remotes/kvm/uq/master' into stagingPeter Maydell
* remotes/kvm/uq/master: kvm: Fix eax for cpuid leaf 0x40000000 kvmclock: Ensure proper env->tsc value for kvmclock_current_nsec calculation kvm: Enable -cpu option to hide KVM kvm: Ensure negative return value on kvm_init() error handling path target-i386: set CC_OP to CC_OP_EFLAGS in cpu_load_eflags target-i386: get CPL from SS.DPL target-i386: rework CPL checks during task switch, preparing for next patch target-i386: fix segment flags for SMM and VM86 mode target-i386: Fix vm86 mode regression introduced in fd460606fd6f. kvm_stat: allow choosing between tracepoints and old stats kvmclock: Ensure time in migration never goes backward Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05Merge remote-tracking branch 'remotes/kraxel/tags/pull-input-10' into stagingPeter Maydell
updates for docs/multiseat.txt input: add support for kbd delays # gpg: Signature made Wed 04 Jun 2014 08:22:39 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-input-10: docs/multiseat.txt: add note about spice docs/multiseat.txt: gtk joined the party docs/multiseat.txt: use autoseat input/vnc: use kbd delays in press_key input/curses: add kbd delay between keydown and keyup events input: use kbd delays for send_key monitor command input: add support for kbd delays Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2014-06-05qdev: Add test of qdev_prop_check_globalDon Slutz
This will generate a warning from "make check": ... GTESTER tests/test-qdev-global-props Warning: "-global dynamic-prop-type-bad.prop3=103" not used GTESTER tests/check-qom-interface ... If the warning is not generated, the test will fail. Signed-off-by: Don Slutz <dslutz@verizon.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-05qdev: Display warning about unused -globalDon Slutz
This can help a user understand why -global was ignored. For example: with "-vga cirrus"; "-global vga.vgamem_mb=16" is just ignored when "-global cirrus-vga.vgamem_mb=16" is not. This is currently clear when the wrong property is provided: out/x86_64-softmmu/qemu-system-x86_64 -global cirrus-vga.vram_size_mb=16 -monitor pty -vga cirrus char device redirected to /dev/pts/20 (label compat_monitor0) qemu-system-x86_64: Property '.vram_size_mb' not found Aborted (core dumped) vs out/x86_64-softmmu/qemu-system-x86_64 -global vga.vram_size_mb=16 -monitor pty -vga cirrus char device redirected to /dev/pts/20 (label compat_monitor0) VNC server running on `::1:5900' ^Cqemu: terminating on signal 2 Signed-off-by: Don Slutz <dslutz@verizon.com> Acked-by: Michael S. Tsirkin <mst@redhat.com>
2014-06-05target-i386: cleanup x86_cpu_get_phys_page_debugPaolo Bonzini
Make the code a bit more similar to x86_cpu_handle_mmu_fault. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: fix protection bits in the TLB for SMEPPaolo Bonzini
User pages must be marked as non-executable when running under SMEP; otherwise, fetching the page first and then calling it will fail. With this patch, all SMEP testcases in kvm-unit-tests now pass. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: support long addresses for 4MB pages (PSE-36)Paolo Bonzini
4MB pages can use 40-bit addresses by putting the higher 8 bits in bits 20-13 of the PDE. Bit 21 is reserved. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: raise page fault for reserved bits in large pagesPaolo Bonzini
In large pages, bit 12 is for PAT, but bits starting at 13 are reserved. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: unify reserved bits and NX bit checkPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: simplify pte/vaddr calculationPaolo Bonzini
They can moved to after the dirty bit processing, and unified between CR0.PG=1 and CR0.PG=0. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: raise page fault for reserved physical address bitsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: test reserved PS bit on PML4EsPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: set correct error code for reserved bit accessPaolo Bonzini
The correct error code is 9 (present, reserved), not 8. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: introduce support for 1 GB pagesPaolo Bonzini
Given the simplifications to the code in the previous patches, this is now very simple to do. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: introduce do_check_protect labelPaolo Bonzini
This will help adding 1GB page support in the next patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: tweak handling of PG_NX_MASKPaolo Bonzini
Remove the tail of the PAE case, so that we can use "goto" in the next patch to jump to the protection checks. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: commonize checks for PAE and non-PAEPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: commonize checks for 4MB and 4KB pagesPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: commonize checks for 2MB and 4KB pagesPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: fix coding standards in x86_cpu_handle_mmu_faultPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: simplify SMAP handling in MMU_KSMAP_IDXPaolo Bonzini
Do not use this MMU index at all if CR4.SMAP is false, and drop the SMAP check from x86_cpu_handle_mmu_fault. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: fix kernel accesses with SMAP and CPL = 3Paolo Bonzini
With SMAP, implicit kernel accesses from user mode always behave as if AC=0. To do this, kernel mode is not anymore a separate MMU mode. Instead, KERNEL_IDX is renamed to KSMAP_IDX and the kernel mode accessors wrap KSMAP_IDX and KNOSMAP_IDX. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: move check_io helpers to seg_helper.cPaolo Bonzini
Prepare for adding _kernel accessors there in the next patch. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-i386: rename KSMAP to KNOSMAPPaolo Bonzini
This is the mode where SMAP is overridden, put "NO" in its name. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: move all load/store functions to cpu_ldst.hPaolo Bonzini
Unify pieces of cpu-all.h, exec-all.h, softmmu_exec.h and tcg/tcg.h into a single new header file with all helpers. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: introduce cpu_ldst.hPaolo Bonzini
This will collect all load and store helpers soon. For now it is just a replacement for softmmu_exec.h, which this patch stops including directly, but we also include it where this will be necessary in order to simplify the next patch. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05target-arm: move arm_*_code to a separate filePaolo Bonzini
These will soon require cpu_ldst.h, so move them out of cpu.h. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: move softmmu_template.h out of include/Paolo Bonzini
It is only included in cputlb.c now. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: commonize helper definitionsPaolo Bonzini
They do not need to be in op_helper.c. Because cputlb.c now includes softmmu_template.h twice for each size, io_readX must be elided the second time through. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: move ALIGNED_ONLY to cpu.hPaolo Bonzini
Prepare for moving softmmu_header.h inclusion out of .c files Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: make do_unaligned_access a method of CPUPaolo Bonzini
We will reference it from more files in the next patch. To avoid ruining the small steps we're making towards multi-target, make it a method of CPU rather than just a global. Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: move definition of CPU_MMU_INDEX to inclusion site, drop ACCESS_TYPEPaolo Bonzini
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-05softmmu: move MMUSUFFIX under SOFTMMU_CODE_ACCESSPaolo Bonzini
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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