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2010-03-14tcg: add div/rem 32-bit helpersAurelien Jarno
Some targets like ARM would benefit to use 32-bit helpers for div/rem/divu/remu. Create a #define for div2 so that targets can select between div, div2 and helper implementation. Use the helper version if none of the #define are present. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-14Fix pagetable codePaul Brook
The multi-level pagetable code fails to iterate ove all entries because of the L2_BITS v.s. L2_SIZE thinko. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-14spelling typo (compatibilty) in hw/fw_cfg.cVagrant Cascadian
here's a trivial patch to fix the spelling of "compatibility": Signed-off-by: Vagrant Cascadian <vagrant@freegeek.org> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-13x86/cpuid: fix indentationAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: Enable all features of real CPUAurelien Jarno
Enable all features of real CPU, unsupported features will be trimmed depending on TCG or KVM capabilities. Move the list of unsupported TCG features near the TCG capabilities masks. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: fix CPUID levelsAndre Przywara
Bump up the xlevel number for qemu32 to allow parsing of the processor name string for this model. Similiarly the 486 processor should have at least the feature bit leaf enabled. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: Always expose 32 and 64-bit CPUsAndre Przywara
Since 64-bit capability is just another CPUID bit we now properly mask, there is no reason anymore to hide the 64-bit capable CPU models from a 32-bit only QEMU. All 64-bit CPUs can be used perfectly in 32-bit legacy mode anyway, so these models also make sense for 32-bit. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: add TCG feature bit trimmingAndre Przywara
In KVM we trim the user provided CPUID bits to match the host CPU's one. Introduce a similar feature to QEMU/TCG. Create a mask of TCG's capabilities and apply it to the user bits. This allows to let the CPU models reflect their native archetypes. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: remove unnecessary kvm_trim functionAndre Przywara
Correct me if I am wrong, but kvm_trim looks like a really bloated implementation of a bitwise AND. So remove this function and replace it with the real stuff(TM). Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: add "host" to the list of supported CPU modelsAndre Przywara
Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: add missing CPUID feature flag namesAndre Przywara
Some CPUID feature flags had no string value, so they could not be switched on or off from the command line. Add names for the missing ones mentioned in the current public CPUID specification from both Intel and AMD. Those only mentioned in the Linux kernel source I put as comments. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: moved host_cpuid function and remove prototypeAndre Przywara
the host_cpuid function was located at the end of the file and had a prototype before it's first use. Move it up and remove the prototype. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: fix missing feature set bitsAndre Przywara
This one was accidently removed with commit bb0300dc57c10b3721451b0ff566a03f9276cc77 Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: replace magic number with named constantAndre Przywara
CPUID leaf Fn8000_0001.EDX contains a copy of many Fn0000_0001.EDX bits. Define a name for this mask to improve readability and avoid typos. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13x86/cpuid: move CPUID functions into separate fileAndre Przywara
about half of target-i386/helper.c consist of CPUID related functions. Only one of them is a real TCG helper function. So move the whole CPUID stuff out of this into a separate file to get better maintainable parts. This is only code reordering and should not affect QEMU's functionality. Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13Fix build with -DNDEBUG in CFLAGSBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-13Fix a typo in error messageBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-13fdc: fix drive property handling.Gerd Hoffmann
Fix the floppy controller init wrappers to set the drive properties only in case the DriveInfo pointers passed in are non NULL. This allows to set the properties using -global. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13install: honor DESTDIR on sysconfdir populationAndre Przywara
When creating and populating $sysconfdir, we should prepend $DESTDIR as we do with all other paths. Reported-by: Frank Arnold <frank.arnold@amd.com> Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13configure: fix --sysconfdir specificationAndre Przywara
--sysconfdir requires a parameter (the path), this should be reflected in the case pattern. Reported-by: Frank Arnold <frank.arnold@amd.com> Signed-off-by: Andre Przywara <andre.przywara@amd.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13target-arm: make RFE usable with any registerAdam Lackorzynski
The rfe instruction can be used with any register, not just sp. Adjust the condition check accordingly. Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13tcg/arm: implement andc opAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13tcg: update README with const and pure helpersAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13tcg/arm: correctly save/restore registers in prologue/epilogueAurelien Jarno
Since commit 6113d6d3169393c323ac4c82d756a850145a5e7a QEMU crashes on ARM hosts. This is not a bug of this commit, but a latent bug revealed by this commit. The TCG code is called through a procedure call using the prologue and epilogue code. This code does not save and restore enough registers. The "Procedure Call Standard for the ARM Architecture" says: A subroutine must preserve the contents of the registers r4-r8, r10,  r11 and SP (and r9 in PCS variants that designate r9 as v6). The current code only saves and restores r9 to r11, and misses r4 to r8. The patch fixes that by saving r4 to r12. Theoretically there is no need to save and restore r12, but an even number of registers have to be saved as per EABI. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13target-i386: fix commit c22549204a6edc431e8e4358e61bd56386ff6957TeLeMan
The commit c22549204a6edc431e8e4358e61bd56386ff6957 led movntps & movntdq to be translated incorrectly. Signed-off-by: TeLeMan <geleman@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13target-mips: update address space definitionsAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-13Fix Sparc host build breakageBlue Swirl
Fix error: CC sparc-bsd-user/op_helper.o In file included from /src/qemu/tcg/tcg.c:158: /src/qemu/tcg/sparc/tcg-target.c:728:5: "TARGET_PHYS_ADDR_BITS" is not defined Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-13Fix more wrong usermode virtual address typesBlue Swirl
Fixes warning: CC sparc-bsd-user/exec.o /src/qemu/exec.c: In function `page_check_range': /src/qemu/exec.c:2375: warning: comparison is always true due to limited range of data type Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-03-12Fix usermode virtual address typePaul Brook
Usermode virtual addresses are abi_ulong, not target_ulong. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-13FreeBSD ppc_init_cacheline_sizes(): add missing #includesJuergen Lock
This fixes commit e4ee916d3f9a93df06bd498c92767c1558d59a0b. (The bug was mine actually...) Submitted by: Andreas Tobler <andreast@fgznet.ch> Signed-off-by: Juergen Lock <nox@jelal.kn-bremen.de> Signed-off-by: malc <av1474@comtv.ru>
2010-03-13tcg/ppc[64]: Only define addend load helpers in softmmu casemalc
Signed-off-by: malc <av1474@comtv.ru>
2010-03-12Remove userspace target_phys_addr_tPaul Brook
TARGET_PHYS_ADDR_BITS isn't meaningful for userspace emulation, so don't define it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Target specific usermode cleanupPaul Brook
Disable various target specific code that is only relevant to system emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Remove cpu_get_phys_page_debug from userspace emulationPaul Brook
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Disable phsyical memory handling in userspace emulation.Paul Brook
Code to handle physical memory access is not meaningful in usrmode emulation, so disable it. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Remove TLB from userspacePaul Brook
Remove TLB from userspace CPU structure. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Add tb_page_addr_tPaul Brook
The page tracking code in exec.c is used by both userspace and system emulation. Userspace emulation uses it to track virtual pages, and system emulation to track ram pages. Introduce a new type to hold this kind of address. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-03-12Fix last page errors in page_check_range and page_set_flags.Richard Henderson
The addr < end comparison prevents iterating over the last page in the guest address space; an iteration based on length avoids this problem. At the same time, assert that the given address is in the guest address space. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-12Implement multi-level page tables.Richard Henderson
Define L1_MAP_ADDR_SPACE_BITS to be either the virtual address size (in user mode) or physical address size (in system mode), and use that to size l1_map. This rewrites page_find_alloc, page_flush_tb, and walk_memory_regions. Use TARGET_PHYS_ADDR_SPACE_BITS for the physical memory map based off of l1_phys_map. This rewrites page_phys_find_alloc and phys_page_for_each. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-12linux-user: Fix mmap_find_vma returning invalid addresses.Richard Henderson
Don't return addresses that aren't properly aligned for the guest, e.g. when the guest has a larger page size than the host. Don't return addresses that are outside the virtual address space for the target, by paying proper attention to the h2g/g2h macros. At the same time, place the default mapping base for 64-bit guests (on 64-bit hosts) outside the low 4G. Consistently interpret mmap_next_start in the guest address space. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-12linux-user: Use h2g_valid in qemu_vmalloc.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-12Use TARGET_VIRT_ADDR_SPACE_BITS in h2g_valid.Richard Henderson
Previously, only 32-bit guests had a proper check for the validity of the virtual address. Extend that check to 64-bit guests with a restricted virtual address space. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-12Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.Richard Henderson
Removes a set of ifdefs from exec.c. Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other than Alpha. This will be used for page_find_alloc, which is supposed to be using virtual addresses in the first place. Signed-off-by: Richard Henderson <rth@twiddle.net>
2010-03-11target-ppc: fix evsrwu and evsrws (second try)Aurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-11target-ppc: fix evsrwu and evsrwsAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-11target-ppc: fix evslw instructionAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-11audio: fix commentmalc
Signed-off-by: malc <av1474@comtv.ru>
2010-03-10QMP: Really move the RESET event to qemu_system_reset()Luiz Capitulino
Something bad has happened in the merge of commit 0ee44250, as the log message says it's supposed to be in qemu_system_reset() but it is do_vm_stop(). Possibly, it was a problem with the conflict resolution with ea375f9a (which has been merged first). This commit moves (again) the RESET event into qemu_system_reset(). Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-03-10target-i386: fix SIB decoding with index = 4Aurelien Jarno
A SIB byte with an index of 4 means "no scaled index", even if the scale value is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects %r12. This is correctly handled by the computation of the index variable, which includes the index bits, and also the REX.X prefix: index = ((code >> 3) & 7) | REX_X(s); Thanks to Avi Kivity, Jamie Lokier and Malc for the analysis of the problem and the initial patch. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-03-09documentation: qemu_write_full don't work with non-blocking fd'sJuan Quintela
Signed-off-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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