aboutsummaryrefslogtreecommitdiff
AgeCommit message (Collapse)Author
2016-05-12Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20160512' into staging target-arm queue: * blizzard, omap_lcdc: code cleanup to remove DEPTH != 32 dead code * QOMify various ARM devices * bcm2835_property: use cached values when querying framebuffer * hw/arm/nseries: don't allocate large sized array on the stack * fix LPAE descriptor address masking (only visible for EL2) * fix stage 2 exec permission handling for AArch32 * first part of supporting syndrome info for data aborts to EL2 * virt: NUMA support * work towards i.MX6 support * avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes # gpg: Signature made Thu 12 May 2016 14:29:14 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" * remotes/pmaydell/tags/pull-target-arm-20160512: (43 commits) hw/arm: QOM'ify versatilepb.c hw/arm: QOM'ify strongarm.c hw/arm: QOM'ify stellaris.c hw/arm: QOM'ify spitz.c hw/arm: QOM'ify pxa2xx_pic.c hw/arm: QOM'ify pxa2xx.c hw/arm: QOM'ify integratorcp.c hw/arm: QOM'ify highbank.c hw/arm: QOM'ify armv7m.c target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writes hw/display/blizzard: Remove blizzard_template.h hw/display/blizzard: Expand out macros i.MX: Add sabrelite i.MX6 emulation. i.MX: Add i.MX6 SOC implementation. i.MX: Add the Freescale SPI Controller FIFO: Add a FIFO32 implementation i.MX: Add i.MX6 System Reset Controller device. ARM: Factor out ARM on/off PSCI control functions ACPI: Virt: Generate SRAT table ACPI: move acpi_build_srat_memory to common place ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2016-05-12' into ↵Peter Maydell
staging QAPI patches for 2016-05-12 # gpg: Signature made Thu 12 May 2016 08:49:04 BST using RSA key ID EB918653 # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" * remotes/armbru/tags/pull-qapi-2016-05-12: (23 commits) qapi: Change visit_type_FOO() to no longer return partial objects qapi: Simplify semantics of visit_next_list() qapi: Fix string input visitor handling of invalid list tests/string-input-visitor: Add negative integer tests qapi: Split visit_end_struct() into pieces qmp: Tighten output visitor rules qmp: Don't reuse qmp visitor after grabbing output spapr_drc: Expose 'null' in qom-get when there is no fdt qmp: Support explicit null during visits qapi: Add visit_type_null() visitor tests: Add check-qnull qapi: Document visitor interfaces, add assertions qmp-input: Refactor when list is advanced qmp-input: Require struct push to visit members of top dict qom: Wrap prop visit in visit_start_struct qapi-commands: Wrap argument visit in visit_start_struct qmp-input: Don't consume input when checking has_member qapi: Use strict QMP input visitor in more places qapi: Consolidate QMP input visitor creation qmp-input: Clean up stack handling ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12Merge remote-tracking branch 'remotes/kraxel/tags/pull-usb-20160511-1' into ↵Peter Maydell
staging usb: misc fixes # gpg: Signature made Wed 11 May 2016 12:18:25 BST using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-usb-20160511-1: usb: Support compilation without poll.h usb-mtp: fix usb_mtp_get_device_info so that libmtp on the guest doesn't complain usb:xhci: no DMA on HC reset Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify versatilepb.cxiaoqiang.zhao
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify strongarm.cxiaoqiang.zhao
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify stellaris.cxiaoqiang.zhao
* Drop the use of old SysBus init function and use instance_init * Use DeviceClass::vmsd instead of 'vmstate_register' function Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify spitz.cxiaoqiang zhao
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify pxa2xx_pic.cxiaoqiang.zhao
Remove the empty 'pxa2xx_pic_initfn' and it's setup code in the 'pxa2xx_pic_class_init' Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify pxa2xx.cxiaoqiang.zhao
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify integratorcp.cxiaoqiang.zhao
* Drop the use of old SysBus init function and use instance_init * Remove the empty 'icp_pic_class_init' from Typeinfo Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify highbank.cxiaoqiang.zhao
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm: QOM'ify armv7m.cxiaoqiang.zhao
Drop the use of old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12target-arm: Avoid unnecessary TLB flush on TCR_EL2, TCR_EL3 writesPeter Maydell
The TCR_EL2 and TCR_EL3 regdefs were incorrectly using the vmsa_tcr_el1_write function for writes. Since these registers don't have the A1 bit that TCR_EL1 does, we don't need to do a tlb_flush() when they are written. Remove the unnecessary .writefn and also the harmless but unneeded .raw_writefn and .resetfn definitions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Sergey Fedorov <sergey.fedorov@linaro.org>
2016-05-12hw/display/blizzard: Remove blizzard_template.hPeter Maydell
We no longer need to do the "multiply include this header" trick with blizzard_template.h, and it is only used in a single .c file, so just put its contents inline in blizzard.c. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1462371352-21498-3-git-send-email-peter.maydell@linaro.org
2016-05-12hw/display/blizzard: Expand out macrosPeter Maydell
Now that we can assume that only depth 32 is possible, there's no need for the COPY_PIXEL1 and PIXEL_TYPE macros, and the SKIP_PIXEL, COPY_PIXEL and SWAP_WORDS macros aren't used at all. Expand out COPY_PIXEL1 and PIXEL_TYPE where they are used, delete the unused macro definitions, and expand out the uses of glue(name_prefix, DEPTH). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 1462371352-21498-2-git-send-email-peter.maydell@linaro.org
2016-05-12i.MX: Add sabrelite i.MX6 emulation.Jean-Christophe DUBOIS
The sabrelite supports one SPI FLASH memory on SPI1 Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12i.MX: Add i.MX6 SOC implementation.Jean-Christophe DUBOIS
For now we only support the following devices: * up to 4 Cortex A9 cores * A9 MPCORE (SCU, GIC, TWD) * 5 i.MX UARTs * 2 EPIT timers * 1 GPT timer * 3 I2C controllers * 7 GPIO controllers * 6 SDHC controllers * 5 SPI controllers * 1 CCM device * 1 SRC device * various ROM/RAM areas. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12i.MX: Add the Freescale SPI ControllerJean-Christophe DUBOIS
Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12FIFO: Add a FIFO32 implementationJean-Christophe DUBOIS
This one is build on top of the existing FIFO8 Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12i.MX: Add i.MX6 System Reset Controller device.Jean-Christophe DUBOIS
This controller is also present in i.MX5X devices but they are not yet emulated by QEMU. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12ARM: Factor out ARM on/off PSCI control functionsJean-Christophe DUBOIS
Split ARM on/off function from PSCI support code. This will allow to reuse these functions in other code. Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12ACPI: Virt: Generate SRAT tableShannon Zhao
To support NUMA, it needs to generate SRAT ACPI table. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-6-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12ACPI: move acpi_build_srat_memory to common placeShannon Zhao
Move acpi_build_srat_memory to common place so that it could be reused by ARM. Rename it to build_srat_memory. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-5-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12ACPI: Fix the definition of proximity in AcpiSratMemoryAffinityShannon Zhao
ACPI spec says that Proximity Domain is an "Integer that represents the proximity domain to which the processor belongs". So define it as a uint32_t. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-4-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12ACPI: Add GICC Affinity StructureShannon Zhao
Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-3-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12ARM: Virt: Set numa-node-id for cpu and memory nodesShannon Zhao
Generate memory nodes according to NUMA topology. Set numa-node-id property for cpu and memory nodes. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Message-id: 1461667229-9216-2-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/display: QOM'ify exynos4210_fimd.cxiaoqiang zhao
* Drop the old SysBus init function and use instance_init * Move graphic_console_init into realize stage Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1462417489-28603-2-git-send-email-zxq_yx_007@163.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12target-arm/translate-a64.c: Unify some of the ldst_reg decodingEdgar E. Iglesias
The various load/store variants under disas_ldst_reg can all reuse the same decoding for opc, size, rt and is_vector. This patch unifies the decoding in preparation for generating instruction syndromes for data aborts. This will allow us to reduce the number of places to hook in updates to the load/store state needed to generate the insn syndromes. No functional change. Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1461931684-1867-7-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9Edgar E. Iglesias
Use extract32 instead of open coding the bit masking when decoding is_signed and is_extended. This streamlines the decoding with some of the other ldst variants. No functional change. Reviewed-by: Sergey Fedorov <serge.fdrv@gmail.com> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1461931684-1867-6-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12target-arm: Split data abort syndrome generatorPeter Maydell
Split the data abort syndrome generator into two versions: One with a valid Instruction Specific Syndrome (ISS) and another without. The following new flags are supported by the syndrome generator with ISS: * isv - Instruction syndrome valid * sas - Syndrome access size * sse - Syndrome sign extend * srt - Syndrome register transfer * sf - Sixty-Four bit register width * ar - Acquire/Release These flags are not yet used, so this patch has no functional change except that we will now correctly set the IL bit in data abort syndromes without ISS information. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1461931684-1867-5-git-send-email-edgar.iglesias@gmail.com> [PMM: squashed in with patch which was just adding the IL bit] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12gen-icount: Use tcg_set_insn_paramEdgar E. Iglesias
Use tcg_set_insn_param() instead of directly accessing internal tcg data structures to update an insn param. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1461931684-1867-3-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12tcg: Add tcg_set_insn_paramEdgar E. Iglesias
Add tcg_set_insn_param as a mechanism to modify an insn parameter after emiting the insn. This is useful for icount and also for embedding fault information for a specific insn. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 1461931684-1867-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12target-arm: Fix descriptor address masking in ARM address translationSergey Sorokin
There is a bug in ARM address translation regime with a long-descriptor format. On the descriptor reading its address is formed from an index which is a part of the input address. And on the first iteration this index is incorrectly masked with 'grainsize' mask. But it can be wider according to pseudo-code. On the other hand on the iterations other than first the descriptor address is formed from the previous level descriptor by masking with 'descaddrmask' value. It always clears just 12 lower bits, but it must clear 'grainsize' lower bits instead according to pseudo-code. The patch fixes both cases. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1460996853-22117-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12target-arm: Stage 2 permission fault was fixed in AArch32 stateSergey Sorokin
As described in AArch32.CheckS2Permission an instruction fetch fails if XN bit is set or there is no read permission for the address. Signed-off-by: Sergey Sorokin <afarallax@yandex.ru> Message-id: 1461002400-3187-1-git-send-email-afarallax@yandex.ru Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/arm/nseries: Allocating Large sized arrays to heapZhou Jie
n8x0_init has a huge stack usage of 65536 bytes approx. Moving large arrays to heap to reduce stack usage. Signed-off-by: Zhou Jie <zhoujie2011@cn.fujitsu.com> Message-id: 1461651308-894-1-git-send-email-zhoujie2011@cn.fujitsu.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12bcm2835_property: use cached values when querying framebufferSylvain Garrigues
As the framebuffer settings are copied into the result message before it is reconfigured, inconsistent behavior can happen when, for instance, you set with a single message the width, height, and depth, and ask at the same time to allocate the buffer and get the pitch and the size. In this case, the reported pitch and size would be incorrect as they were computed with the initial values of width, height and depth, not the ones the client requested. Signed-off-by: Sylvain Garrigues <sylvain@sylvaingarrigues.com> Reviewed-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Message-id: 1461325343-24995-1-git-send-email-sylvain@sylvaingarrigues.com [PMM: folded a couple of long lines] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify omap_intc.cxiaoqiang zhao
* Split the old SysBus init into an instance_init and a DeviceClass::realize function * Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify grlib_irqmp.cxiaoqiang.zhao
* Split the old SysBus init into an instance_init and a DeviceClass::realize function * Drop the old SysBus init function Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: corrected "can not" to "cannot" in error message] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify slavio_intctl.cxiaoqiang.zhao
Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify pl190.cxiaoqiang.zhao
Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify imx_avic.cxiaoqiang.zhao
Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify exynos4210_gic.cxiaoqiang.zhao
* Drop the old SysBus init function and use instance_init * Split the exynos4210_irq_gate_init into an instance_init and a DeviceClass::realize function Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify exynos4210_combiner.cxiaoqiang.zhao
Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12hw/intc: QOM'ify etraxfs_pic.cxiaoqiang.zhao
Drop the old SysBus init function and use instance_init Signed-off-by: xiaoqiang zhao <zxq_yx_007@163.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12omap_lcdc: Remove support for DEPTH != 32Pooja Dhannawat
surface_bits_per_pixel() always returns 32 so, removing other dead code which is based on DEPTH !== 32 Signed-off-by: Pooja Dhannawat <dhannawatpooja1@gmail.com> Message-id: 1459260142-9144-1-git-send-email-dhannawatpooja1@gmail.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12blizzard: Remove support for DEPTH != 32Pooja Dhannawat
Removing support for DEPTH != 32 from blizzard template header and file that includes it, as macro DEPTH == 32 only used. Reviewed-by: Eric Blake <eblake@redhat.com> Signed-off-by: Pooja Dhannawat <dhannawatpooja1@gmail.com> Message-id: 1458971873-2768-1-git-send-email-dhannawatpooja1@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12Open 2.7 development treePeter Maydell
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2016-05-12qapi: Change visit_type_FOO() to no longer return partial objectsEric Blake
Returning a partial object on error is an invitation for a careless caller to leak memory. We already fixed things in an earlier patch to guarantee NULL if visit_start fails ("qapi: Guarantee NULL obj on input visitor callback error"), but that does not help the case where visit_start succeeds but some other failure happens before visit_end, such that we leak a partially constructed object outside visit_type_FOO(). As no one outside the testsuite was actually relying on these semantics, it is cleaner to just document and guarantee that ALL pointer-based visit_type_FOO() functions always leave a safe value in *obj during an input visitor (either the new object on success, or NULL if an error is encountered), so callers can now unconditionally use qapi_free_FOO() to clean up regardless of whether an error occurred. The decision is done by adding visit_is_input(), then updating the generated code to check if additional cleanup is needed based on the type of visitor in use. Note that we still leave *obj unchanged after a scalar-based visit_type_FOO(); I did not feel like auditing all uses of visit_type_Enum() to see if the callers would tolerate a specific sentinel value (not to mention having to decide whether it would be better to use 0 or ENUM__MAX as that sentinel). Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <1461879932-9020-25-git-send-email-eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-05-12qapi: Simplify semantics of visit_next_list()Eric Blake
The semantics of the list visit are somewhat baroque, with the following pseudocode when FooList is used: start() for (prev = head; cur = next(prev); prev = &cur) { visit(&cur->value) } Note that these semantics (advance before visit) requires that the first call to next() return the list head, while all other calls return the next element of the list; that is, every visitor implementation is required to track extra state to decide whether to return the input as-is, or to advance. It also requires an argument of 'GenericList **' to next(), solely because the first iteration might need to modify the caller's GenericList head, so that all other calls have to do a layer of dereferencing. Thankfully, we only have two uses of list visits in the entire code base: one in spapr_drc (which completely avoids visit_next_list(), feeding in integers from a different source than uint8List), and one in qapi-visit.py. That is, all other list visitors are generated in qapi-visit.c, and share the same paradigm based on a qapi FooList type, so we can refactor how lists are laid out with minimal churn among clients. We can greatly simplify things by hoisting the special case into the start() routine, and flipping the order in the loop to visit before advance: start(head) for (tail = *head; tail; tail = next(tail)) { visit(&tail->value) } With the simpler semantics, visitors have less state to track, the argument to next() is reduced to 'GenericList *', and it also becomes obvious whether an input visitor is allocating a FooList during visit_start_list() (rather than the old way of not knowing if an allocation happened until the first visit_next_list()). As a minor drawback, we now allocate in two functions instead of one, and have to pass the size to both functions (unless we were to tweak the input visitors to cache the size to start_list for reuse during next_list, but that defeats the goal of less visitor state). The signature of visit_start_list() is chosen to match visit_start_struct(), with the new parameters after 'name'. The spapr_drc case is a virtual visit, done by passing NULL for list, similarly to how NULL is passed to visit_start_struct() when a qapi type is not used in those visits. It was easy to provide these semantics for qmp-output and dealloc visitors, and a bit harder for qmp-input (several prerequisite patches refactored things to make this patch straightforward). But it turned out that the string and opts visitors munge enough other state during visit_next_list() to make it easier to just document and require a GenericList visit for now; an assertion will remind us to adjust things if we need the semantics in the future. Several pre-requisite cleanup patches made the reshuffling of the various visitors easier; particularly the qmp input visitor. Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <1461879932-9020-24-git-send-email-eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
2016-05-12qapi: Fix string input visitor handling of invalid listEric Blake
As shown in the previous commit, the string input visitor was treating bogus input as an empty list rather than an error. Fix parse_str() to set errp, then the callers to exit early if an error was reported. Meanwhile, fix the testsuite to use the generated qapi_free_int16List() instead of rolling our own, and to validate the fixed behavior, while at the same time documenting one more change that we'd like to make in a later patch (a failed visit_start_list should guarantee a NULL pointer, regardless of what things were on input). Signed-off-by: Eric Blake <eblake@redhat.com> Message-Id: <1461879932-9020-23-git-send-email-eblake@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2024-12-29 06:52:14 +0000