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2010-05-31Fix leul_to_cpu on big endian hostsAlexander Graf
Commit 213acd2e introduced leul_to_cpu with a special code path for big endian hosts. Unfortunately that code used preprocessor magic that didn't work. This patch replaces the explicit ##s by glue() which is proven to work reliably, enabling me to compile qemu on ppc again. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-31arm: fix arm kernel boot for non zero start addrLars Munch
Booting an arm kernel has been broken a while when booting from non zero start address. This is due to the order of events: board init loads the kernel and sets register 15 to the start address and then qemu_system_reset reset the cpu making register 15 zero again. This patch fixes the usage of the register 15 start address trick in combination with arm_load_kernel. Signed-off-by: Lars Munch <lars@segv.dk> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-31target-ppc: remove useless lineThomas Monjalon
This line was a bit clear. The next lines set or reset this bit (LE) depending of another bit (ILE). So the first line is useless. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-31target-ppc: fix RFI by clearing some bits of MSRThomas Monjalon
Since commit 2ada0ed, "Return From Interrupt" is broken for PPC processors because some interrupt specifics bits of SRR1 are copied to MSR. SRR1 is a save of MSR during interrupt. During RFI, MSR must be restored from SRR1. But some bits of SRR1 are interrupt-specific and are not used for MSR saving. This is the specification (ISA 2.06) at chapter 6.4.3 (Interrupt Processing): "2. Bits 33:36 and 42:47 of SRR1 or HSRR1 are loaded with information specific to the interrupt type. 3. Bits 0:32, 37:41, and 48:63 of SRR1 or HSRR1 are loaded with a copy of the corresponding bits of the MSR." Below is a representation of MSR bits which are not saved: 0:15 16:31 32 33:36 37:41 42:47 48:63 ——— | ——— | — X X X X — — — — — X X X X X X | ———— 0000 0000 | 7 | 8 | 3 | F | 0000 History: In the initial Qemu implementation (e1833e1), the mask 0x783F0000 was used for saving MSR in SRR1. But all the bits 32:47 were cleared during RFI restoring. This was wrong. The commit 2ada0ed explains that this breaks Altivec. Indeed, bit 38 (for Altivec support) must be saved and restored. The change of 2ada0ed was to restore all the bits of SRR1 to MSR. But it's also wrong. Explanation: As an example, let's see what's happening after a TLB miss. According to the e300 manual (E300CORERM table 5-6), the TLB miss interrupts set the bits 44-47 for KEY, I/D, WAY and S/L. These bits are specifics to the interrupt and must not be copied into MSR at the end of the interrupt. With the current implementation, a TLB miss overwrite bits POW, TGPR and ILE. Fix: It shouldn't be needed to filter-out bits on MSR saving when interrupt occurs. Specific bits overwrite MSR ones in SRR1. But at the end of interrupt (RFI), specifics bits must be cleared before restoring MSR from SRR1. The mask 0x783F0000 apply here. Discussion: The bits of the mask 0x783F0000 are cleared after an interrupt. I cannot find a specification which talks about this but I assume it is the truth since Linux can run this way. Maybe it's not perfect but it's better (works for e300). Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-30mc146818rtc: improve debuggingBlue Swirl
Add a separate flag for debugging coalesced interrupts. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc32 SuperSPARC MMU Breakpoint Action register (SS-20 OBP fix)Artyom Tarasenko
SuperSPARC MMU Breakpoint Action register is used by OBP at boot The patch allows booting Solaris and some other OS with SPARCStation-20 OBP. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29pc: improve debuggingBlue Swirl
Add a DPRINTF macro and use it for ISA and PIC interrupts. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29apic: improve debuggingBlue Swirl
Add a DPRINTF macro. Use TARGET_FMT_plx for printing target_phys_addr_t items. Add a separate flag for debugging coalescing interrupts. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29i8259: improve debuggingBlue Swirl
Add a DPRINTF macro. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc64: fix user emulator buildBlue Swirl
Accesses with _nucleus prefix are not available when building user emulators: CC sparc64-linux-user/op_helper.o cc1: warnings being treated as errors /src/qemu/target-sparc/op_helper.c: In function 'helper_ldda_asi': /src/qemu/target-sparc/op_helper.c:3063: error: implicit declaration of function 'ldq_nucleus' Avoid making such accesses. Fixes breakage by 54a3c0f032abf93d1cedc75456af75401ac10360. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29Pad iommu with an empty slot (necessary for SunOS 4.1.4)Artyom Tarasenko
On the real hardware (SS-5, LX) the MMU is not padded, but aliased. Software shouldn't use aliased addresses, neither should it crash when it uses (on the real hardware it wouldn't). Using empty_slot instead of aliasing can help with debugging such accesses. Signed-off-by: Artyom Tarasenko <atar4qemu@googlemail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29sparc64: fix 128-bit atomic load from nucleus context v1Igor V. Kovalenko
- change 128-bit atomic loads to reference nucleus context v0->v1: dropped disassembler change Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-29Pre-allocate guest address spacePaul Brook
Allow pre-allocation of the guest virtual address space in usermode emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-05-28alpha-linux-user: Fill in SI_CODE for SIGSEGV.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28linux-user: Use qemu-malloc.c.Richard Henderson
Since we're no longer setting PAGE_RESERVED, there's no need to implement qemu_malloc via mmap. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28Use calloc in qemu_mallocz.Richard Henderson
Avoids the memset if the allocator has gotten new zeroed storage from the operating system. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28linux-user: Fix compilation with DEBUG definedRiccardo Magliocchetti
Signed-off-by: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28Fix hw/gt64xxx.c compilation with DEBUG definedRiccardo Magliocchetti
Use TARGET_FMT_plx as format placeholder for target_phys_addr_t Signed-off-by: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28Fix typo in balloon helpRiccardo Magliocchetti
Fix launchpad #563883 Signed-off-by: Riccardo Magliocchetti <riccardo.magliocchetti@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28musicpal: Drop redundant reset callJan Kiszka
Reset is now triggered after init, no need for explicit calls anymore. Signed-off-by: Jan Kiszka <jan.kiszka@web.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28doc: Update monitor info subcommandsStefan Hajnoczi
The "info blockstats" documentation was copy-pasted as "info block" instead of "info blockstats". The documentation for "commands", "jit", "numa", "qdm", and "roms" is missing. This patch resolves these issues in qemu-monitor.hx. Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28Fix overflow in i440fx_init()Avi Kivity
The ram_size parameter can be larger than an int, so it may be truncated. Fix by using the correct type. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28arm: prevent coprocessor IO resetLars Munch
This prevent coprocessor IO structure from being reset on cpu reset. This was a problem for PXA which uses coprocessor 6 and 14. Signed-off-by: Lars Munch <lars@segv.dk> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-28tcg: Use INDEX_op_qemu_ld32 for 32-bit results.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-27vhost_net.c: v2 Fix build failure introduced by ↵Jes Sorensen
0bfcd599e3f5c5679cc7d0165a0a1822e2f60de2 Fix build failure introduced by 0bfcd599e3f5c5679cc7d0165a0a1822e2f60de2 The format statement expects unsigned long on x86_64, but receives unsigned long long, so gcc exits with an error. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-27Make cache=unsafe the default for -snapshotAlexander Graf
When using -snapshot we don't care about data integrity of the cow file at all, so let's disable flushing there and squeeze out the last drop of performance we could possibly get. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-26sparc64: clean up pci bridge mapIgor V. Kovalenko
- remove unused host state and store pci bus pointer only - do not map host state access into unused 1fe.10000000 range - reorder pci region registration - assign pci i/o region to isa_mem_base Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-26sparc64: rename sun4u cpu to Ultrasparc IIiIgor V. Kovalenko
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-26Add cache=unsafe parameter to -driveAlexander Graf
Usually the guest can tell the host to flush data to disk. In some cases we don't want to flush though, but try to keep everything in cache. So let's add a new cache value to -drive that allows us to set the cache policy to most aggressive, disabling flushes. We call this mode "unsafe", as guest data is not guaranteed to survive host crashes anymore. This patch also adds a noop function for aio, so we can do nothing in AIO fashion. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-24vnc: rich cursor support.Gerd Hoffmann
Uses VNC_ENCODING_RICH_CURSOR. Adding XCURSOR support should be possible without much trouble. Shouldn't be needed though as RICH_CURSOR is a superset of XCURSOR. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-24use new cursor struct + functions for vmware vga and sdl.Gerd Hoffmann
Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-24cursor: add cursor functions.Gerd Hoffmann
Add a new cursor type to console.h and a bunch of functions to deal with cursors the (new) cursor.c file. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-24Fix error handling in qemu_read_config_fileKevin Wolf
We need to close the file even in error case. While at it, make the callers catch all kind of errors. ENOENT is allowed for default config files, they are optional. Reported-by: Luiz Capitulino <lcapitulino@redhat.com> Signed-off-by: Kevin Wolf <kwolf@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-24Virtio-net: Replace the hardcode 6 with defined ETN_ALENAmos Kong
hw/virtio-net.h: #define ETH_ALEN 6 ETH_ALEN was defined by commit 7967406801aa897fae83caad3278ac85a342adaa Signed-off-by: Amos Kong <akong@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-24sdl: Do not disable screensaver by defaultJan Kiszka
Unless we are running in full-screen mode, QEMU's SDL window should not disable the host's screensaver. The user can still change this behaviour by setting the environment variable SDL_VIDEO_ALLOW_SCREENSAVER as desired. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-05-24Merge remote branch 'kwolf/for-anthony' into stagingAnthony Liguori
2010-05-24Merge remote branch 'qmp/for-anthony' into stagingAnthony Liguori
2010-05-24microblaze: Handle new elf mach nr for sysemu.Edgar E. Iglesias
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
2010-05-22lsi: Fix value overflow in request tag processingJan Kiszka
This fixes a mismerge of 64d564094cac5f72eeaeb950c442b773a00d3586 (wrong patch version): We need to mask the tag value properly to obtain its device ID. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-05-22sparc64: flush translations on mmu context changeIgor V. Kovalenko
- two pairs of softmmu indexes bind softmmu tlb to cpu tlb in fault handlers using value of DMMU primary and secondary context registers, so we need to flush softmmu translations when context registers are changed Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix mmu context at trap levels above zeroIgor V. Kovalenko
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero - cpu_get_tb_cpu_state: store trap level and primary context in flags this allows to restart code translation when address translation is changed - stop translation block after writing to pstate and tl registers - stop translation block after writing to alternate space this can be optimized to stop only if address translation can be changed by write operation (e.g. by comparing with MMU ASI values) Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix dump_mmu to look for global bit in tte value instead of tagIgor V. Kovalenko
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: fix pstate privilege bitsIgor V. Kovalenko
- refactor code to handle hpstate only if available for current cpu - conditionally set hypervisor bit in hpstate register - reorder softmmu indices so user accessable ones go first, translation context macros supervisor() and hypervisor() adjusted as well - disable sparcv8 registers for TARGET_SPARC64 - fix cpu_mmu_index to use sparcv9 bits only Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc64: generate data access exception on RW violationIgor V. Kovalenko
- separate PRIV and PROT handling - DPRINTF_MMU macro to clean up debug code - dump mmu_idx, trap level and mmu context registers along with address translation values Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22sparc32 protect read-only bits in DMA CSR registersArtyom Tarasenko
On a real hardware changing read-only bits has no effect Use a mask common for SCSI and Ethernet registers. The crucial bit is DMA_INTR, because setting or clearing it may produce spurious interrupts. This patch allows booting Solaris 2.3 Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22vmstate: fix breakage by 7e72abc382b700a72549e8147bdea413534eeedcTeLeMan
cirrus_post_load() will be executed twice when loading vm states and then the wrong physical memory will be registered. This issue may lead to crash qemu. Signed-off-by: TeLeMan <geleman@gmail.com> Acked-by: Juan Quintela <quintela@redhat.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22Fix -device help and documentationMarkus Armbruster
Commit 6616b2ad reverted commit 40ea285c. Looks like a mismerge to me. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22Fix tarbin Makefile ruleStuart Brady
The 'tarbin' Makefile rule doesn't include qemu-system-sparc64, but should do, now that sparc64-softmmu is in the default target list. The rule attempts to tar up binaries that were not built if a target list was passed to the configure script -- in which case, it will either fail, or otherwise include binaries from previous builds. Fix both problems once and for all by building a list of binaries to include in the tarball, using the list of targets to be built. Signed-off-by: Stuart Brady <sdb@zubnet.me.uk> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22hxtool: Add syntax error detectionJan Kiszka
Add basic imbalance detection for STEXT/ETEXI. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-05-22Fix TEXI section mark imbalance in qemu-img-cmd.hxJan Kiszka
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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