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2015-06-26include/exec: Move standard exceptions to cpu-all.hPeter Crosthwaite
These exception indicies are generic and don't have any reliance on the per-arch cpu.h defs. Move them to cpu-all.h so they can be used by core code that does not have access to cpu-defs.h. Reviewed-by: Richard Henderson <rth@redhat.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <dbebd3062c7cd4332240891a3564e73f374ddfcd.1433052532.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-26cpu-defs: Move CPU_TEMP_BUF_NLONGS to tcgPeter Crosthwaite
The usages of this define are pure TCG and there is no architecture specific variation of the value. Localise it to the TCG engine to remove another architecture agnostic piece from cpu-defs.h. This follows on from a28177820a868eafda8fab007561cc19f41941f4 where temp_buf was moved out of the CPU_COMMON obsoleting the need for the super early definition. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <498e8e5325c1a1aff79e5bcfc28cb760ef6b214e.1433052532.git.crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-26memory_mapping: Rework cpu related includesPeter Crosthwaite
This makes it more consistent with all other core code files, which either just rely on qemu-common.h inclusion or precede cpu.h with qemu-common.h. cpu-all.h should not be included in addition to cpu.h. Remove it. Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Message-Id: <1433714349-7262-1-git-send-email-crosthwaite.peter@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-26cutils: allow compilation with iccArtyom Tarasenko
Use VEC_OR macro for operations on VECTYPE operands Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Message-Id: <3f62d7a3a265f7dd99e50d016a0333a99a4a082a.1435062067.git.atar4qemu@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-26qemu-common: add VEC_OR macroArtyom Tarasenko
Intel C Compiler version 15.0.3.187 Build 20150407 doesn't support '|' function for non floating-point simd operands. Define VEC_OR macro which uses _mm_or_si128 supported both in icc and gcc on x86 platform. Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> Message-Id: <54c804cdb3b3a93e93ef98f085dc57c4092580b7.1435062067.git.atar4qemu@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2015-06-26Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20150626' into staging target-arm queue: * Change the virt board's default interface type for block devices to virtio * Improve some error messages that will now be triggered by some incorrect but previously worked-by-accident command lines * Print ELR if we're doing debug logging of AArch64 exception entry * Handle the "completely empty semihosting commandline" correctly for softmmu (we already did for linux-user) * Add GICv2m description to ACPI tables for virt board * Fix some incorrect table revision entries in virt board ACPI tables # gpg: Signature made Fri Jun 26 14:29:39 2015 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20150626: hw/arm/virt: Make block devices default to virtio qdev-properties-system: Improve error message for drive assignment conflict qdev-properties-system: Change set_pointer's parse callback to use Error target-arm: A64: Print ELR when taking exceptions target-arm: default empty semihosting cmdline hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT table hw/arm/virt-acpi-build: Fix table revision and some comments Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-26hw/arm/virt: Make block devices default to virtioPeter Maydell
Now we have virtio-pci, we can make the virt board's default block device type be IF_VIRTIO. This allows users to use simplified command lines that don't have to explicitly create virtio-pci-blk devices; the -hda &c very short options now also work. This means we also need to set no_cdrom to avoid getting a default cdrom device -- this is needed because the virtio-blk device will fail if it is connected to a block backend with no media, which is what the default cdrom device typically is. Providing a cdrom with media via -cdrom will succeed, but silently create a device with non-removable medium. this is probably not really what the user wants, but is the best we can do now. Note that this change means that some command lines which used to work (by accident) will stop working. Where a drive was connected manually to a device but without 'if=none' being specified, we used to treat this as an IDE drive, which we would then not autoplug because the board doesn't support IDE. Now we will treat it as a virtio disk and autoplug it, which means the attempt to use the drive manually will fail: qemu-system-arm: -drive file=img.qcow2,id=foo: Drive 'foo' is already in use because it has been automatically connected to another device (did you need 'if=none' in the drive options?) The command line will have to be changed to include 'if=none', as the error message suggests. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435068107-12594-4-git-send-email-peter.maydell@linaro.org
2015-06-26qdev-properties-system: Improve error message for drive assignment conflictPeter Maydell
If the user forgot if=none on their drive specification they're likely to get an error message because the drive is assigned once automatically by QEMU and once by the manual id=/drive= user command line specification. Improve the error message produced in this case to explicitly guide the user towards if=none. We rephrase the "drive conflict but not for an if=something" error as well to keep the wording in line. The two cases that change are: (1) Drive specified as to be auto-connected and also manually connected (and the board does handle this if= type): qemu-system-x86_64 -nodefaults -display none \ -drive if=scsi,file=tmp.qcow2,id=foo -device ide-hd,drive=foo Previously: qemu-system-x86_64: -device ide-hd,drive=foo: Property 'ide-hd.drive' can't take value 'foo', it's in use Now: qemu-system-x86_64: -device ide-hd,drive=foo: Drive 'foo' is already in use because it has been automatically connected to another device (did you need 'if=none' in the drive options?) (2) Drive specified to be manually connected in two different ways: qemu-system-x86_64 -nodefaults -display none \ -drive if=none,file=tmp.qcow2,id=foo -device ide-hd,drive=foo \ -device ide-hd,drive=foo Previously: qemu-system-x86_64: -device ide-hd,drive=foo: Property 'ide-hd.drive' can't take value 'foo', it's in use Now: qemu-system-x86_64: -device ide-hd,drive=foo: Drive 'foo' is already in use by another device Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435068107-12594-3-git-send-email-peter.maydell@linaro.org
2015-06-26qdev-properties-system: Change set_pointer's parse callback to use ErrorPeter Maydell
Instead of having set_pointer() call a parse callback which returns an error number that we then convert to an Error string with error_set_from_qdev_prop_error(), make the parse callback take an Error** and set the error itself. This will allow parse routines to provide more helpful error messages than the generic ones. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1435068107-12594-2-git-send-email-peter.maydell@linaro.org
2015-06-26target-arm: A64: Print ELR when taking exceptionsSoren Brinkmann
When taking an exception print the content of the exception link register. This is useful especially for synchronous exceptions because in that case this registers holds the address of the instruction that generated the exception. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Message-id: 1435036655-16132-1-git-send-email-soren.brinkmann@xilinx.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-26target-arm: default empty semihosting cmdlineLiviu Ionescu
If neither explicit semihosting args nor -kernel are used, make SYS_GET_CMDLINE return an empty string. Signed-off-by: Liviu Ionescu <ilg@livius.net> Message-id: AC7B5AFC-06AE-4FAD-9852-B65708E80E09@livius.net Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-26hw/arm/virt-acpi-build: Add GICv2m description in ACPI MADT tableShannon Zhao
Add GICv2m description in ACPI MADT table, so guest can use MSI when booting with ACPI. Signed-off-by: Shannon Zhao <zhaoshenglong@huawei.com> Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Andrew Jones <drjones@redhat.com> Tested-by: Andrew Jones <drjones@redhat.com> Message-id: 1434676210-2276-1-git-send-email-shannon.zhao@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-26hw/arm/virt-acpi-build: Fix table revision and some commentsShannon Zhao
The table revision is not the ACPI spec version. Fix the wrong revision and also some comments. Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 1433820378-8336-1-git-send-email-zhaoshenglong@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-26Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150626' into stagingPeter Maydell
MIPS patches 2015-06-26 Changes: * MIPS UHI semihosting support * microMIPS32 R6 support # gpg: Signature made Fri Jun 26 10:42:33 2015 BST using RSA key ID 0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20150626: target-mips: add mips32r6-generic CPU definition target-mips: microMIPS32 R6 POOL16{A, C} instructions target-mips: microMIPS32 R6 Major instructions target-mips: microMIPS32 R6 POOL32{I, C} instructions target-mips: microMIPS32 R6 POOL32F instructions target-mips: microMIPS32 R6 POOL32A{XF} instructions target-mips: microMIPS32 R6 branches and jumps target-mips: add microMIPS32 R6 opcode enum target-mips: signal RI for removed instructions in microMIPS R6 target-mips: raise RI exceptions when FIR.PS = 0 target-mips: rearrange gen_compute_compact_branch target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAP target-mips: remove an unused argument target-mips: add microMIPS TLBINV, TLBINVF target-mips: fix {RD, WR}PGPR in microMIPS target-mips: convert host to MIPS errno values when required target-mips: add Unified Hosting Interface (UHI) support target-mips: remove identical code in different branch hw/mips: Do not clear BEV for MIPS malta kernel load include/softmmu-semi.h: Make semihosting support 64-bit clean Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-26target-mips: add mips32r6-generic CPU definitionYongbok Kim
Define a new CPU definition supporting MIPS32 Release 6 ISA and microMIPS32 Release 6 ISA. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: microMIPS32 R6 POOL16{A, C} instructionsYongbok Kim
microMIPS32 Release 6 POOL16A/ POOL16C instructions Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: microMIPS32 R6 Major instructionsYongbok Kim
Add new microMIPS32 Release 6 Major opcode instructions Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: microMIPS32 R6 POOL32{I, C} instructionsYongbok Kim
Add new microMIPS32 Release 6 POOL32I/POOL32C type instructions Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: microMIPS32 R6 POOL32F instructionsYongbok Kim
Add new microMIPS32 Release 6 POOL32F instructions Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: microMIPS32 R6 POOL32A{XF} instructionsYongbok Kim
Add new microMIPS32 Release 6 pool32a/pool32axf instructions. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: microMIPS32 R6 branches and jumpsYongbok Kim
Add new microMIPS32 Release 6 branch and jump instructions. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: add microMIPS32 R6 opcode enumYongbok Kim
Add microMIPS32 Release 6 opcode enum. Remove RI checking for pre-R6 reserved opcode. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: signal RI for removed instructions in microMIPS R6Yongbok Kim
Signal a Reserved Instruction exception for removed instruction encoding in microMIPS Release 6. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: raise RI exceptions when FIR.PS = 0Yongbok Kim
64-bit paired-single (PS) floating point data type is optional in the pre-Release 6. It has to raise RI exception when PS type is not implemented. (FIR.PS = 0) (The PS data type is removed in the Release 6.) Loongson-2E and Loongson-2F don't have any implementation field in FCSR0(FIR) but do support PS data format, therefore for these cores RI will not be signalled regardless of PS bit. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: rearrange gen_compute_compact_branchYongbok Kim
The function will be also used for microMIPS Release 6. Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: refactor {D}LSA, {D}ALIGN, {D}BITSWAPYongbok Kim
Refactor those instructions in order to reuse them for microMIPS32 Release 6. Rearrange gen_move_low32(). Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: remove an unused argumentYongbok Kim
Remove an unused argument from decode_micromips32_opc() Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: add microMIPS TLBINV, TLBINVFYongbok Kim
Add microMIPS TLBINV, TLBINVF Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: fix {RD, WR}PGPR in microMIPSYongbok Kim
rt, rs were swapped Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26target-mips: convert host to MIPS errno values when requiredLeon Alrae
Convert only errno values which can be returned by system calls in mips-semi.c and are not generic to all archs. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2015-06-26target-mips: add Unified Hosting Interface (UHI) supportLeon Alrae
Add UHI semihosting support for MIPS. QEMU run with "-semihosting" option will alter the behaviour of SDBBP 1 instruction -- UHI operation will be called instead of generating a debug exception. Also tweak Malta's pseudo-bootloader. On CPU reset the $4 register is set to -1 if semihosting arguments are passed to indicate that the UHI operations should be used to obtain input arguments. Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2015-06-26target-mips: remove identical code in different branchLeon Alrae
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2015-06-26hw/mips: Do not clear BEV for MIPS malta kernel loadMatthew Fortune
The BEV flag controls whether the boot exception vector is still in place when starting a kernel. When cleared the exception vector at EBASE (or hard coded address of 0x80000000) is used instead. The early stages of the linux kernel would benefit from BEV still being set to ensure any faults get handled by the boot rom exception handlers. This is a moot point for system qemu as there aren't really any BEV handlers, but there are other good reasons to change this... The UHI (semi-hosting interface) defines special behaviours depending on whether an application starts in an environment with BEV set or cleared. When BEV is set then UHI assumes that a bootloader is relatively dumb and has no advanced exception handling logic. However, when BEV is cleared then UHI assumes that the bootloader has the ability to handle UHI exceptions with its exception handlers and will unwind and forward UHI SYSCALL exceptions to the exception vector that was installed prior to running the application. Signed-off-by: Matthew Fortune <matthew.fortune@imgtec.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-06-26include/softmmu-semi.h: Make semihosting support 64-bit cleanMaciej W. Rozycki
Correct addresses passed around in semihosting to use a data type suitable for both 32-bit and 64-bit targets. Signed-off-by: Maciej W. Rozycki <macro@codesourcery.com> Signed-off-by: Leon Alrae <leon.alrae@imgtec.com> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>
2015-06-25Merge remote-tracking branch 'remotes/stefanha/tags/net-pull-request' into ↵Peter Maydell
staging # gpg: Signature made Wed Jun 24 16:37:23 2015 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/net-pull-request: net: simplify net_client_init1() net: drop if expression that is always true net: raise an error if -net type is invalid net: replace net_client_init1() netdev whitelist with blacklist net: add missing "netmap" to host_net_devices[] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-25Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ↵Peter Maydell
staging # gpg: Signature made Wed Jun 24 16:27:53 2015 BST using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" * remotes/stefanha/tags/block-pull-request: virito-blk: drop duplicate check qemu-iotests: fix 051.out after qdev error message change iov: don't touch iov in iov_send_recv() raw-posix: Introduce hdev_is_sg() raw-posix: Use DPRINTF for DEBUG_FLOPPY raw-posix: DPRINTF instead of DEBUG_BLOCK_PRINT Fix migration in case of scsi-generic block: Use bdrv_is_sg() everywhere nvme: Fix memleak in nvme_dma_read_prp vvfat: add a label option util/hbitmap: Add an API to reset all set bits in hbitmap virtio-blk: Use blk_drain() to drain IO requests block-backend: Introduce blk_drain() throttle: Check current timers before updating any_timer_armed[] block: Let bdrv_drain_all() to call aio_poll() for each AioContext Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2015-06-24net: simplify net_client_init1()Stefan Hajnoczi
Drop the union and move the hubport creation into the !is_netdev case. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1432743412-15943-6-git-send-email-stefanha@redhat.com
2015-06-24net: drop if expression that is always trueStefan Hajnoczi
Both is_netdev and !is_netdev paths already check that net_client_init_func[opts->kind] is non-NULL so there is no need for the if statement. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1432743412-15943-5-git-send-email-stefanha@redhat.com
2015-06-24net: raise an error if -net type is invalidStefan Hajnoczi
When a -net type is used that was not compiled into the binary there should be an error message. Note the special case for -net none, which is a no-op. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1432743412-15943-4-git-send-email-stefanha@redhat.com
2015-06-24net: replace net_client_init1() netdev whitelist with blacklistStefan Hajnoczi
It's cumbersome to keep the whitelist up-to-date. New netdev backends should most likely be allowed so a blacklist makes more sense than a whitelist. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-id: 1432743412-15943-3-git-send-email-stefanha@redhat.com
2015-06-24net: add missing "netmap" to host_net_devices[]Stefan Hajnoczi
Although hmp-commands.hx lists "netmap" as a valid host_net_add type, the command rejects it because it's missing from the list. Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 1432743412-15943-2-git-send-email-stefanha@redhat.com
2015-06-24virito-blk: drop duplicate checkGonglei
in_num = req->elem.in_num, and req->elem.in_num is checked in line 489, so the check about in_num variable is superflous, let's drop it. Signed-off-by: Gonglei <arei.gonglei@huawei.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1435138164-11728-1-git-send-email-arei.gonglei@huawei.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2015-06-24qemu-iotests: fix 051.out after qdev error message changeStefan Hajnoczi
Commit f006cf7fa9a63ba8e4ccf57d46231ce594301727 ("qdev-monitor: Propagate errors through qdev_device_add()") dropped a meaningless error message. This change in output caused qemu-iotests 051 to fail: QEMU_PROG: -device ide-drive,drive=disk: Device initialization failed. -QEMU_PROG: -device ide-drive,drive=disk: Device 'ide-drive' could not be initialized Update 051.out so the test passes again. Cc: Markus Armbruster <armbru@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Fam Zheng <famz@redhat.com> Message-id: 1435071369-30936-1-git-send-email-stefanha@redhat.com
2015-06-24Fix glib_subprocess testDr. David Alan Gilbert
A typo means that the tests dependent on glib with subprocess support are never run. Fixes: 9d41401b90fa10b335d2e739149d36437cfbf622 Signed-off-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: format special OFW unit address for PXB hostLaszlo Ersek
We have agreed that OpenFirmware device paths in the "bootorder" fw_cfg file should follow the pattern /pci@i0cf8,%x/... for devices that live behind an extra root bus. The extra root bus in question is the %x'th among the extra root buses. (In other words, %x gives the position of the affected extra root bus relative to the other extra root buses, in bus_nr order.) %x starts at 1, and is formatted in hex. The portion of the unit address that comes before the comma is dynamically taken from the main host bridge, similarly to sysbus_get_fw_dev_path(). Cc: Kevin O'Connor <kevin@koconnor.net> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/core: explicit OFW unit address callback for SysBusDeviceClassLaszlo Ersek
The sysbus_get_fw_dev_path() function formats OpenFirmware device path nodes ("driver-name@unit-address") for sysbus devices. The first choice for "unit-address" is the base address of the device's first MMIO region. The second choice is its first IO port. However, if two sysbus devices with the same "driver-name" lack both MMIO and PIO resources, then there is no good way to distinguish them based on their OFW nodes, because in this case unit-address is omitted completely for both devices. An example is TYPE_PXB_HOST ("pxb-host"). For the sake of such devices, introduce the explicit_ofw_unit_address() "virtual member function". With this function, each sysbus device in the same SysBusDeviceClass can state its own address. Cc: Markus Armbruster <armbru@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Marcel Apfelbaum <marcel@redhat.com> Tested-by: Marcel Apfelbaum <marcel@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: disable SHPC in PXBLaszlo Ersek
OVMF downloads the ACPI linker/loader script from QEMU when the edk2 PCI Bus driver globally signals the firmware that PCI enumeration and resource allocation have completed. At this point QEMU regenerates the ACPI payload in an fw_cfg read callback, and this is when the PXB's _CRS gets populated. Unfortunately, when this happens, the PCI_COMMAND_MEMORY bit is clear in the root bus's command register, *unlike* under SeaBIOS. The consequences unfold as follows: - When build_crs() fetches dev->io_regions[i].addr, it is all-bits-one, because pci_update_mappings() --> pci_bar_address() calculated it as PCI_BAR_UNMAPPED, due to the PCI_COMMAND_MEMORY bit being clear. - Consequently, the SHPC MMIO BAR (bar 0) of the bridge is not added to the _CRS, *despite* having been programmed in PCI config space. - Similarly, the SHPC MMIO BAR of the PXB is not removed from the main root bus's DWordMemory descriptor. - Guest OSes (Linux and Windows alike) notice the pre-programmed SHPC BAR within the PXB's config space, and notice that it conflicts with the main root bus's memory resource descriptors. Linux reports pci 0000:04:00.0: BAR 0: can't assign mem (size 0x100) pci 0000:04:00.0: BAR 0: trying firmware assignment [mem 0x88200000-0x882000ff 64bit] pci 0000:04:00.0: BAR 0: [mem 0x88200000-0x882000ff 64bit] conflicts with PCI Bus 0000:00 [mem 0x88200000-0xfebfffff] While Windows Server 2012 R2 reports https://technet.microsoft.com/en-us/library/cc732199%28v=ws.10%29.aspx This device cannot find enough free resources that it can use. If you want to use this device, you will need to disable one of the other devices on this system. (Code 12) This issue was apparently encountered earlier, see the "hack" in: https://lists.nongnu.org/archive/html/qemu-devel/2015-01/msg02983.html and the current hole-punching logic in build_crs() and build_ssdt() is probably supposed to remedy exactly that problem -- however, for OVMF they don't work, because at the end of the PCI enumeration and resource allocation, which cues the ACPI linker/loader client, the command register is clear. The "shpc" property of "pci-bridge", introduced in the previous patches, allows us to disable the standard hotplug controller cleanly, eliminating the SHPC bar and the conflict. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: introduce "shpc" propertyLaszlo Ersek
In the PCI expander bridge, we will want to disable those features of pci-bridge that relate to SHPC (standard hotplug controller): - SHPC bar and underlying MemoryRegion - interrupt (INTx or MSI) - effective hotplug callbacks - other SHPC hooks (initialization, cleanup, migration etc) Introduce a new feature request bit in the PCIBridgeDev.flags field, and turn off the above if the bit is explicitly cleared. Suggested-by: Michael S. Tsirkin <mst@redhat.com> Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci: introduce shpc_present() helper functionLaszlo Ersek
It follows msi_present() in "include/hw/pci/msi.h". Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
2015-06-23hw/pci-bridge: add macro for "msi" propertyLaszlo Ersek
This should help catch property name typos at compile time. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Marcel Apfelbaum <marcel@redhat.com> Signed-off-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>