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QEMU is a generic and open source machine & userspace emulator and virtualizer
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Author
2014-01-08
target-arm: use c13_context field for CONTEXTIDR
Sergey Fedorov
2014-01-08
char/cadence_uart: Implement Tx flow control
Peter Crosthwaite
2014-01-08
char/cadence_uart: Delete redundant rx rst logic
Peter Crosthwaite
2014-01-08
char/cadence_uart: Use the TX fifo for transmission
Peter Crosthwaite
2014-01-08
char/cadence_uart: Fix can_receive logic
Peter Crosthwaite
2014-01-08
char/cadence_uart: Remove TX timer & add TX FIFO state
Peter Crosthwaite
2014-01-08
char/cadence_uart: Define Missing SR/ISR fields
Peter Crosthwaite
2014-01-08
char/cadence_uart: Simplify status generation
Peter Crosthwaite
2014-01-08
char/cadence_uart: s/r_fifo/rx_fifo
Peter Crosthwaite
2014-01-08
char/cadence_uart: Fix reset.
Peter Crosthwaite
2014-01-08
char/cadence_uart: Add missing uart_update_state
Peter Crosthwaite
2014-01-08
char/cadence_uart: Mark struct fields as public/private
Peter Crosthwaite
2014-01-08
target-arm: Give the FPSCR rounding modes names
Alexander Graf
2014-01-08
target-arm: A64: Add support for floating point cond select
Claudio Fontana
2014-01-08
target-arm: A64: Add support for floating point conditional compare
Claudio Fontana
2014-01-08
target-arm: A64: Add support for floating point compare
Claudio Fontana
2014-01-08
target-arm: A64: Add fmov (scalar, immediate) instruction
Alexander Graf
2014-01-08
target-arm: A64: Add "Floating-point data-processing (3 source)" insns
Alexander Graf
2014-01-08
target-arm: A64: Add "Floating-point data-processing (2 source)" insns
Alexander Graf
2014-01-08
target-arm: Use VFP_BINOP macro for min, max, minnum, maxnum
Peter Maydell
2014-01-08
target-arm: A64: Fix vector register access on bigendian hosts
Peter Maydell
2014-01-08
target-arm: A64: Add support for dumping AArch64 VFP register state
Alexander Graf
2014-01-08
default-configs: Add config for aarch64-linux-user
Peter Maydell
2014-01-08
.travis.yml: Add aarch64-* targets
Alex Bennée
2014-01-08
linux-user: AArch64: Use correct values for FPSR/FPCR in sigcontext
Will Newton
2014-01-08
linux-user: AArch64: define TARGET_CLONE_BACKWARDS
Claudio Fontana
2014-01-08
target-arm: A64: support for ld/st/cl exclusive
Michael Matz
2014-01-08
target-arm: Widen exclusive-access support struct fields to 64 bits
Peter Maydell
2014-01-08
target-arm: aarch64: add support for ld lit
Alexander Graf
2014-01-08
target-arm: A64: add support for conditional compare insns
Claudio Fontana
2014-01-08
target-arm: A64: add support for add/sub with carry
Claudio Fontana
2014-01-07
target-arm: Widen thread-local register state fields to 64 bits
Peter Maydell
2014-01-07
target-arm: A64: Implement minimal set of EL0-visible sysregs
Peter Maydell
2014-01-07
target-arm: A64: Implement MRS/MSR/SYS/SYSL
Peter Maydell
2014-01-07
target-arm: Remove ARMCPU/CPUARMState from cpregs APIs used by decoder
Peter Maydell
2014-01-04
target-arm: Update generic cpreg code for AArch64
Peter Maydell
2014-01-04
target-arm: Pull "add one cpreg to hashtable" into its own function
Peter Maydell
2013-12-23
target-arm: A64: implement FMOV
Peter Maydell
2013-12-23
target-arm: A64: Add decoder skeleton for FP instructions
Peter Maydell
2013-12-23
target-arm: A64: implement SVC, BRK
Alexander Graf
2013-12-23
target-arm: A64: add support for 3 src data proc insns
Alexander Graf
2013-12-23
target-arm: A64: add support for move wide instructions
Alex Bennée
2013-12-23
target-arm: A64: add support for add, addi, sub, subi
Alex Bennée
2013-12-23
target-arm: A64: add support for ld/st with index
Alex Bennée
2013-12-23
target-arm: A64: add support for ld/st with reg offset
Alex Bennée
2013-12-23
target-arm: A64: add support for ld/st unsigned imm
Alex Bennée
2013-12-23
target-arm: A64: add support for ld/st pair
Peter Maydell
2013-12-22
PPC: Fix compilation with TCG debug
Alexander Graf
2013-12-21
Merge tag 'signed-s390-for-upstream' of git://github.com/agraf/qemu
Aurelien Jarno
2013-12-21
target-sh4: Use new qemu_ld/st opcodes
Aurelien Jarno
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