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2017-01-20aspeed/smc: handle SPI flash Command modeCédric Le Goater
2017-01-20aspeed/smc: adjust the size of the register regionCédric Le Goater
2017-01-20aspeed/smc: unfold the AspeedSMCController arrayCédric Le Goater
2017-01-20aspeed/smc: autostrap CE0/1 configurationCédric Le Goater
2017-01-20aspeed/smc: rework the prototype of the AspeedSMCFlash helper routinesCédric Le Goater
2017-01-20aspeed/smc: remove call to aspeed_smc_update_cs() in reset functionCédric Le Goater
2017-01-20aspeed/smc: remove call to reset in realize functionCédric Le Goater
2017-01-20target/arm: Implement DBGVCR32_EL2 system registerPeter Maydell
2017-01-20target/arm: Handle VIRQ and VFIQ in arm_cpu_do_interrupt_aarch32()Peter Maydell
2017-01-20block: m25p80: Improve 1GiB Micron flash definitionMarcin Krzeminski
2017-01-20block: m25p80: Introduce die erase commandMarcin Krzeminski
2017-01-20block: m25p80: Add Quad Page Program 4byteMarcin Krzeminski
2017-01-20arm: Uniquely name imx25 I2C buses.Alastair D'Silva
2017-01-19Merge remote-tracking branch 'remotes/artyom/tags/pull-sun4v-20170118' into s...Peter Maydell
2017-01-19Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170117' into stagingPeter Maydell
2017-01-18target-sparc: fix up niagara machineArtyom Tarasenko
2017-01-18target-sparc: move common cpu initialisation routines to sparc64.cArtyom Tarasenko
2017-01-18target-sparc: implement sun4v RTCArtyom Tarasenko
2017-01-18target-sparc: add ST_BLKINIT_ ASIs for UA2005+ CPUsArtyom Tarasenko
2017-01-18target-sparc: store the UA2005 entries in sun4u formatArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 ASI_MMU (0x21)Artyom Tarasenko
2017-01-18target-sparc: add more registers to dump_mmuArtyom Tarasenko
2017-01-18target-sparc: implement auto-demapping for UA2005 CPUsArtyom Tarasenko
2017-01-18target-sparc: allow 256M sized pagesArtyom Tarasenko
2017-01-18target-sparc: simplify ultrasparc_tsb_pointerArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 TSB PointersArtyom Tarasenko
2017-01-18target-sparc: use SparcV9MMU type for sparc64 I/D-MMUsArtyom Tarasenko
2017-01-18target-sparc: replace the last tlb entry when no free entries leftArtyom Tarasenko
2017-01-18target-sparc: ignore writes to UA2005 CPU mondo queue registerArtyom Tarasenko
2017-01-18target-sparc: allow priveleged ASIs in hyperprivileged modeArtyom Tarasenko
2017-01-18target-sparc: use direct address translation in hyperprivileged modeArtyom Tarasenko
2017-01-18target-sparc: fix immediate UA2005 trapsArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 rdhpstate and wrhpstate instructionsArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 GL registerArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 hypervisor trapsArtyom Tarasenko
2017-01-18target-sparc: hypervisor mode takes over nucleus modeArtyom Tarasenko
2017-01-18target-sparc: implement UltraSPARC-T1 Strand status ASRArtyom Tarasenko
2017-01-18target-sparc: implement UA2005 scratchpad registersArtyom Tarasenko
2017-01-18target-sparc: simplify replace_tlb_entry by using TTE_PGSIZEArtyom Tarasenko
2017-01-18target-sparc: on UA2005 don't deliver Interrupt_level_n IRQs in hypervisor modeArtyom Tarasenko
2017-01-18target-sparc: add UltraSPARC T1 TLB #definesArtyom Tarasenko
2017-01-18target-sparc: add UA2005 TTE bit #definesArtyom Tarasenko
2017-01-18target-sparc: use explicit mmu register pointersArtyom Tarasenko
2017-01-18target-sparc: store cpu super- and hypervisor flags in TBArtyom Tarasenko
2017-01-18target-sparc: ignore MMU-faults if MMU is disabled in hypervisor modeArtyom Tarasenko
2017-01-17tcg/i386: Always use TZCNT when availableRichard Henderson
2017-01-17Revert "tcg/i386: Rely on undefined/undocumented behaviour of BSF/BSR"Richard Henderson
2017-01-17Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' int...Peter Maydell
2017-01-17Merge remote-tracking branch 'remotes/armbru/tags/pull-qapi-2017-01-16' into ...Peter Maydell
2017-01-17Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into ...Peter Maydell
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