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2010-04-08target-i386: Fix compiler warningStefan Weil
With argument checking for cpu_fprintf, gcc throws this warning: CC i386-softmmu/helper.o cc1: warnings being treated as errors /qemu/ar7/target-i386/helper.c: In function ‘cpu_x86_dump_seg_cache’: /qemu/ar7/target-i386/helper.c:220: error: format not a string literal and no format arguments The code is correct, but current gcc versions don't detect this. Therefore the patch rewrites the statement to satisfy the compiler. Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08remove TARGET_* defines from translate-all.cPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08e1000: fix build on Ubuntu with _FORTIFY_SOURCEThomas Monjalon
There was a pointer cast warning on Ubuntu since _FORTIFY_SOURCE has been reenabled. _FORTIFY_SOURCE had been disabled by 4a24470497360d8b77568b83008d0e9d6eb0787d and reenabled by 849583050d5f6f782718be8cb50688978973fbea. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08smc91c111: allow access to reserved registerLars Munch
Some drivers seems to access the reserved register in bank 0 so allow and ignore these accesses. Signed-off-by: Lars Munch <lars@segv.dk> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08smc91c111: mask register offsetLars Munch
this fixes the smc91c111 emulation which has been broken for gumstix and mainstone and maybe others since the "MMIO callback interface changes" 8da3ff180974732fc4272cb4433fef85c1822961 was commited. Signed-off-by: Lars Munch <lars@segv.dk> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08baum: add destroy hookSamuel Thibault
Add a destroy hook for the baum character device, to properly close the BrlAPI connection. Signed-off-by: Samuel Thibault <samuel.thibault@ens-lyon.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08target-arm: fix neon vmon/vmvn with modified immediateJuha Riihimäki
Signed-Off-By: Riku Voipio <riku.voipio@nokia.com> Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08fix function signature of qemu_chr_open_pty on !linuxRiku Voipio
Signed-off-By: Riku Voipio <riku.voipio@nokia.com> Signed-off-By: Juha Riihimäki <juha.riihimaki@nokia.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08Shrink tb_jmp_offset to two entries, the other two are never used.Filip Navara
Signed-Off-By: Riku Voipio <riku.voipio@nokia.com> Signed-off-by: Filip Navara <filip.navara@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08tcg-hppa: Don't try to calls to non-constant addresses.Richard Henderson
PA-RISC uses procedure descriptors. We'd need to emit a call to the millicode routine $$dyncall. However, this situation doesn't actually arise, since we always have the descriptor available at TCG code generation time. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08tcg-hppa: Fix in/out register overlap in add2/sub2.Richard Henderson
Handle the output log part overlapping the input high parts. Also, improve sub2 to handle some constants the second input low part. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08tcg-hppa: Finish the port.Richard Henderson
Delete inline functions from tcg-target.h that don't need to be there, move the others to tcg-target.c. Add 'Z', 'I', 'J' constraints for 0, signed 11-bit, and signed 5-bit respectively. Add GUEST_BASE support similar to ppc64, with the value stored in a register. Add missing registers to reg_alloc_order. Add support for 12-bit branch relocations. Add functions for synthetic operations: addi, mtctl, dep, shd, vshd, ori, andi, shifts, rotates, multiply, branches, setcond. Split out TLB reads from qemu_ld and qemu_st; fix argument loading for tlb external calls. Generate the prologue. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08tcg-hppa: Compute is_write in cpu_signal_handler.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08update bochs vbe interfaceGerd Hoffmann
The bochs vbe interface got a new register a while back, which specifies the linear framebuffer size in 64k units. This patch adds support for the new register to qemu. With this patch applied vgabios 0.6c works with qemu. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08read-only: allow read-only CDROM with any interfaceNaphtali Sprei
Signed-off-by: Naphtali Sprei <nsprei@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08Replace direct phys_ram_dirty access with wrapper functions.Yoshiaki Tamura
Replaces direct phys_ram_dirty access with wrapper functions to prevent direct access to the phys_ram_dirty bitmap. Signed-off-by: Yoshiaki Tamura <tamura.yoshiaki@lab.ntt.co.jp> Signed-off-by: OHMURA Kei <ohmura.kei@lab.ntt.co.jp> Reviewed-by: Avi Kivity <avi@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08Introduce wrapper functions to access phys_ram_dirty.Yoshiaki Tamura
Adds wrapper functions to prevent direct access to the phys_ram_dirty bitmap. Signed-off-by: Yoshiaki Tamura <tamura.yoshiaki@lab.ntt.co.jp> Signed-off-by: OHMURA Kei <ohmura.kei@lab.ntt.co.jp> Reviewed-by: Avi Kivity <avi@redhat.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08target-arm: resource leak fixes for iwmmxt disassembleLars Munch
This patch fixes few resource leaks in the iwmmxt disassemble. Signed-off-by: Lars Munch <lars@segv.dk> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08linux-user: switch default ppc64 CPU to 970fx from 970Aurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-08tcg/ia64: fix tlb addend readAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-07tcg/ppc64: Fix typomalc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-07fix 100% cpu utilization when cpu is stoppedPaolo Bonzini
> Hello, > > d6f4ade (disentangle tcg and deadline calculation, 2010-03-10) > introduces following regression(s): > > 100% cpu utilization when QEMU is invoked like: > qemu -S -s ... > > ditto when gdb takes control over the session via gdb-stub > (i.e. the breakpoint is hit or C-c is pressed inside gdb to > interrupt the attached qemu instance) The bug is that env->stopped is not really as comprehensive as it seems to be (and cpu_has_work thinks); it is only valid with iothread basically, and even then it is cleared by reset and it is not set when starting qemu with -S. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Cc: malc <av1474@comtv.ru> Signed-off-by: malc <av1474@comtv.ru>
2010-04-06tcg/ppc: Fix typomalc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-06tcg/ppc: Implment bswap16/32malc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-05OHCI qdev conversionPaul Brook
Convert remaining OHCI devices to QDEV interface. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05Fix arm-linux-userPaul Brook
Only include hw/loader.h from target-arm/helper.c when building for system emulation. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05ARMv7-M reset fixesPaul Brook
Move ARMv7-M PC/SP initialization to the CPU reset routine. Add a board reset routine to call this. Also load values directly from ROM as images have not been copied yet. Avoid clearing the NVIC pointer on cpu reset. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-05tcg/mips: use seb/seh instructions on MIPS32R2Aurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-05tcg/mips: fix 64-bit linux-user on big endian MIPSAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-05tcg/ppc: Implement eqv, nand and normalc
Signed-off-by: malc <av1474@comtv.ru>
2010-04-05Split TLB addend and target_phys_addr_tPaul Brook
Historically the qemu tlb "addend" field was used for both RAM and IO accesses, so needed to be able to hold both host addresses (unsigned long) and guest physical addresses (target_phys_addr_t). However since the introduction of the iotlb field it has only been used for RAM accesses. This means we can change the type of addend to unsigned long, and remove associated hacks in the big-endian TCG backends. We can also remove the host dependence from target_phys_addr_t. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-04UHCI spurious interrut fixPaul Brook
Only raise an interrupt if the TD has actually completed. Signed-off-by: Paul Brook <paul@codesourcery.com>
2010-04-04Revert "Compile usb-ohci only once"Paul Brook
This reverts commit f1698408f1dcb7548a21828a0b1e2b530fae3af3. PCI is always little-endian. Having a user-visible "be" property is just plain wrong.
2010-04-04tcg/ppc: Fix not_i32malc
Thanks to Alexander Graf for bug report and a good reproducible test case. Signed-off-by: malc <av1474@comtv.ru>
2010-04-03Make cpu_get_real_ticks use mfsprAlexander Graf
PowerPC CPUs have had two ways to read the time base for quite some time now. They provide it using the mfspr instruction or - if a special bit is set in that opcode - using mftb. For timekeeping we're currently using mftb. While trying to get Qemu up and running on an e500v2 system, I stumbled over the CPU not supporting mftbu. It just throws an illegal instruction trap. So let's read the SPR values instead. All PPC CPUs should support them anyways. I tested this patch on an e500v2 system where it makes qemu work and on my 970MP system with 32-bit user space where everything still works with this patch applied. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: malc <av1474@comtv.ru>
2010-04-03sparc32: add IOMMU chipset doc linksBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-03sparc32: rename iommu.c to sun4m_iommu.c to make room for other IOMMUsBlue Swirl
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-03sparc32: improve timer implementationBlue Swirl
Timer with zero period (free-run) will never match. Timer counting starts with tick value of 0x200, not from 0, so the period must calculated from one tick less than the limit. Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
2010-04-02Fix build on mingw32Anthony Liguori
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-02hw/r2d: add a USB keyboardAurelien Jarno
The R2D board does not have a PS/2 port, and only support a keyboard on the USB bus. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-02usb-bus: fix no paramsTeLeMan
After commit 702f3e0fb52c124c07f215426eeadb70a716643f, the params is nerver NULL. It should check *params instead of params to determine whether the params is empty. Signed-off-by: TeLeMan <geleman@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-02Update PowerPC OpenBIOS image to r721Aurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01win32: Fix compiler errors from u_int64_tStefan Weil
u_int64_t raises compiler error messages: CC libhw32/virtio.o /qemu/ar7/hw/virtio.c: In function ‘virtio_queue_get_avail_size’: /qemu/ar7/hw/virtio.c:776: error: ‘u_int64_t’ undeclared (first use in this function) /qemu/ar7/hw/virtio.c:776: error: (Each undeclared identifier is reported only once /qemu/ar7/hw/virtio.c:776: error: for each function it appears in.) Replacing u_int64_t by uint64_t helps. Cc: Michael S. Tsirkin <mst@redhat.com> Cc: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
2010-04-01tcg/TODO: remove setcondAurelien Jarno
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01Fix compilation with missing inotify_init1Stefan Weil
Commit c05c7a7306a23a4b01d1606172b142c45caffc92 breaks cross compilation for mips (and other compilations without CONFIG_INOTIFY1): make[1]: Entering directory `/qemu/bin/mips' CC i386-linux-user/syscall.o cc1: warnings being treated as errors /qemu/linux-user/syscall.c: In function ‘do_syscall’: /qemu/linux-user/syscall.c:7067: error: implicit declaration of function ‘sys_inotify_init1’ Cc: Riku Voipio <riku.voipio@nokia.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Stefan Weil <weil@mail.berlios.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01S390: Tell user why VM creation failedAlexander Graf
The KVM kernel module on S390 refuses to create a VM when the switch_amode kernel parameter is not used. Since that is not exactly obvious, let's give the user a nice warning. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01S390: Add stub for cpu_get_phys_page_debugAlexander Graf
We don't implement any virtual memory in the S390 target so far, so let's add a stub for this now mandatory function. Fixes building of S390 target. Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01tcg: initial ia64 supportAurelien Jarno
A few words about design choices: * On IA64, instructions should be grouped by bundle, and dependencies between instructions declared. A first version of this code tried to schedule instructions automatically, but was very complex and too invasive for the current common TCG code (ops not ending at instruction boundaries, code retranslation breaking already generated code, etc.) It was also not very efficient, as dependencies between TCG ops is not available. Instead the option taken by the current implementation does not try to fill the bundle by scheduling instructions, but by providing ops not available as an ia64 instruction, and by offering 22-bit constant loading for most of the instructions. With both options the bundle are filled at approximately the same level. * Up to 128 registers can be affected to a function on IA64, but TCG limits this number to 64, which is actually more than enough. The register affectation is the following: - r0: used to map a constant argument with value 0 - r1: global pointer - r2, r3: internal use - r4 to r6: not used to avoid saving them - r7: env structure - r8 to r11: free for TCG (call clobbered) - r12: stack pointer - r13: thread pointer - r14 to r31: free for TCG (call clobbered) - r32: reserved (return address) - r33: reserved (PFS) - r33 to r63: free for TCG * The IA64 architecture has only 64-bit registers and no 32-bit instructions (the only exception being cmp4). Therefore 64-bit registers and instructions are used for 32-bit ops. The adopted strategy is the same as the ABI, that is the higher 32 bits are undefined. Most ops (and, or, add, shl, etc.) can directly use the 64-bit registers, while some others have to sign-extend (sar, div, etc.) or zero-extend (shr, divu, etc.) the register first. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01tcg: align static_code_gen_buffer to CODE_GEN_ALIGNAurelien Jarno
On ia64, the default memory alignement is not enough for a code alignement. To fix that, force static_code_gen_buffer alignment to CODE_GEN_ALIGN. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2010-04-01ia64 disas supportAurelien Jarno
Taken from binutils SVN, using last GPLv2 version. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
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