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2023-02-23target/riscv: avoid env_archcpu() in cpu_get_tb_cpu_state()Daniel Henrique Barboza
We have a RISCVCPU *cpu pointer available at the start of the function. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Weiwei Li <liweiwei@iscas.ac.cn> Message-ID: <20230210123836.506286-1-dbarboza@ventanamicro.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-23target/riscv: Smepmp: Skip applying default rules when address matchesHimanshu Chauhan
When MSECCFG.MML is set, after checking the address range in PMP if the asked permissions are not same as programmed in PMP, the default permissions are applied. This should only be the case when there is no matching address is found. This patch skips applying default rules when matching address range is found. It returns the index of the match PMP entry. Fixes: 824cac681c3 (target/riscv: Fix PMP propagation for tlb) Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230209055206.229392-1-hchauhan@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-23MAINTAINERS: Add some RISC-V reviewersAlistair Francis
This patch adds some active RISC-V members as reviewers to the MAINTAINERS file. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Acked-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Acked-by: Weiwei Li <liweiwei@iscas.ac.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Frank Chang <frank.chang@sifive.com> Message-Id: <20230209003308.738237-1-alistair.francis@opensource.wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-23target/riscv: Remove privileged spec version restriction for RVVFrank Chang
The RVV specification does not require that the core needs to support the privileged specification v1.12.0 to support RVV, and there is no dependency from ISA level. This commit removes the restriction from both RVV CSRs and extension CPU ISA string. Signed-off-by: Frank Chang <frank.chang@sifive.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230208063209.27279-1-frank.chang@sifive.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-16hw/riscv/boot.c: make riscv_load_initrd() staticDaniel Henrique Barboza
The only remaining caller is riscv_load_kernel_and_initrd() which belongs to the same file. Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230206140022.2748401-4-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-16hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()Daniel Henrique Barboza
The microchip_icicle_kit, sifive_u, spike and virt boards are now doing the same steps when '-kernel' is used: - execute load_kernel() - load init_rd() - write kernel_cmdline Let's fold everything inside riscv_load_kernel() to avoid code repetition. To not change the behavior of boards that aren't calling riscv_load_init(), add an 'load_initrd' flag to riscv_load_kernel() and allow these boards to opt out from initrd loading. Cc: Palmer Dabbelt <palmer@dabbelt.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230206140022.2748401-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-16hw/riscv: handle 32 bit CPUs kernel_entry in riscv_load_kernel()Daniel Henrique Barboza
Next patch will move all calls to riscv_load_initrd() to riscv_load_kernel(). Machines that want to load initrd will be able to do via an extra flag to riscv_load_kernel(). This change will expose a sign-extend behavior that is happening in load_elf_ram_sym() when running 32 bit guests [1]. This is currently obscured by the fact that riscv_load_initrd() is using the return of riscv_load_kernel(), defined as target_ulong, and this return type will crop the higher 32 bits that would be padded with 1s by the sign extension when running in 32 bit targets. The changes to be done will force riscv_load_initrd() to use an uint64_t instead, exposing it to the padding when dealing with 32 bit CPUs. There is a discussion about whether load_elf_ram_sym() should or should not sign extend the value returned by 'lowaddr'. What we can do is to prevent the behavior change that the next patch will end up doing. riscv_load_initrd() wasn't dealing with 64 bit kernel entries when running 32 bit CPUs, and we want to keep it that way. One way of doing it is to use target_ulong in 'kernel_entry' in riscv_load_kernel() and rely on the fact that this var will not be sign extended for 32 bit targets. Another way is to explictly clear the higher 32 bits when running 32 bit CPUs for all possibilities of kernel_entry. We opted for the later. This will allow us to be clear about the design choices made in the function, while also allowing us to add a small comment about what load_elf_ram_sym() is doing. With this change, the consolation patch can do its job without worrying about unintended behavioral changes. [1] https://lists.gnu.org/archive/html/qemu-devel/2023-01/msg02281.html Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230206140022.2748401-2-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-02-09tests/qtest/netdev-socket: Raise connection timeout to 60 secondsPeter Maydell
The netdev-socket test intermittently fails on our s390x CI runner: 633/659 ERROR:../tests/qtest/netdev-socket.c:197:test_stream_unix: assertion failed (resp == expect): ("st0: index=0,type=stream,connection error\r\n" == "st0: index=0,type=stream,unix:/tmp/netdev-socket.GZUG01/stream_unix\r\n") ERROR 633/659 qemu:qtest+qtest-xtensa / qtest-xtensa/netdev-socket ERROR 5.47s killed by signal 6 SIGABRT This may just be because when the machine is under heavy load running the CI tests it hits the timeout before the QEMU under test has started to the point of being able to respond to HMP queries. Bump the timeout to 60 seconds to see if the intermittent goes away. Acked-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230207165119.1479132-1-peter.maydell@linaro.org
2023-02-08Merge tag 'pull-tricore-20230208' of https://github.com/bkoppelmann/qemu ↵Peter Maydell
into staging tricore insn bugfixes for qemu 8.0 # -----BEGIN PGP SIGNATURE----- # # iQJTBAABCgA9FiEEbmNqfoPy3Qz6bm43CtLGOWtpyhQFAmPjZjUfHGtiYXN0aWFu # QG1haWwudW5pLXBhZGVyYm9ybi5kZQAKCRAK0sY5a2nKFHBmD/9r8dgNWWMYdXrC # PO9fNg1lk+zR9AfTBc7YonuNo/aRmoh48r36FCIKPVWIspyXaEpjyCUAA79Lmhw7 # XGRqDbosa7TNSyQgOfqKyxAc7uISRBSFIQocbTCKTcpwcBpOUhSQFMjwc4yj1HGE # D7511nyPd4ekqTVzaLrXwWVIFdefW85F7DoXK2G5k7NyO1I2TBoFdbjosDff4cOu # T0ZYPTmZoSvUgP80WUyQPcs0lKk56oFqFsgjtqhmhdGf4FNxxrIMHNhJeZJsHt6I # aG1MZbVAyOAGXyLZmu6PFxVOckkoMMZMxXV6rMfgmztt8PxRcvzUu5DceovI2xt4 # OQb6b13XwHB2ShUCqM8eQAQyAUMrYdjVMu5gLsO5rpzcZz+2cZmUUGXtjZojLRzY # m2IyCQIDjR6GlBnLqzD8lKWbW8c7v6bHnhyYZpy1K1I54/dsbia9Hl40v/Ebch5f # CYfgJQFe5CfkyY+Ya9bItTf/cfcnmOKpKhmFy3r005BzbSVWJ+Ax3AXKuRey5MF7 # itHS2wVYq5Fap/SCS4slL/4u/Doo9DybwLRdTXtqMxUcl7WpyjA5L/W5VhJrDb+a # F21uAtqaYf+0UHLmGOJRMx3LAf/YvvPQLYO8FmnfVoS6t6V+/B5/eyXPRwmX1mJC # jLu6hzzX4kR9zZ7lNhOlv0d9vkt5Sg== # =83AO # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Feb 2023 09:07:01 GMT # gpg: using RSA key 6E636A7E83F2DD0CFA6E6E370AD2C6396B69CA14 # gpg: issuer "kbastian@mail.uni-paderborn.de" # gpg: Good signature from "Bastian Koppelmann <kbastian@mail.uni-paderborn.de>" [full] # Primary key fingerprint: 6E63 6A7E 83F2 DD0C FA6E 6E37 0AD2 C639 6B69 CA14 * tag 'pull-tricore-20230208' of https://github.com/bkoppelmann/qemu: tests/tcg/tricore: Add test for ld.h target/tricore: Fix OPC1_16_SRO_LD_H translation tests/tcg/tricore: Add LD.BU tests target/tricore: Fix OPC2_32_BO_LD_BU_PREINC tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR tests target/tricore: Fix OPC2_32_RRRR_DEXTR tests/tcg/tricore: Add tests for RRPW_DEXTR target/tricore: Fix RRPW_DEXTR tests/tcg/tricore: Add test for OPC2_32_RCRW_INSERT target/tricore: Fix OPC2_32_RCRW_INSERT translation tests/tcg/tricore: Add test for OPC2_32_RCRW_IMASK target/tricore: Fix OPC2_32_RCRW_IMASK translation Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-08Merge tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru ↵Peter Maydell
into staging Header cleanup patches for 2023-02-06 # -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmPjQRUSHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZTWHwQAI5D2HTRt3peFSPg/tFuYqSGtOobzM5x # xdZxjWCtGV+dZ4TsyQ7yJkQ2i6aPjs0LzmTnTIsmf+p1OJSthvp4fQUzfXQauiJy # OnNA76v7WjiXB8u8tcXtEkkHNmccp8n4KMjk33TfK/HQVx7lZ2EFurlCkvBr5wki # FuDVad6R43ChmvBWdCUOi6G1IklAihm8AN4lBJu3iC7U8bjW4FmLLMitcu5OyKgt # v9V4XFAe4eYUIPZ6uH5Lpr5m/qtrRXLe9KOdRUR2vDVL18Cf6Zl7mrUNtv7iV5TI # hBOA12ZP5XXf81FXl7e8y3Xi2KXvb/el0wQ7SvtE7XB3Pdbfa5WSGKOc3VxYLmBA # 4xUnEbzAogrrruovdk1bmh2LnVzCH66m72xaLCHBvjOU3M6V2B0eeaZ35FxNuFcB # toHPAjeuzWkDAscVYcYKuPwnkNOMNqHxEdihrgy6mYLr6nauIYr7Lqgs3SqGqpct # /HGy683+J+AqnHFTk1MTRftDxqk/Nku6ntAxLXndkpm3uDvu+iV5d3BfK3A9t7d1 # A2Y983DU6SiVwpMIv2eDL8sXYxuwIs56ZmPYIcSbqzpCXtdFqwWOTeFET/4vD+8t # V3YKJ27jmWQ9bxbLHGPPYSKheuCVBIGsqxouE/Pbj5nXRKm/TeGp+20a4dWdE08r # 2WTLAQbVQGD4 # =5TPW # -----END PGP SIGNATURE----- # gpg: Signature made Wed 08 Feb 2023 06:28:37 GMT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653 * tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru: Drop duplicate #include Don't include headers already included by qemu/osdep.h Fix non-first inclusions of qemu/osdep.h accel: Clean up includes block: Clean up includes riscv: Clean up includes target/hexagon: Clean up includes net: Clean up includes migration: Clean up includes qga: Clean up includes hw/tricore: Clean up includes hw/input: Clean up includes hw/cxl: Clean up includes crypto: Clean up includes bsd-user: Clean up includes scripts/clean-includes: Improve --git commit message scripts/clean-includes: Skip symbolic links scripts/clean-includes: Don't claim duplicate headers found when not scripts/clean-includes: Fully skip / ignore files Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-08tests/tcg/tricore: Add test for ld.hBastian Koppelmann
this exercises the error reported in https://gitlab.com/qemu-project/qemu/-/issues/652. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230203132132.511254-1-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08target/tricore: Fix OPC1_16_SRO_LD_H translationAnton Kochkov
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Eitan Eliahu <eitan_eliahu@hotmail.com> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/652 Message-Id: <20230112142258.514079-1-anton.kochkov@proton.me> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08tests/tcg/tricore: Add LD.BU testsBastian Koppelmann
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-11-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08target/tricore: Fix OPC2_32_BO_LD_BU_PREINCBastian Koppelmann
we were sign extending the result of the load, while the instruction clearly states that the result should be unsigned. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-10-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08tests/tcg/tricore: Add OPC2_32_RRRR_DEXTR testsBastian Koppelmann
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-9-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08target/tricore: Fix OPC2_32_RRRR_DEXTRBastian Koppelmann
if cpu_gpr_d[r3] == 0 then we were shifting the lower register to the right by 32 which is undefined behaviour. In this case the TriCore would do nothing an just return the higher register cpu_reg_d[r1]. We fixed that by detecting whether cpu_gpr_d[r3] was zero and cleared the lower register. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-8-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08tests/tcg/tricore: Add tests for RRPW_DEXTRBastian Koppelmann
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-7-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08target/tricore: Fix RRPW_DEXTRBastian Koppelmann
if we used const16 == 0 we would crash qemu with the error: ../tcg/tcg-op.c:196: tcg_gen_shri_i32: Assertion `arg2 >= 0 && arg2 < 32' failed This whole instruction can be handled by 'tcg_gen_extract2_tl' which takes care of this special case as well. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-6-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08tests/tcg/tricore: Add test for OPC2_32_RCRW_INSERTBastian Koppelmann
DREG_RS2 and DREG_CALC_RESULT were mapped to the same register which would not trigger https://gitlab.com/qemu-project/qemu/-/issues/653. So let's make each register unique. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-5-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08target/tricore: Fix OPC2_32_RCRW_INSERT translationBastian Koppelmann
we were mixing up the "c" and "d" registers. We used "d" as a destination register und "c" as the source. According to the TriCore ISA manual 1.6 vol 2 it is the other way round. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/653 Message-Id: <20230202120432.1268-4-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08tests/tcg/tricore: Add test for OPC2_32_RCRW_IMASKBastian Koppelmann
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-Id: <20230202120432.1268-3-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08target/tricore: Fix OPC2_32_RCRW_IMASK translationBastian Koppelmann
we were mixing up the "c" and "d" registers. We used "d" as a destination register und "c" as the source. According to the TriCore ISA manual 1.6 vol 2 it is the other way round. Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Resolves: https://gitlab.com/qemu-project/qemu/-/issues/653 Message-Id: <20230202120432.1268-2-kbastian@mail.uni-paderborn.de> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
2023-02-08Drop duplicate #includeMarkus Armbruster
Tracked down with the help of scripts/clean-includes. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20230202133830.2152150-21-armbru@redhat.com>
2023-02-08Don't include headers already included by qemu/osdep.hMarkus Armbruster
This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster <armbru@redhat.com> Acked-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-19-armbru@redhat.com>
2023-02-08Fix non-first inclusions of qemu/osdep.hMarkus Armbruster
This commit was created with scripts/clean-includes. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20230202133830.2152150-18-armbru@redhat.com>
2023-02-08accel: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-17-armbru@redhat.com>
2023-02-08block: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20230202133830.2152150-16-armbru@redhat.com>
2023-02-08riscv: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-15-armbru@redhat.com>
2023-02-08target/hexagon: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Changes to standalone programs dropped, because these intentionally don't use qemu/osdep.h: target/hexagon/gen_dectree_import.c target/hexagon/gen_semantics.c target/hexagon/idef-parser/idef-parser.h target/hexagon/idef-parser/parser-helpers.c target/hexagon/idef-parser/parser-helpers.h Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Taylor Simpson <tsimpson@quicinc.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-14-armbru@redhat.com>
2023-02-08net: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-13-armbru@redhat.com>
2023-02-08migration: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Dr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20230202133830.2152150-12-armbru@redhat.com> [Straightforward conflict with commit d5890ea0722 resolved]
2023-02-08qga: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Konstantin Kostiuk <kkostiuk@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-11-armbru@redhat.com>
2023-02-08hw/tricore: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-10-armbru@redhat.com>
2023-02-08hw/input: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-9-armbru@redhat.com>
2023-02-08hw/cxl: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-8-armbru@redhat.com> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2023-02-08crypto: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-7-armbru@redhat.com>
2023-02-08bsd-user: Clean up includesMarkus Armbruster
This commit was created with scripts/clean-includes. All .c should include qemu/osdep.h first. The script performs three related cleanups: * Ensure .c files include qemu/osdep.h first. * Including it in a .h is redundant, since the .c already includes it. Drop such inclusions. * Likewise, including headers qemu/osdep.h includes is redundant. Drop these, too. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Warner Losh <imp@bsdimp.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Message-Id: <20230202133830.2152150-6-armbru@redhat.com>
2023-02-08scripts/clean-includes: Improve --git commit messageMarkus Armbruster
The script drops #include "qemu/osdep.h" from headers. Mention it in the commit message it uses for --git. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20230202133830.2152150-5-armbru@redhat.com>
2023-02-08scripts/clean-includes: Skip symbolic linksMarkus Armbruster
When a symbolic link points to a file that needs cleaning, the script replaces the link with a cleaned regular file. Not wanted; skip them. We have a few symbolic links under subprojects/libvduse/ and subprojects/libvhost-user/. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20230202133830.2152150-4-armbru@redhat.com>
2023-02-08scripts/clean-includes: Don't claim duplicate headers found when notMarkus Armbruster
When running with --check-dup-head, the script always claims it "Found duplicate header file includes." Fix to do it only when it actually found some. Fixes: d66253e46ae2 ("scripts/clean-includes: added duplicate #include check") Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20230202133830.2152150-3-armbru@redhat.com>
2023-02-08scripts/clean-includes: Fully skip / ignore filesMarkus Armbruster
When clean-includes claims to skip or ignore a file, only the part that sanitizes use of qemu/osdep.h skips the file. The part that looks for duplicate #include does not, and neither does committing to Git. The latter can get unrelated stuff included in the commit, but only if you run clean-includes in a dirty tree, which is unwise. Messed up when we added skipping in commit fd3e39a40c "scripts/clean-includes: Enhance to handle header files". The former can cause bogus reports for --check-dup-head. Added in commit d66253e46a "scripts/clean-includes: added duplicate #include check", duplicating the prior mistake. Fix the script to fully skip files. Fixes: fd3e39a40ca2 ("scripts/clean-includes: Enhance to handle header files") Fixes: d66253e46ae2 ("scripts/clean-includes: added duplicate #include check") Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-Id: <20230202133830.2152150-2-armbru@redhat.com>
2023-02-07Merge tag 'for-upstream-py38' of https://gitlab.com/bonzini/qemu into stagingPeter Maydell
Update CentOS 8 playbook and CI configuration to Python 3.8 The playbook has already been run by Cleber on the machine. # -----BEGIN PGP SIGNATURE----- # # iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmPiN6MUHHBib256aW5p # QHJlZGhhdC5jb20ACgkQv/vSX3jHroN1Xwf+IPCNoE0kRY4Ne6Rk6wa6HuKs72yW # zCd1k9jAvy5trroKxbaoqLYaZlh+R+s4KNIifsVmMjtAI57LfI8+5SW0AhnQLWCO # 4MXwI96tscR2lw7nYZcjwEx7hW+MElTgmTiz+FrqrXKkcwBYveu+f2nOfVGzcC+w # d4aGnpoaPcnqHs5TxIhxedbxXCNXHMhSYPAThSKVAtrnUxH7pYHGHjU0WbRFlEkV # oDIpSsbut+zwNxVWwaL9j6TiNNgKU2JSyZ8YA+sylUMjrPSVFs9K3p9sQnuGA08I # uhKGPVUOsIoagshe41wBxEN4dMyQBNUWODOcngkrOwNJZ1mzgCumKPLJBg== # =0wnj # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Feb 2023 11:36:03 GMT # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * tag 'for-upstream-py38' of https://gitlab.com/bonzini/qemu: scripts/ci: bump CentOS Python to 3.8 scripts/ci: unify package lists for CentOS in build-environment files scripts/ci: add capstone development packages scripts/ci: support CentOS Stream 8 in build-environment.yaml scripts/ci: remove unnecessary checks from CentOS playbook Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-07Merge tag 'pull-aspeed-20230207' of https://github.com/legoater/qemu into ↵Peter Maydell
staging aspeed queue: * various small cleanups and fixes * new variant of the supermicrox11-bmc machine using an ast2500-a1 SoC * at24c_eeprom extension to define eeprom contents with static arrays * ast10x0 model and test improvements * avocado update of images to use the latest # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmPiByEACgkQUaNDx8/7 # 7KF1nw/7BxVb8bxO5T00AnGDFNahDq3ItyisrbOkElDw18oN1eULrtZFH1UopjDE # 3HKwR2nb4X7MfcLirVXXxwO1GgIxUkeCsVEY6hpg3TxDPRhPW2toNpNt/WCfFKgq # ZdYdaKgkON/xHQPv6kgQzU2n9Zpuznj0CE9A3k1mAyBcCSitsvu4TW6AQBKmLgUR # 9lu61onfX9XoPxZv3abuY3c3UyzevOc6BUT67dmr8naAhHLyBU+DWAW6Kg0Dtc9j # p+bwxIDRimK50DJt9l13OLSAJyhrW1gMsPPGb+48OClpEOhHwq8oqRuMFpbHaQ0/ # 2MMtMbavXtzBScfmLzR3yw2IwohxSXKMe+7irkJiG/hc8/gtpRATaaS+zfvS0rla # QybWYtJyjmW+QUOnmBsKGwT0PWJcOd3bKtVPgPd7WGeHGVtTBOqU/svExaO+gIv8 # uX1gOelEgLmLenUjc/Wp4cHgnePTBK8vG1g3IrEtcCblhwpr0e3/aJgHGgO3cQzH # X9P2buwHyLzjsie9S1ebG9Ceg/VsGQpxNGISZdG+Z4c3+GYu5gcGQcqIAuFmwBnE # QHSNHJXITyWjo7UuqL7e1J7vROUKn0S15V9MO/yOmZgkqubu4Gt3jGcJtIGqIBlu # MFra7SiVjKBnt6PD3aKEdD9uahbqFUfmX9411ZmYUUzpfflKnCQ= # =IY/i # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Feb 2023 08:09:05 GMT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1 * tag 'pull-aspeed-20230207' of https://github.com/legoater/qemu: (25 commits) aspeed/sdmc: Drop unnecessary scu include tests/avocado: Test Aspeed Zephyr SDK v00.01.08 on AST1030 board hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4F hw/arm/aspeed_ast10x0: Map HACE peripheral hw/arm/aspeed_ast10x0: Map the secure SRAM hw/arm/aspeed_ast10x0: Map I3C peripheral hw/arm/aspeed_ast10x0: Add various unimplemented peripherals hw/misc/aspeed_hace: Do not crash if address_space_map() failed hw/watchdog/wdt_aspeed: Log unimplemented registers as UNIMP level hw/watchdog/wdt_aspeed: Extend MMIO range to cover more registers hw/watchdog/wdt_aspeed: Rename MMIO region size as 'iosize' hw/nvram/eeprom_at24c: Make reset behavior more like hardware hw/arm/aspeed: Add aspeed_eeprom.c hw/nvram/eeprom_at24c: Add init_rom field and at24c_eeprom_init_rom helper hw/arm/aspeed: Replace aspeed_eeprom_init with at24c_eeprom_init hw/arm: Extract at24c_eeprom_init helper from Aspeed and Nuvoton boards hw/core/loader: Remove declarations of option_rom_has_mr/rom_file_has_mr tests/avocado/machine_aspeed.py: Mask systemd services to speed up SDK boot tests/avocado/machine_aspeed.py: update buildroot tests m25p80: Add the is25wp256 SFPD table ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-07Merge tag 'pull-riscv-to-apply-20230207' of ↵Peter Maydell
https://github.com/alistair23/qemu into staging Third RISC-V PR for QEMU 8.0 * Update disas for xnor/orn/andn and slli.uw * Update opentitan IRQs * Fix rom code when Zicsr is disabled * Update VS timer whenever htimedelta changes * A collection of fixes for virtulisation * Set tval for triggered watchpoints * Cleanups for board and FDT creation * Add support for the T-Head vendor extensions * A fix for virtual instr exception * Fix ctzw behavior * Fix SBI getchar handler for KVM # -----BEGIN PGP SIGNATURE----- # # iQEzBAABCAAdFiEE9sSsRtSTSGjTuM6PIeENKd+XcFQFAmPh+QQACgkQIeENKd+X # cFSdHwf9HQkO8/zTnWUFCbLVQAV3RB32i6E26uNC4+fQBpcqRWAel2PMYGi6x0H/ # fU43B5YpS7Ddfcc1ql6pJlisqsjkIsQBYjOeUfiMozLIR0dvX14jgUMxc0A8e8sZ # uv3iRXjkVz/7bEWIdflPcaXgXh74HcQCPgMDsteluZYaz4yRGP6SvI9UJHqe4tjI # HbiYmP1pcWFGDsAlKx7KbHfH/v9CE03odN3MLzwdsGYekUaFkdLlj7hmyamnqbAh # OR1y29i2od/8uJMeIu5R8rnGdWoWetCZWP0z2xv3rrZuUzMJ6VXHcdWsY9ycomJs # rYA0NB/ezmnKX+QAf+8TzW2nybG+5Q== # =XLpK # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Feb 2023 07:08:52 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * tag 'pull-riscv-to-apply-20230207' of https://github.com/alistair23/qemu: (32 commits) hw/riscv: virt: Simplify virt_{get,set}_aclint() target/riscv: fix SBI getchar handler for KVM target/riscv: fix ctzw behavior target/riscv: fix for virtual instr exception target/riscv: add a MAINTAINERS entry for XThead* extension support RISC-V: Adding XTheadFmv ISA extension RISC-V: Add initial support for T-Head C906 RISC-V: Set minimum priv version for Zfh to 1.11 RISC-V: Adding T-Head FMemIdx extension RISC-V: Adding T-Head MemIdx extension RISC-V: Adding T-Head MemPair extension RISC-V: Adding T-Head multiply-accumulate instructions RISC-V: Adding XTheadCondMov ISA extension RISC-V: Adding XTheadBs ISA extension RISC-V: Adding XTheadBb ISA extension RISC-V: Adding XTheadBa ISA extension RISC-V: Adding XTheadSync ISA extension RISC-V: Adding XTheadCmo ISA extension hw/riscv: change riscv_compute_fdt_addr() semantics hw/riscv: split fdt address calculation from fdt load ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-07Merge tag 'migration-20230206-pull-request' of ↵Peter Maydell
https://gitlab.com/juan.quintela/qemu into staging Migration Pull request In this try - rebase to latest upstream - same than previous patch - fix compilation on non linux (userfaultfd.h) (me) - query-migrationthreads (jiang) - fix race on reading MultiFDPages_t.block (zhenzhong) - fix flush of zero copy page send reuest (zhenzhong) Please apply. Previous try: It includes: - David Hildenbrand fixes for virtio-men - David Gilbert canary to detect problems - Fix for rdma return values (Fiona) - Peter Xu uffd_open fixes - Peter Xu show right downtime for postcopy - manish.mishra msg fix fixes - my vfio changes. Please apply. # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEEGJn/jt6/WMzuA0uC9IfvGFhy1yMFAmPhobYACgkQ9IfvGFhy # 1yMNaA/9EHDPqrI1HL/VkJG4nNOOsQR7RbburXEberZOzvLjnqpjUD3Ls9qV6rx+ # ieHa5T4imYJFk72Wa5vx4r1/dCjtJD2W6jg5+/0nTvYAHrs1U1VRqpuTr0HiXdbJ # ZLLCnW5eDyO3eMaOX0MUkgHgL0FNkc/Lq5ViCTFsMu9O9xMuDLLdAC3cdvslKuOu # X1gKByr9jT817Y9e36amYmRaJKC6Cr/PIekNVFu12HBW79pPusLX8KWEf4RBw4HR # sPwTvMCR/BwZ0+2Lppan60G5rt/ZxDu40oU7y+RHlfWqevl4hDM84/nhjMvEgzc5 # a4Ahe2ERGLwwnC8z3l7v9+pEzSGzDoPcnRGvZcpUpk68wTDtxd5Bdq8CwmNUfL07 # VzWcYpH0yvmwjBba9jfn9fAVgnG5rVp558XcYLIII3wEToty3UDtm43wSdj2CGr6 # cu+IPAp+n/I5G9SRYBTU9ozJz45ttnEe0hxUtZ4I3MuhzHi1VEDAqTWM/X0LyS41 # TB3Y5B2KKpJYbPyZEH4nyTeetR2k7alTFzahCgKqVfOgL0nJx54petjS1K+B1P72 # g6lhP9WnQ33W+M8S7J/aGEaDJd1lFyFB2Rdjn2ZZnASH/fR9j0mFmXWvulXtjFNp # Sfim3887+Iv4Uzw4VWEe3mM5Ypi/Ba2CmuTjy/pM08Ey8X1Qs5o= # =ZQbR # -----END PGP SIGNATURE----- # gpg: Signature made Tue 07 Feb 2023 00:56:22 GMT # gpg: using RSA key 1899FF8EDEBF58CCEE034B82F487EF185872D723 # gpg: Good signature from "Juan Quintela <quintela@redhat.com>" [full] # gpg: aka "Juan Quintela <quintela@trasno.org>" [full] # Primary key fingerprint: 1899 FF8E DEBF 58CC EE03 4B82 F487 EF18 5872 D723 * tag 'migration-20230206-pull-request' of https://gitlab.com/juan.quintela/qemu: (30 commits) migration: save/delete migration thread info migration: Introduce interface query-migrationthreads multifd: Fix flush of zero copy page send request multifd: Fix a race on reading MultiFDPages_t.block migration: check magic value for deciding the mapping of channels io: Add support for MSG_PEEK for socket channel migration/dirtyrate: Show sample pages only in page-sampling mode migration: Perform vmsd structure check during tests migration: Add canary to VMSTATE_END_OF_LIST migration/rdma: fix return value for qio_channel_rdma_{readv,writev} migration: Show downtime during postcopy phase virtio-mem: Proper support for preallocation with migration virtio-mem: Migrate immutable properties early virtio-mem: Fail if a memory backend with "prealloc=on" is specified migration/ram: Factor out check for advised postcopy migration/vmstate: Introduce VMSTATE_WITH_TMP_TEST() and VMSTATE_BITMAP_TEST() migration/savevm: Allow immutable device state to be migrated early (i.e., before RAM) migration/savevm: Prepare vmdesc json writer in qemu_savevm_state_setup() migration/savevm: Move more savevm handling into vmstate_save() migration/ram: Optimize ram_write_tracking_start() for RamDiscardManager ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-07Merge tag 'qemu-macppc-20230206' of https://github.com/mcayland/qemu into ↵Peter Maydell
staging qemu-macppc patches for 8.0 # -----BEGIN PGP SIGNATURE----- # # iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmPheL4eHG1hcmsuY2F2 # ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIflMUIAKeDljnot7I3cF3y # XnkPtPOUrzurii348hgQAULbDcnffkwstoML8vVpjt6tK9fZDduWB2bcXm00BFPr # tFXmW/IZaQ1Z9yEXEpFRUU1L68gGYyXCFEmBjE4fE2WoSRRQObkx7IGgFLBk7L3t # hyLx1kSBziSxgnkoX8ZQqMTweLjcllWA8s9+EtfpyTOu0mewKtbcAEyUwaJQTPPT # tfgMxjXdNquK89KXGelDiGHAKzMgCAnX2jVEkrw1PKKgLsf1FrQVDPJkWMhWv82x # FaCjyzL7YEn+h9Gd1j5JmhqYYKPF8akIs4bfrwcl9blyNRbb/NWF/odYgM1WIy8x # fQDJcwc= # =RB4n # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 Feb 2023 22:01:34 GMT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F * tag 'qemu-macppc-20230206' of https://github.com/mcayland/qemu: mac_oldworld: Allow specifying nvram backing store mac_nvram: Add block backend to persist NVRAM contents hw/misc/macio: Return bool from functions taking errp hw/misc/macio: Remove some single use local variables hw/misc/macio: Rename sysbus_dev to sbd for consistency and brevity hw/misc/macio: Avoid some QOM casts mac_{old,new}world: Use local variable instead of qdev_get_machine() input/adb: Only include header where needed Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2023-02-07aspeed/sdmc: Drop unnecessary scu includeJoel Stanley
The model includes aspeed_scu.h but doesn't appear to require it. Signed-off-by: Joel Stanley <joel@jms.id.au> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230124062022.298230-1-joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-02-07tests/avocado: Test Aspeed Zephyr SDK v00.01.08 on AST1030 boardPhilippe Mathieu-Daudé
Add a very quick test that runs some commands in a Zephyr shell: $ tests/venv/bin/avocado --show=app,console run -t os:zephyr tests/avocado (2/2) tests/avocado/machine_aspeed.py:AST1030Machine.test_ast1030_zephyros_1_07: console: *** Booting Zephyr OS build v00.01.07 *** console: ast1030_evb demo console: SOC: AST1030-A1 console: uart:~$ kernel stacks console: 0x36910 wdt_background (real size 1024): unused 988 usage 36 / 1024 (3 %) console: 0x36ad8 shell_uart (real size 4096): unused 3084 usage 1012 / 4096 (24 %) console: 0x2edb8 ADC0 (real size 400): unused 260 usage 140 / 400 (35 %) console: 0x2f0f0 ADC1 (real size 400): unused 260 usage 140 / 400 (35 %) console: 0x3b098 sysworkq (real size 1024): unused 860 usage 164 / 1024 (16 %) console: 0x36cc0 usbdworkq (real size 1024): unused 860 usage 164 / 1024 (16 %) console: 0x36bd8 usbworkq (real size 1024): unused 860 usage 164 / 1024 (16 %) console: 0x36a10 logging (real size 768): unused 548 usage 220 / 768 (28 %) console: 0x36ef8 idle 00 (real size 320): unused 268 usage 52 / 320 (16 %) console: 0x47800 IRQ 00 (real size 2048): unused 1504 usage 544 / 2048 (26 %) console: uart:~$ otp info scu console: SCU BIT reg_protect Description console: ____________________________________________________________________ console: 0x500 0x0 0x0 Disable ARM CM4 CPU boot (TXD5) console: 0x500 0x1 0x0 /Reserved console: 0x500 0x2 0x0 \ " console: 0x500 0x3 0x0 Address offset of single chip ABR mode console: 0x500 0x4 0x0 /Reserved console: 0x500 0x5 0x0 | " console: 0x500 0x6 0x0 | " console: 0x500 0x7 0x0 | " console: 0x500 0x8 0x0 | " console: 0x500 0x9 0x0 | " console: 0x500 0xA 0x0 | " console: 0x500 0xB 0x0 | " console: 0x500 0xC 0x0 | " console: 0x500 0xD 0x0 | " console: 0x500 0xE 0x0 | " console: 0x500 0xF 0x0 | " console: 0x500 0x10 0x0 \ " console: 0x500 0x11 0x0 Disabl3 ARM JTAG debug console: 0x500 0x12 0x0 /Reserved console: 0x500 0x13 0x0 | " console: 0x500 0x14 0x0 | " console: 0x500 0x15 0x0 | " console: 0x500 0x16 0x0 | " console: 0x500 0x17 0x0 | " console: 0x500 0x18 0x0 | " console: 0x500 0x19 0x0 | " console: 0x500 0x1A 0x0 | " console: 0x500 0x1B 0x0 | " console: 0x500 0x1C 0x0 | " console: 0x500 0x1D 0x0 | " console: 0x500 0x1E 0x0 | " console: 0x500 0x1F 0x0 \ " console: 0x510 0x0 0x0 /Reserved console: 0x510 0x1 0x0 | " console: 0x510 0x2 0x0 | " console: 0x510 0x3 0x0 \ " console: 0x510 0x4 0x0 Disable debug interfaces console: 0x510 0x5 0x0 /Reserved console: 0x510 0x6 0x0 | " console: 0x510 0x7 0x0 \ " console: 0x510 0x8 0x0 Enable boot from Uart5 by Pin Strap console: 0x510 0x9 0x0 /Reserved console: 0x510 0xA 0x0 \ " console: 0x510 0xB 0x0 Enable boot SPI ABR console: 0x510 0xC 0x0 Boot SPI ABR Mode console: 0x510 0xD 0x0 /Boot SPI flash size console: 0x510 0xE 0x0 | " console: 0x510 0xF 0x0 \ " console: 0x510 0x10 0x0 /Reserved console: 0x510 0x11 0x0 | " console: 0x510 0x12 0x0 | " console: 0x510 0x13 0x0 | " console: 0x510 0x14 0x0 | " console: 0x510 0x15 0x0 \ " console: 0x510 0x16 0x0 Enable boot SPI auxiliary control pins console: 0x510 0x19 0x0 /Reserved console: 0x510 0x1A 0x0 | " console: 0x510 0x1B 0x0 | " console: 0x510 0x1C 0x0 | " console: 0x510 0x1D 0x0 | " console: 0x510 0x1E 0x0 | " console: 0x510 0x1F 0x0 \ " console: 0x510 0x1E 0x0 Enable dedicate GPIO strap pins console: 0x510 0x1F 0x0 Enable Secure Boot by Pin Strap console: uart:~$ hwinfo devid console: Length: 8 console: ID: 0x0000018000000180 console: uart:~$ crypto aes256_cbc_vault console: aes256_cbc vault key 1 console: Was waiting for: console: 6b c1 be e2 2e 40 9f 96 e9 3d 7e 11 73 93 17 2a console: ae 2d 8a 57 1e 03 ac 9c 9e b7 6f ac 45 af 8e 51 console: 30 c8 1c 46 a3 5c e4 11 e5 fb c1 19 1a 0a 52 ef console: f6 9f 24 45 df 4f 9b 17 ad 2b 41 7b e6 6c 37 10 console: But got: console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 console: uart:~$ random get console: 0x862460d console: uart:~$ i2c scan I2C_0 console: 0 1 2 3 4 5 6 7 8 9 a b c d e f console: 00: -- -- -- -- -- -- -- -- -- -- -- -- console: 10: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 20: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 30: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 40: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 50: 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 60: -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- console: 70: -- -- -- -- -- -- -- -- console: 1 devices found on I2C_0 console: uart:~$ kernel uptime console: Uptime: 9897 ms console: uart:~$ kernel reboot warm console: *** Booting Zephyr OS build v00.01.07 *** PASS (1.08 s) Ref: https://github.com/AspeedTech-BMC/zephyr/releases/download/v00.01.07/Aspeed_Zephy_SDK_User_Guide_v00.01.07.pdf Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-02-07hw/arm/aspeed_ast10x0: Add TODO comment to use Cortex-M4FPhilippe Mathieu-Daudé
This SoC uses a Cortex-M4F. QEMU only implements a M4, which is good enough. Add a TODO note in case the M4F is added. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Delevoryas <peter@pjd.dev> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>
2023-02-07hw/arm/aspeed_ast10x0: Map HACE peripheralPhilippe Mathieu-Daudé
Since I don't have access to the datasheet, the relevant values were found in: https://github.com/AspeedTech-BMC/zephyr/blob/v00.01.08/dts/arm/aspeed/ast10x0.dtsi Before on Zephyr: uart:~$ hash test sha256_test tv[0]:hash_final error sha384_test tv[0]:hash_final error sha512_test tv[0]:hash_final error [00:00:06.278,000] <err> hace_global: HACE poll timeout [00:00:09.324,000] <err> hace_global: HACE poll timeout [00:00:12.261,000] <err> hace_global: HACE poll timeout uart:~$ crypto aes256_cbc_vault aes256_cbc vault key 1 [00:00:06.699,000] <inf> hace_global: aspeed_crypto_session_setup [00:00:06.699,000] <inf> hace_global: data->cmd: 1c2098 [00:00:06.699,000] <inf> hace_global: crypto_data_src: 93340 [00:00:06.699,000] <inf> hace_global: crypto_data_dst: 93348 [00:00:06.699,000] <inf> hace_global: crypto_ctx_base: 93300 [00:00:06.699,000] <inf> hace_global: crypto_data_len: 80000040 [00:00:06.699,000] <inf> hace_global: crypto_cmd_reg: 11c2098 [00:00:09.743,000] <inf> hace_global: HACE_STS: 0 [00:00:09.743,000] <err> hace_global: HACE poll timeout [00:00:09.743,000] <err> crypto: CBC mode ENCRYPT - Failed [00:00:09.743,000] <inf> hace_global: aspeed_crypto_session_free uart:~$ After: uart:~$ hash test sha256_test tv[0]:PASS tv[1]:PASS tv[2]:PASS tv[3]:PASS tv[4]:PASS sha384_test tv[0]:PASS tv[1]:PASS tv[2]:PASS tv[3]:PASS tv[4]:PASS tv[5]:PASS sha512_test tv[0]:PASS tv[1]:PASS tv[2]:PASS tv[3]:PASS tv[4]:PASS tv[5]:PASS uart:~$ crypto aes256_cbc_vault aes256_cbc vault key 1 Was waiting for: 6b c1 be e2 2e 40 9f 96 e9 3d 7e 11 73 93 17 2a ae 2d 8a 57 1e 03 ac 9c 9e b7 6f ac 45 af 8e 51 30 c8 1c 46 a3 5c e4 11 e5 fb c1 19 1a 0a 52 ef f6 9f 24 45 df 4f 9b 17 ad 2b 41 7b e6 6c 37 10 But got: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 [00:00:05.771,000] <inf> hace_global: aspeed_crypto_session_setup [00:00:05.772,000] <inf> hace_global: data->cmd: 1c2098 [00:00:05.772,000] <inf> hace_global: crypto_data_src: 93340 [00:00:05.772,000] <inf> hace_global: crypto_data_dst: 93348 [00:00:05.772,000] <inf> hace_global: crypto_ctx_base: 93300 [00:00:05.772,000] <inf> hace_global: crypto_data_len: 80000040 [00:00:05.772,000] <inf> hace_global: crypto_cmd_reg: 11c2098 [00:00:05.772,000] <inf> hace_global: HACE_STS: 1000 [00:00:05.772,000] <inf> crypto: Output length (encryption): 80 [00:00:05.772,000] <inf> hace_global: aspeed_crypto_session_free [00:00:05.772,000] <inf> hace_global: aspeed_crypto_session_setup [00:00:05.772,000] <inf> hace_global: data->cmd: 1c2018 [00:00:05.772,000] <inf> hace_global: crypto_data_src: 93340 [00:00:05.772,000] <inf> hace_global: crypto_data_dst: 93348 [00:00:05.772,000] <inf> hace_global: crypto_ctx_base: 93300 [00:00:05.772,000] <inf> hace_global: crypto_data_len: 80000040 [00:00:05.772,000] <inf> hace_global: crypto_cmd_reg: 11c2018 [00:00:05.772,000] <inf> hace_global: HACE_STS: 1000 [00:00:05.772,000] <inf> crypto: Output length (decryption): 64 [00:00:05.772,000] <err> crypto: CBC mode DECRYPT - Mismatch between plaintext and decrypted cipher text [00:00:05.774,000] <inf> hace_global: aspeed_crypto_session_free uart:~$ Reviewed-by: Peter Delevoryas <peter@pjd.dev> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Cédric Le Goater <clg@kaod.org>