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2020-09-03meson: fix keymaps without qemu-keymapGerd Hoffmann
In case the qemu-keymap tool generating them is neither installed on the system nor built from sources (due to xkbcommon not being available) qemu will not find the keymaps when started directly from the build tree, This happens because commit ddcf607fa3d6 ("meson: drop keymaps symlink") removed the symlink to the source tree, and the special handling for install doesn't help in case we do not install qemu. Lets fix that by simply copying over the file from the source tree as fallback. Reported-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20200827102617.14448-1-kraxel@redhat.com> [thuth: Rebased, changed "config_host['qemu_datadir']" to "qemu_datadir", added Gerd's UNLINK fix to configure script] Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-03cirrus.yml: Split FreeBSD job into two partsThomas Huth
The FreeBSD jobs currently hit the 1h time limit in the Cirrus-CI. We have to split the build targets here to make sure that the job finishes in time again. According to the Cirrus-CI docs and some tests that I did, it also seems like the total amount of CPUs that can be used for FreeBSD jobs is limited to 8, so each job now only gets 4 CPUs. That increases the compilation time of each job a little bit, but it still seems to be better to run two jobs with 4 CPUs each in parallel than to run two jobs with 8 CPUs sequentially. Message-Id: <20200831154405.229706-1-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-03cirrus.yml: Update the macOS jobs to CatalinaThomas Huth
When looking at the CI jobs on cirrus-ci.com, it seems like the mojave-based images have been decomissioned a while ago already, since apparently all our jobs get automatically upgraded to catalina. So let's update our YML script accordingly to avoid confusion. Reviewed-by: Ed Maste <emaste@freebsd.org> Message-Id: <20200728074405.13118-5-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-03cirrus.yml: Compile macOS with -WerrorThomas Huth
Compiler warnings currently go unnoticed in our macOS builds, since -Werror is only enabled for Linux and MinGW builds by default. So let's enable them here now, too. Unfortunately, the sasl header is marked as deprecated in the macOS headers and thus generates a lot of deprecation warnings. Thus we have to also use -Wno-error=deprecated-declarations to be able to compile the code here. Message-Id: <20200728074405.13118-4-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-03cirrus.yml: Compile FreeBSD with -WerrorThomas Huth
Compiler warnings currently go unnoticed in our FreeBSD builds, since -Werror is only enabled for Linux and MinGW builds by default. So let's enable them here now, too. Reviewed-by: Ed Maste <emaste@freebsd.org> Message-Id: <20200728074405.13118-3-thuth@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-03configure: Fix atomic64 test for --enable-werror on macOSThomas Huth
When using --enable-werror for the macOS builders in the Cirrus-CI, the atomic64 test is currently failing, and config.log shows a bunch of error messages like this: config-temp/qemu-conf.c:6:7: error: implicit declaration of function '__atomic_load_8' is invalid in C99 [-Werror,-Wimplicit-function-declaration] y = __atomic_load_8(&x, 0); ^ config-temp/qemu-conf.c:6:7: error: this function declaration is not a prototype [-Werror,-Wstrict-prototypes] Seems like these __atomic_*_8 functions are available in one of the libraries there, so that the test links and passes there when not using --enable-werror. But there does not seem to be a valid prototype for them in any of the header files, so that the test fails when using --enable-werror. Fix it by using the "official" built-in functions instead (see e.g. https://gcc.gnu.org/onlinedocs/gcc/_005f_005fatomic-Builtins.html). We are not using the *_8 variants in QEMU anyway. Suggested-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Christian Schoenebeck <qemu_oss@crudebyte.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20200728074405.13118-2-thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2020-09-02Merge remote-tracking branch ↵Peter Maydell
'remotes/ehabkost/tags/machine-next-pull-request' into staging x86 and machine queue, 2020-09-02 Bug fixes: * Revert EPYC topology patches that caused regressions (Babu Moger) * Memory leak fixes (Pan Nengyuan) QOM Cleanups: * Fix typo in AARCH64_CPU_GET_CLASS * Rename QOM macros for consistency and/or to avoid conflicts with other symbols * Move typedefs to header files * Correct instance/class sizes # gpg: Signature made Wed 02 Sep 2020 12:49:57 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6 * remotes/ehabkost/tags/machine-next-pull-request: target/i386/sev: Plug memleak in sev_read_file_base64 target/i386/cpu: Fix memleak in x86_cpu_class_check_missing_features virtio: add Virtio*BusClass sizes Revert "hw/i386: Update structures to save the number of nodes per package" Revert "hw/386: Add EPYC mode topology decoding functions" Revert "target/i386: Cleanup and use the EPYC mode topology functions" Revert "hw/i386: Introduce apicid functions inside X86MachineState" Revert "i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinition" Revert "hw/i386: Move arch_id decode inside x86_cpus_init" Revert "target/i386: Enable new apic id encoding for EPYC based cpus models" Revert "i386: Fix pkg_id offset for EPYC cpu models" tls-cipher-suites: Correct instance_size hda-audio: Set instance_size at base class rx: Move typedef RXCPU to cpu-qom.h rx: Rename QOM type check macros arm: Fix typo in AARCH64_CPU_GET_CLASS definition rdma: Rename INTERFACE_RDMA_PROVIDER_CLASS macro x86-iommu: Rename QOM type macros mos6522: Rename QOM macros imx_ccm: Rename IMX_GET_CLASS macro Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-02Merge remote-tracking branch 'remotes/rth/tags/pull-mb-20200901' into stagingPeter Maydell
Convert microblaze to generic translator loop Convert microblaze to decodetree Fix mb_cpu_transaction_failed Other misc cleanups # gpg: Signature made Tue 01 Sep 2020 16:17:19 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-mb-20200901: (76 commits) target/microblaze: Reduce linux-user address space to 32-bit target/microblaze: Add flags markup to some helpers target/microblaze: Remove cpu_R[0] target/microblaze: Remove last of old decoder target/microblaze: Convert dec_stream to decodetree target/microblaze: Convert dec_msr to decodetree target/microblaze: Convert msrclr, msrset to decodetree target/microblaze: Tidy do_rti, do_rtb, do_rte target/microblaze: Convert dec_rts to decodetree target/microblaze: Convert dec_bcc to decodetree target/microblaze: Convert dec_br to decodetree target/microblaze: Reorganize branching target/microblaze: Convert mbar to decodetree target/microblaze: Convert brk and brki to decodetree target/microblaze: Tidy mb_cpu_dump_state target/microblaze: Replace delayed_branch with tb_flags_to_set target/microblaze: Replace clear_imm with tb_flags_to_set target/microblaze: Use cc->do_unaligned_access tcg: Add tcg_get_insn_start_param target/microblaze: Store "current" iflags in insn_start ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-02target/i386/sev: Plug memleak in sev_read_file_base64Pan Nengyuan
Missing g_error_free() in sev_read_file_base64() error path. Fix that. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Message-Id: <20200831134315.1221-5-pannengyuan@huawei.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02target/i386/cpu: Fix memleak in x86_cpu_class_check_missing_featuresPan Nengyuan
'err' forgot to free in x86_cpu_class_check_missing_features error path. Fix that. Reported-by: Euler Robot <euler.robot@huawei.com> Signed-off-by: Pan Nengyuan <pannengyuan@huawei.com> Reviewed-by: Li Qiang <liq3ea@gmail.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20200831134315.1221-7-pannengyuan@huawei.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02virtio: add Virtio*BusClass sizesCornelia Huck
Both VirtioPCIBusClass and VirtioCcwBusClass are typedefs of VirtioBusClass, but set .class_size in the TypeInfo anyway to be safe if that changes in the future. Reported-by: Eduardo Habkost <ehabkost@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Halil Pasic <pasic@linux.ibm.com> Message-Id: <20200824122051.99432-1-cohuck@redhat.com>
2020-09-02Revert "hw/i386: Update structures to save the number of nodes per package"Babu Moger
This reverts commit c24a41bb53c0854d22c96b30d57cfcaa543c409d. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889937478.21294.4192291354416942986.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "hw/386: Add EPYC mode topology decoding functions"Babu Moger
This reverts commit 7568b205555a6405042f62c64af3268f4330aed5. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889936871.21294.1454526726636639780.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "target/i386: Cleanup and use the EPYC mode topology functions"Babu Moger
This reverts commit dd08ef0318e2b61d14bc069590d174913f7f437a. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889936257.21294.1786224705357428082.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "hw/i386: Introduce apicid functions inside X86MachineState"Babu Moger
This reverts commit 6121c7fbfd98dbc3af1b00b56ff2eef66df87828. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889935648.21294.8095493980805969544.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "i386: Introduce use_epyc_apic_id_encoding in X86CPUDefinition"Babu Moger
This reverts commit 0c1538cb1a26287c072645f4759b9872b1596d79. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889935015.21294.1425332462852607813.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "hw/i386: Move arch_id decode inside x86_cpus_init"Babu Moger
This reverts commit 2e26f4ab3bf8390a2677d3afd9b1a04f015d7721. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889934379.21294.15323080164340490855.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "target/i386: Enable new apic id encoding for EPYC based cpus models"Babu Moger
This reverts commit 247b18c593ec298446645af8d5d28911daf653b1. Remove the EPYC specific apicid decoding and use the generic default decoding. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889933756.21294.13999336052652073520.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02Revert "i386: Fix pkg_id offset for EPYC cpu models"Babu Moger
This reverts commit 7b225762c8c05fd31d4c2be116aedfbc00383f8b. Remove the EPYC specific apicid decoding and use the generic default decoding. Also fix all the references of pkg_offset. Signed-off-by: Babu Moger <babu.moger@amd.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <159889933119.21294.8112825730577505757.stgit@naples-babu.amd.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02tls-cipher-suites: Correct instance_sizeEduardo Habkost
We do have a QCryptoTLSCipherSuites struct. It must be used when setting instance_size of the QOM type. Luckily this never caused problems because the QCryptoTLSCipherSuites struct has only a parent_obj field and nothing else. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Message-Id: <20200826171005.4055015-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02hda-audio: Set instance_size at base classEduardo Habkost
Setting instance_size correctly at the base class will help us avoid mistakes when declaring new subclasses. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Gerd Hoffmann <kraxel@redhat.com> Message-Id: <20200826171005.4055015-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02rx: Move typedef RXCPU to cpu-qom.hEduardo Habkost
Move the typedef closer to the QOM type checking macros. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-54-ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02rx: Rename QOM type check macrosEduardo Habkost
Currently we have a RXCPU typedef and a RXCPU type checking macro, but OBJECT_DECLARE* would transform the RXCPU macro into a function, and the function name would conflict with the typedef name. Rename the RXCPU* QOM type check macros to RX_CPU*, so we will avoid the conflict and make the macro names consistent with the TYPE_RX_CPU constant name. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-53-ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02arm: Fix typo in AARCH64_CPU_GET_CLASS definitionEduardo Habkost
There's a typo in the type name of AARCH64_CPU_GET_CLASS. This was never detected because the macro is not used by any code. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-52-ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02rdma: Rename INTERFACE_RDMA_PROVIDER_CLASS macroEduardo Habkost
Rename the macro to be consistent with RDMA_PROVIDER and RDMA_PROVIDER_GET_CLASS. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-48-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02x86-iommu: Rename QOM type macrosEduardo Habkost
Some QOM macros were using a X86_IOMMU_DEVICE prefix, and others were using a X86_IOMMU prefix. Rename all of them to use the same X86_IOMMU_DEVICE prefix. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-47-ehabkost@redhat.com> Acked-by: Peter Xu <peterx@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02mos6522: Rename QOM macrosEduardo Habkost
Rename the MOS6522_DEVICE_CLASS and MOS6522_DEVICE_GET_CLASS macros to be consistent with the TYPE_MOS6522 and MOS6522 macros. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-46-ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-02imx_ccm: Rename IMX_GET_CLASS macroEduardo Habkost
Rename it to IMX_CCM_GET_CLASS to be consistent with the existing IMX_CCM and IXM_CCM_CLASS macro. This will make future conversion to OBJECT_DECLARE* easier. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20200825192110.3528606-45-ehabkost@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2020-09-01Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into ↵Peter Maydell
staging meson fixes: * bump submodule to 0.55.1 * SDL, pixman and zlib fixes * firmwarepath fix * fix firmware builds meson related: * move install to Meson * move NSIS to Meson * do not make meson use cmake * add description to options # gpg: Signature made Tue 01 Sep 2020 17:11:03 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini-gitlab/tags/for-upstream: (26 commits) Makefile: Fix in-tree clean/distclean Makefile: Add back TAGS/ctags/cscope rules meson: add description to options build: fix recurse-all target meson: use pkg-config method to find dependencies configure: do not include ${prefix} in firmwarepath meson: add pixman dependency to UI modules meson: add pixman dependency to chardev/baum module meson: add NSIS building meson: use meson mandir instead of qemu_mandir meson: pass docdir option meson: use meson datadir instead of qemu_datadir meson: pass qemu_suffix option configure: build docdir like other suffixed directories configure: always /-seperate directory from qemu_suffix configure: rename confsuffix option meson: move zlib detection to meson build-sys: remove install target from Makefile meson: install $localstatedir/run for qga meson: install desktop file ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-01Makefile: Fix in-tree clean/distcleanGreg Kurz
Doing 'make clean' or 'make distclean' in a freshly cloned tree results in: make: *** No rule to make target 'ninja-clean', needed by 'clean'. Stop. Make the fallback rules global. While here, change the ninjatool recipe to always have a zero exit status and thus prevent make to emit a warning. Fixes: a56650518f5b ("configure: integrate Meson in the build system") Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <159897001659.442705.15538955005543395950.stgit@bahia.lan> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01Makefile: Add back TAGS/ctags/cscope rulesGreg Kurz
It is a bit of a pain to be forced to run configure before being able to use cscope and friends. Add back the rules to build them in-tree as before commit a56650518f5b. Fixes: a56650518f5b ("configure: integrate Meson in the build system") Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <159897001005.442705.16516671603870288336.stgit@bahia.lan> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-09-01Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20200901' into staging target-arm queue: * Implement fp16 support for AArch32 VFP and Neon * hw/arm/sbsa-ref: add "reg" property to DT cpu nodes * hw/arm/sbsa-ref : Add embedded controller in secure memory # gpg: Signature made Tue 01 Sep 2020 16:17:23 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200901: (47 commits) hw/arm/sbsa-ref : Add embedded controller in secure memory hw/misc/sbsa_ec : Add an embedded controller for sbsa-ref hw/arm/sbsa-ref: add "reg" property to DT cpu nodes target/arm: Enable FP16 in '-cpu max' target/arm: Implement fp16 for Neon VMUL, VMLA, VMLS target/arm/vec_helper: Add gvec fp indexed multiply-and-add operations target/arm/vec_helper: Handle oprsz less than 16 bytes in indexed operations target/arm: Implement fp16 for Neon VRINTX target/arm: Implement fp16 for Neon VRINT-with-specified-rounding-mode target/arm: Implement fp16 for Neon VCVT with rounding modes target/arm: Implement fp16 for Neon VCVT fixed-point target/arm: Convert Neon VCVT fixed-point to gvec target/arm: Implement fp16 for Neon float-integer VCVT target/arm: Implement fp16 for Neon pairwise fp ops target/arm: Implement fp16 for Neon VRSQRTS target/arm: Implement fp16 for Neon VRECPS target/arm: Implement fp16 for Neon fp compare-vs-0 target/arm: Implement fp16 for Neon VFMA, VMFS target/arm: Implement fp16 for Neon VMLA, VMLS operations target/arm: Implement fp16 for Neon VMAXNM, VMINNM ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-09-01target/microblaze: Reduce linux-user address space to 32-bitRichard Henderson
User-space programs cannot use the 64-bit lwea/swea instructions. We can improve code generation and runtime by restricting the user-only address space to 32-bit. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Add flags markup to some helpersRichard Henderson
The mmu_read, mmu_write, get, and put helpers do not touch the general registers, or any of the other variables managed by tcg. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Remove cpu_R[0]Richard Henderson
Do not initialize cpu_R[0], as this should be totally unused. The cpu_for_read and cpu_for_write functions use a local temp. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Remove last of old decoderRichard Henderson
All instructions have been convered. Issue sigill if decodetree does not match. Remove argument decode from DisasContext. Remove microblaze-decode.h. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert dec_stream to decodetreeRichard Henderson
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert dec_msr to decodetreeRichard Henderson
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert msrclr, msrset to decodetreeRichard Henderson
Split this out of dec_msr. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Tidy do_rti, do_rtb, do_rteRichard Henderson
Since cpu_msr is no longer a 64-bit quantity, we can simplify the arithmetic in these functions. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert dec_rts to decodetreeRichard Henderson
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert dec_bcc to decodetreeRichard Henderson
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert dec_br to decodetreeRichard Henderson
Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Reorganize branchingRichard Henderson
Remove the btaken variable, and simplify things by always computing the full branch destination into btarget. This avoids all need for sync_jmpstate(). Retain the direct branch behaviour by remembering the jump destination in jmp_dest, discarding btarget. In the normal case, where the branch delay slot cannot trap (e.g. arithmetic), tcg will remove the computation into btarget, leaving us with just the tcg direct branching at the end. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert mbar to decodetreeRichard Henderson
Split this out of the normal branch instructions, as it requires special handling. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Convert brk and brki to decodetreeRichard Henderson
Split these out of the normal branch instructions, as they require special handling. Perform the entire operation inline, instead of raising EXCP_BREAK to do the work in mb_cpu_do_interrupt. This fixes a bug in that brki rd, imm, for imm != 0x18 is not supposed to set MSR_BIP. This fixes a bug in that imm == 0 is the reset vector and 0x18 is the debug vector, and neither should raise a tcg exception in system mode. Introduce EXCP_SYSCALL for microblaze-linux-user. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Tidy mb_cpu_dump_stateRichard Henderson
Using lookup_symbol is quite slow; remove that. Decode the various bits of iflags; only show imm, btaken, btarget when they are relevant to iflags. Improve formatting. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Replace delayed_branch with tb_flags_to_setRichard Henderson
The multi-stage counter can be replaced by clearing D_FLAG, the or'ing in tb_flags_to_set. The jump then happens when D_FLAG is finally cleared. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Replace clear_imm with tb_flags_to_setRichard Henderson
This more general update variable will be able to handle delay slots as well. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2020-09-01target/microblaze: Use cc->do_unaligned_accessRichard Henderson
This fixes the problem in which unaligned stores succeeded, but then we raised the exception after modifying memory. Store the ESS for the unaligned data access in the iflags for the insn, so that it can be found during unwind. Tested-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>