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2017-07-17test-qdev-global-props: Test global property orderingEduardo Habkost
Test case to detect the bug fixed by commit "qdev: fix the order compat and global properties are applied". Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170711004303.3902-3-ehabkost@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Greg Kurz <groug@kaod.org> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-07-17qdev: fix the order compat and global properties are appliedGreg Kurz
The current code recursively applies global properties from child up to parent types. This can cause properties passed with the -global option to be silently overridden by internal compat properties. This is exactly what happened with virtio-*-pci drivers since commit: "9a4c0e220d8a hw/virtio-pci: fix virtio behaviour" Passing -device virtio-blk-pci.disable-modern=off had no effect on 2.6 machine types because the internal virtio-pci.disable-modern=on compat property always prevailed. A workaround for this was included with commit 0bcba41f ("machine: Convert abstract typename on compat_props to subclass names"). This patch fixes the issue properly by reversing the logic: we now go through the global property list and, for each property, we check if it is applicable to the device. This results in compat properties being applied first, in the order they appear in the HW_COMPAT_* macros, followed by global properties, in the order they appear on the command line. Signed-off-by: Greg Kurz <groug@kaod.org> Message-Id: <148103887228.22326.478406873609299999.stgit@bahia.lab.toulouse-stg.fr.ibm.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170711004303.3902-2-ehabkost@redhat.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Reviewed-by: Halil Pasic <pasic@linux.vnet.ibm.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-07-17tests: Test case for object_resolve_path*()Eduardo Habkost
Test for partial path lookup using object_resolve_path*(). Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170707213052.13087-2-ehabkost@redhat.com> Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
2017-07-17device-crash-test: Fix regexp on whitelistEduardo Habkost
The "||" in the whitelist entry was not escaped, making the regexp match all strings, on every single cases where QEMU aborted. Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <20170614144939.1115-1-ehabkost@redhat.com>
2017-07-17vfio-pci, ppc64/spapr: Reorder group-to-container attachingAlexey Kardashevskiy
At the moment VFIO PCI device initialization works as follows: vfio_realize vfio_get_group vfio_connect_container register memory listeners (1) update QEMU groups lists vfio_kvm_device_add_group Then (example for pseries) the machine reset hook triggers region_add() for all regions where listeners from (1) are listening: ppc_spapr_reset spapr_phb_reset spapr_tce_table_enable memory_region_add_subregion vfio_listener_region_add vfio_spapr_create_window This scheme works fine until we need to handle VFIO PCI device hotplug and we want to enable PPC64/sPAPR in-kernel TCE acceleration on, i.e. after PCI hotplug we need a place to call ioctl(vfio_kvm_device_fd, KVM_DEV_VFIO_GROUP_SET_SPAPR_TCE). Since the ioctl needs a LIOBN fd (from sPAPRTCETable) and a IOMMU group fd (from VFIOGroup), vfio_listener_region_add() seems to be the only place for this ioctl(). However this only works during boot time because the machine reset happens strictly after all devices are finalized. When hotplug happens, vfio_listener_region_add() is called when a memory listener is registered but when this happens: 1. new group is not added to the container->group_list yet; 2. VFIO KVM device is unaware of the new IOMMU group. This moves bits around to have all necessary VFIO infrastructure in place for both initial startup and hotplug cases. [aw: ie, register vfio groups with kvm prior to memory listener registration such that kvm-vfio pseudo device ioctls are available during the region_add callback] Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Alex Williamson <alex.williamson@redhat.com>
2017-07-17Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request' ↵Peter Maydell
into staging # gpg: Signature made Mon 17 Jul 2017 13:11:17 BST # gpg: using RSA key 0x9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/tracing-pull-request: trace: update old trace events in docs trace: [trivial] Statically enable all guest events trace: [tcg, trivial] Re-align generated code trace: [tcg] Do not generate TCG code to trace dynamically-disabled events exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state trace: [tcg] Delay changes to dynamic state when translating trace: Allocate cpu->trace_dstate in place Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17Merge remote-tracking branch 'remotes/kraxel/tags/usb-20170717-pull-request' ↵Peter Maydell
into staging ehci fix for 2.10 # gpg: Signature made Mon 17 Jul 2017 10:40:00 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/usb-20170717-pull-request: ehci: add sanity check for maxframes Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17Merge remote-tracking branch 'remotes/kraxel/tags/vga-20170717-pull-request' ↵Peter Maydell
into staging virtio-gpu migration fix for 2.10 # gpg: Signature made Mon 17 Jul 2017 10:41:49 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/vga-20170717-pull-request: virtio-gpu: skip update cursor in post_load if we don't have one Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17Merge remote-tracking branch 'remotes/kraxel/tags/ui-20170717-pull-request' ↵Peter Maydell
into staging ui: vnc and keymap updates for 2.10 # gpg: Signature made Mon 17 Jul 2017 10:38:11 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ui-20170717-pull-request: keymaps: fr-ca: add missing keys hmp: Update info vnc vnc: Set default kbd delay to 10ms Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17block: fix shadowed variable in bdrv_co_pdiscardDenis V. Lunev
We've had a shadowed 'ret' variable, which risks returning the wrong value, introduced in commit b9c64947. Signed-off-by: Denis V. Lunev <den@openvz.org> Reviewed-by: Fam Zheng <famz@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 20170710150559.30163-1-den@openvz.org CC: Stefan Hajnoczi <stefanha@redhat.com> CC: Kevin Wolf <kwolf@redhat.com> CC: Eric Blake <eblake@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-17util/aio-win32: Only select on what we are actually waiting forAlistair Francis
Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 9307b70e9876c4e9e3c4478524a32a23a3d5dd05.1499368180.git.alistair.francis@xilinx.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-17target/mips: optimize WSBH, DSBH and DSHDAurelien Jarno
Use the same mask to avoid having to load two different constants. Suggested-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2017-07-17mips: set CP0 Debug DExcCode for SDBBP instructionPavel Dovgalyuk
This patch fixes setting DExcCode field of CP0 Debug register when SDBBP instruction is executed. According to EJTAG specification, this field must be set to the value 9 (Bp). Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Message-id: 20170502120350.3368.92338.stgit@PASHA-ISP Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2017-07-17Merge remote-tracking branch ↵Peter Maydell
'remotes/kraxel/tags/audio-20170717-pull-request' into staging audio: fixes for 2.10 # gpg: Signature made Mon 17 Jul 2017 10:29:08 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/audio-20170717-pull-request: audio/adlib: remove limitation of one adlib card audio/fmopl: modify timer callback to give opaque and channel parameters in two arguments audio: st_rate_flow exist a infinite loop Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17Merge remote-tracking branch 'remotes/kraxel/tags/ipxe-pull-request' into ↵Peter Maydell
staging Pull request # gpg: Signature made Mon 17 Jul 2017 10:04:11 BST # gpg: using RSA key 0x4CB6D8EED3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" # Primary key fingerprint: A032 8CFF B93A 17A7 9901 FE7D 4CB6 D8EE D3E8 7138 * remotes/kraxel/tags/ipxe-pull-request: ipxe: update to commit 0600d3ae94 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17PPC: E500: Update u-boot to v2017.07Alexander Graf
Quite a while has passed since we last updated U-Boot for e500. This patch bumps it to the last released version 2017.07 to make sure users don't feel like they're using out of date software. Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: Thomas Huth <thuth@redhat.com> Message-id: 1499862868-102130-1-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17MAINTAINERS: Add entries for MPS2 boardPeter Maydell
Add entries to the MAINTAINERS file for the new MPS2 board and devices. Since the CMSDK devices are not specific to the MPS2 board, extend the existing 'PrimeCell' section to cover CMSDK devices as well; in both cases these are devices implemented by ARM and provided as RTL that may be used in multiple SoCs and boards. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-10-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-07-17hw/arm/mps2: Add ethernetPeter Maydell
The MPS2 FPGA images support ethernet via a LAN9220. We use QEMU's LAN9118 model, which is software compatible except that it is missing the checksum-offload feature. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-9-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
2017-07-17hw/arm/mps2: Add SCCPeter Maydell
Add the SCC to the MPS2 board models. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-8-git-send-email-peter.maydell@linaro.org
2017-07-17hw/misc/mps2_scc: Implement MPS2 Serial Communication ControllerPeter Maydell
Implement a model of the Serial Communication Controller (SCC) found in MPS2 FPGA images. The primary purpose of this device is to communicate with the Motherboard Configuration Controller (MCC) which is located on the MPS board itself, outside the FPGA image. This is used for programming the MPS clock generators. The SCC also has some basic ID registers and an output for the board LEDs. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-7-git-send-email-peter.maydell@linaro.org
2017-07-17hw/arm/mps2: Add timersPeter Maydell
Add the CMSDK APB timers to the MPS2 board. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-6-git-send-email-peter.maydell@linaro.org
2017-07-17hw/char/cmsdk-apb-timer: Implement CMSDK APB timer devicePeter Maydell
Implement a model of the simple timer device found in the CMSDK. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 1500029487-14822-5-git-send-email-peter.maydell@linaro.org
2017-07-17hw/arm/mps2: Add UARTsPeter Maydell
Add the UARTs to the MPS2 board models. Unfortunately the details of the wiring of the interrupts through various OR gates differ between AN511 and AN385 so this can't be purely a data-driven difference. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1500029487-14822-4-git-send-email-peter.maydell@linaro.org
2017-07-17hw/char/cmsdk-apb-uart.c: Implement CMSDK APB UARTPeter Maydell
Implement a model of the simple "APB UART" provided in the Cortex-M System Design Kit (CMSDK). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2017-07-17hw/arm/mps2: Implement skeleton mps2-an385 and mps2-an511 board modelsPeter Maydell
Model the ARM MPS2/MPS2+ FPGA based development board. The MPS2 and MPS2+ dev boards are FPGA based (the 2+ has a bigger FPGA but is otherwise the same as the 2). Since the CPU itself and most of the devices are in the FPGA, the details of the board as seen by the guest depend significantly on the FPGA image. We model the following FPGA images: "mps2_an385" -- Cortex-M3 as documented in ARM Application Note AN385 "mps2_an511" -- Cortex-M3 'DesignStart' as documented in AN511 They are fairly similar but differ in the details for some peripherals. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1500029487-14822-2-git-send-email-peter.maydell@linaro.org Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
2017-07-17target/arm: use DISAS_EXIT for eret handlingAlex Bennée
Previously DISAS_JUMP did ensure this but with the optimisation of 8a6b28c7 (optimize indirect branches) we might not leave the loop. This means if any pending interrupts are cleared by changing IRQ flags we might never get around to servicing them. You usually notice this by seeing the lookup_tb_ptr() helper gainfully chaining TBs together while cpu->interrupt_request remains high and the exit_request has not been set. This breaks amongst other things the OPTEE test suite which executes an eret from the secure world after a non-secure world IRQ has gone pending which then never gets serviced. Instead of using the previously implied semantics of DISAS_JUMP we use DISAS_EXIT which will always exit the run-loop. CC: Etienne Carriere <etienne.carriere@linaro.org> CC: Joakim Bech <joakim.bech@linaro.org> CC: Jaroslaw Pelczar <j.pelczar@samsung.com> CC: Peter Maydell <peter.maydell@linaro.org> CC: Emilio G. Cota <cota@braap.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 20170713141928.25419-7-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17target/arm: use gen_goto_tb for ISB handlingAlex Bennée
While an ISB will ensure any raised IRQs happen on the next instruction it doesn't cause any to get raised by itself. We can therefore use a simple tb exit for ISB instructions and rely on the exit_request check at the top of each TB to deal with exiting if needed. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 20170713141928.25419-6-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17target/arm/translate: ensure gen_goto_tb sets exit flagsAlex Bennée
As the gen_goto_tb function can do both static and dynamic jumps it should also set the is_jmp field. This matches the behaviour of the a64 code. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 20170713141928.25419-5-alex.bennee@linaro.org [tweak to multiline comment formatting] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17target/arm/translate.h: expand comment on DISAS_EXITAlex Bennée
We already have an exit condition, DISAS_UPDATE which will exit the run-loop. Expand on the difference with DISAS_EXIT in the comments. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 20170713141928.25419-4-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17target/arm/translate: make DISAS_UPDATE match declared semanticsAlex Bennée
DISAS_UPDATE should be used when the wider CPU state other than just the PC has been updated and we should therefore exit the TCG runtime and return to the main execution loop rather assuming DISAS_JUMP would do that. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 20170713141928.25419-3-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17include/exec/exec-all: document common exit conditionsAlex Bennée
As a precursor to later patches attempt to come up with a more concrete wording for what each of the common exit cases would be. CC: Emilio G. Cota <cota@braap.org> CC: Richard Henderson <rth@twiddle.net> CC: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <rth@twiddle.net> Message-id: 20170713141928.25419-2-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-17target/arm: Make Cortex-M3 and M4 default to 8 PMSA regionsPeter Maydell
The Cortex-M3 and M4 CPUs always have 8 PMSA MPU regions (this isn't a configurable option for the hardware). Make the default value of the pmsav7-dregion property be set per-cpu, so we don't need to have every user of these CPUs set it manually. (The existing default of 16 is correct for the other PMSAv7 core, the Cortex-R5.) This fixes a bug where we were creating the M3 and M4 with too many regions; most guest software would not notice or care, though, since it would just not use the registers associated with the unexpected extra regions. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 1499788408-10096-4-git-send-email-peter.maydell@linaro.org
2017-07-17qdev: support properties which don't set a default valuePeter Maydell
In some situations it's useful to have a qdev property which doesn't automatically set its default value when qdev_property_add_static is called (for instance when the default value is not constant). Support this by adding a flag to the Property struct indicating whether to set the default value. This replaces the existing test for whether the PropertyInfo set_default_value function pointer is NULL, and we set the .set_default field to true for all those cases of struct Property which use a PropertyInfo with a non-NULL set_default_value, so behaviour remains the same as before. This gives us the semantics of: * if .set_default is true, then .info->set_default_value must be not NULL, and .defval is used as the the default value of the property * otherwise, the property system does not set any default, and the field will retain whatever initial value it was given by the device's .instance_init method We define two new macros DEFINE_PROP_SIGNED_NODEFAULT and DEFINE_PROP_UNSIGNED_NODEFAULT, to cover the most plausible use cases of wanting to set an integer property with no default value. Suggested-by: Markus Armbruster <armbru@redhat.com> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Markus Armbruster <armbru@redhat.com> Message-id: 1499788408-10096-3-git-send-email-peter.maydell@linaro.org
2017-07-17qdev-properties.h: Explicitly set the default value for arraylen propertiesPeter Maydell
In DEFINE_PROP_ARRAY, because we use a PropertyInfo (qdev_prop_arraylen) which has a .set_default_value member we will set the field to a default value. That default value will be zero, by the C rule that struct initialization sets unmentioned members to zero if at least one member is initialized. However it's clearer to state it explicitly. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com> Message-id: 1499788408-10096-2-git-send-email-peter.maydell@linaro.org
2017-07-17virtio-net: fix offload ctrl endianJason Wang
Spec said offloads should be le64, so use virtio_ldq_p() to guarantee valid endian. Fixes: 644c98587d4c ("virtio-net: dynamic network offloads configuration") Cc: qemu-stable@nongnu.org Cc: Dmitry Fleytman <dfleytma@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17virtion-net: Prefer is_power_of_2()Michal Privoznik
We have a function that checks if given number is power of two. We should prefer it instead of expanding the check on our own. Signed-off-by: Michal Privoznik <mprivozn@redhat.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17docs/colo-proxy.txt: Update colo-proxy usage of net driver with vnet_headerZhang Chen
Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/filter-rewriter.c: Make filter-rewriter support vnet_hdr_lenZhang Chen
We add the vnet_hdr_support option for filter-rewriter, default is disabled. If you use virtio-net-pci or other driver needs vnet_hdr, please enable it. You can use it for example: -object filter-rewriter,id=rew0,netdev=hn0,queue=all,vnet_hdr_support We get the vnet_hdr_len from NetClientState that make us parse net packet correctly. Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/colo-compare.c: Add vnet packet's tcp/udp/icmp compareZhang Chen
COLO-Proxy just focus on packet payload, so we skip vnet header. Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/colo.c: Add vnet packet parse feature in colo-proxyZhang Chen
Make colo-compare and filter-rewriter can parse vnet packet. Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/colo-compare.c: Make colo-compare support vnet_hdr_lenZhang Chen
We add the vnet_hdr_support option for colo-compare, default is disabled. If you use virtio-net-pci or other driver needs vnet_hdr, please enable it. You can use it for example: -object colo-compare,id=comp0,primary_in=compare0-0,secondary_in=compare1,outdev=compare_out0,vnet_hdr_support COLO-compare can get vnet header length from filter, Add vnet_hdr_len to struct packet and output packet with the vnet_hdr_len. Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/colo-compare.c: Introduce parameter for compare_chr_send()Zhang Chen
This patch change the compare_chr_send() parameter from CharBackend to CompareState, we can get more information like vnet_hdr(We use it to support packet with vnet_header). Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/colo.c: Make vnet_hdr_len as packet propertyZhang Chen
We can use this property flush and send packet with vnet_hdr_len. Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/filter-mirror.c: Add new option to enable vnet support for filter-redirectorZhang Chen
We add the vnet_hdr_support option for filter-redirector, default is disabled. If you use virtio-net-pci net driver or other driver needs vnet_hdr, please enable it. Because colo-compare or other modules needs the vnet_hdr_len to parse packet, we add this new option send the len to others. You can use it for example: -object filter-redirector,id=r0,netdev=hn0,queue=tx,outdev=red0,vnet_hdr_support Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17net/filter-mirror.c: Make filter mirror support vnet support.Zhang Chen
We add the vnet_hdr_support option for filter-mirror, default is disabled. If you use virtio-net-pci or other driver needs vnet_hdr, please enable it. You can use it for example: -object filter-mirror,id=m0,netdev=hn0,queue=tx,outdev=mirror0,vnet_hdr_support If it has vnet_hdr_support flag, we will change the sending packet format from struct {int size; const uint8_t buf[];} to {int size; int vnet_hdr_len; const uint8_t buf[];}. make other module(like colo-compare) know how to parse net packet correctly. Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com> Signed-off-by: Jason Wang <jasowang@redhat.com>
2017-07-17trace: update old trace events in docsStefan Hajnoczi
Commit c5f1ad429cdf26023cf331075a7d327708e3db6d ("block: Remove bdrv_aio_readv/writev/flush()") removed bdrv_aio_readv()/bdrv_aio_writev() so the example in the tracing documentation is no longer valid. Reported-by: Wang Dong <dongdwdw@linux.vnet.ibm.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Reviewed-by: Eric Blake <eblake@redhat.com> Message-id: 20170714133111.27359-1-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-17trace: [trivial] Statically enable all guest eventsLluís Vilanova
The existing optimizations makes it feasible to have them available on all builds. Some quick'n'dirty numbers with 400.perlbench (SPECcpu2006) on the train input (medium size - suns.pl) and the guest_mem_before event: * vanilla, statically disabled real 0m2,259s user 0m2,252s sys 0m0,004s * vanilla, statically enabled (overhead: 2.18x) real 0m4,921s user 0m4,912s sys 0m0,008s * multi-tb, statically disabled (overhead: 0.99x) [within noise range] real 0m2,228s user 0m2,216s sys 0m0,008s * multi-tb, statically enabled (overhead: 0.99x) [within noise range] real 0m2,229s user 0m2,224s sys 0m0,004s Now enabling all events when booting an ARM system that immediately shuts down (https://lists.gnu.org/archive/html/qemu-devel/2017-06/msg04085.html): * vanilla, statically disabled real 0m32,153s user 0m31,276s sys 0m0,108s * vanilla, statically enabled (overhead: 1.35x) real 0m43,507s user 0m42,680s sys 0m0,168s * multi-tb, statically disabled (overhead: 1.03x) real 0m32,993s user 0m32,516s sys 0m0,104s * multi-tb, statically enabled (overhead: 1.00x) [within noise range] real 0m32,110s user 0m31,176s sys 0m0,156s And finally enabling all events using Emilio's dbt-bench (where orig == vanilla, new == multi-tb): NBench score; higher is better 180 +-+--------+----------+----------+---------+----------+----------+----------+----------+----------+---------+----------+--------+-+ | | | *** $$$$%% orig | 160 +-+....................................*.*.$..$.%............................................................orig-enabled +-+ | * * $ $ % new | 140 +-+....................................*.*.$..$.%............................................................new-disabled.......+-+ | * * $ $ % | | * * $ $ % | 120 +-+....................................*.*.$..$.%...............................................................................+-+ | * * $ $ % | | * * $ $ % | 100 +-+....................................*.*.$..$.%.....$$$%%%....................................................................+-+ | * * $ $ % *** $ $ % *** $$$%% | 80 +-+....................................*.*.$..$.%.*.*.$.$..%.*.*.$.$.%..........................................................+-+ | * * $ $ % * * $ $ % * * $ $ % | | * * $ $ % * * $ $ % * * $ $ % | 60 +-+.........................***..$$$%%.*.*##..$.%.*.*.$.$..%.*.*.$.$.%..***.$$$%%...............................................+-+ | **** $$$%% * * $ $ % * * # $ % * *## $ % * * $ $ % * * $ $ % | | * * $ $ % * * $ $ % * * # $ % * * # $ % * *## $ % * * $ $ % | 40 +-+..............*..*.$.$.%.*.*..$.$.%.*.*.#..$.%.*.*.#.$..%.*.*.#.$.%..*.*.$.$.%...............................................+-+ | * * $ $ % * * $ $ % * * # $ % * * # $ % * * # $ % * *## $ % *** $$$%%% | 20 +-+....***.$$$%%.*..*##.$.%.*.*###.$.%.*.*.#..$.%.*.*.#.$..%.*.*.#.$.%..*.*.#.$.%..................................*.*.$.$..%...+-+ | * *## $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * *## $ % | | * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % * * # $ % ***###$$%% ***##$$$%% * * # $ % | 0 +-+----***##$$%%-****##$$%%-***###$$%%-***##$$$%%-***##$$%%%-***##$$%%--***##$$%%-****##$$%%-***###$$%%-***##$$$%%-***##$$%%%---+-+ NUMERIC SORTSTRING SORT BITFIEFP EMULATION ASSIGNMENT IDEA HUFFMAN FOURIER NEURLU DECOMPOSITION gmean png: http://imgur.com/a/8XG5S Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-id: 149915849243.6295.4484103824675839071.stgit@frigg.lan Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-17trace: [tcg, trivial] Re-align generated codeLluís Vilanova
Last patch removed a nesting level in generated code. Re-align all code generated by backends to be 4-column aligned. Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-id: 149915824586.6295.17820926011082409033.stgit@frigg.lan Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-17trace: [tcg] Do not generate TCG code to trace dynamically-disabled eventsLluís Vilanova
If an event is dynamically disabled, the TCG code that calls the execution-time tracer is not generated. Removes the overheads of execution-time tracers for dynamically disabled events. As a bonus, also avoids checking the event state when the execution-time tracer is called from TCG-generated code (since otherwise TCG would simply not call it). Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-id: 149915799921.6295.13067154430923434035.stgit@frigg.lan Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2017-07-17exec: [tcg] Use different TBs according to the vCPU's dynamic tracing stateLluís Vilanova
Every vCPU now uses a separate set of TBs for each set of dynamic tracing event state values. Each set of TBs can be used by any number of vCPUs to maximize TB reuse when vCPUs have the same tracing state. This feature is later used by tracetool to optimize tracing of guest code events. The maximum number of TB sets is defined as 2^E, where E is the number of events that have the 'vcpu' property (their state is stored in CPUState->trace_dstate). For this to work, a change on the dynamic tracing state of a vCPU will force it to flush its virtual TB cache (which is only indexed by address), and fall back to the physical TB cache (which now contains the vCPU's dynamic tracing state as part of the hashing function). Signed-off-by: Lluís Vilanova <vilanova@ac.upc.edu> Reviewed-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Emilio G. Cota <cota@braap.org> Signed-off-by: Emilio G. Cota <cota@braap.org> Message-id: 149915775266.6295.10060144081246467690.stgit@frigg.lan Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
generated by cgit v1.2.3 (git 2.26.2) at 2025-03-16 10:58:37 +0000