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AgeCommit message (Expand)Author
2015-09-09i8257: remove cpu_request_exit irqPaolo Bonzini
2015-09-09i8257: rewrite DMA_schedule to avoid hooking into the CPU loopPaolo Bonzini
2015-09-07Added generic panic handler qemu_system_guest_panicked()Andrey Smetanin
2015-09-07block/iscsi: validate block size returned from targetPeter Lieven
2015-09-07iohandler: Use aio APIFam Zheng
2015-09-07cpus.c: qemu_mutex_lock_iothread fix race condition at cpu thread initAníbal Limón
2015-09-07seqlock: read sequence number atomicallyEmilio G. Cota
2015-09-07seqlock: add missing 'inline' to seqlock_read_retryEmilio G. Cota
2015-09-02qemu-thread: handle spurious futex_wait wakeupsEmilio G. Cota
2015-08-28s390: fix softmmu compilationLaurent Vivier
2015-08-28qemu-doc.texi: Fix capitalization error in OS X build instructionsPeter Maydell
2015-08-27From: John Arbuckle <programmingkidx@gmail.com>G 3
2015-08-27Merge remote-tracking branch 'remotes/weil/tags/pull-tci-20150826' into stagingPeter Maydell
2015-08-26exec-all: Translate TCI return addresses backwards tooPeter Crosthwaite
2015-08-26Merge remote-tracking branch 'remotes/kraxel/tags/pull-cve-2015-5225-20150826...Peter Maydell
2015-08-26vnc: fix memory corruption (CVE-2015-5225)Gerd Hoffmann
2015-08-25Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150825-...Peter Maydell
2015-08-25target-arm: Implement AArch64 TLBI operations on IPAsPeter Maydell
2015-08-25target-arm: Implement missing EL3 TLB invalidate operationsPeter Maydell
2015-08-25target-arm: Implement missing EL2 TLBI operationsPeter Maydell
2015-08-25target-arm: Restrict AArch64 TLB flushes to the MMU indexes they must touchPeter Maydell
2015-08-25target-arm: Move TLBI ALLE1/ALLE1IS definitions into numeric orderPeter Maydell
2015-08-25cputlb: Add functions for flushing TLB for a single MMU indexPeter Maydell
2015-08-25target-arm: Implement AArch32 ATS1H* operationsPeter Maydell
2015-08-25target-arm: Enable the AArch32 ATS12NSO opsPeter Maydell
2015-08-25target-arm: Add CP_ACCESS_TRAP_UNCATEGORIZED_EL2, 3Peter Maydell
2015-08-25target-arm: Wire up AArch64 EL2 and EL3 address translation opsPeter Maydell
2015-08-25target-arm: there is no TTBR1 for 32-bit EL2 stage 1 translationsPeter Maydell
2015-08-25target-arm: Implement missing ACTLR registersPeter Maydell
2015-08-25target-arm: Implement missing AFSR registersPeter Maydell
2015-08-25target-arm: Implement missing AMAIR registersPeter Maydell
2015-08-25target-arm: Add missing MAIR_EL3 and TPIDR_EL3 registersPeter Maydell
2015-08-25MAINTAINERS: Add ZynqMP to MAINTAINERS fileAlistair Francis
2015-08-25MAINTAINERS: Update Xilinx MaintainershipAlistair Francis
2015-08-25xlnx-zynqmp: Connect the four OCM banksAlistair Francis
2015-08-25Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150824' into stagingPeter Maydell
2015-08-24linux-user: remove useless macros GUEST_BASE and RESERVED_VALaurent Vivier
2015-08-24linux-user: remove --enable-guest-base/--disable-guest-baseLaurent Vivier
2015-08-24tcg/aarch64: Use softmmu fast path for unaligned accessesRichard Henderson
2015-08-24tcg/s390: Use softmmu fast path for unaligned accessesRichard Henderson
2015-08-24tcg/ppc: Improve unaligned load/store handling on 64-bit backendBenjamin Herrenschmidt
2015-08-24tcg/i386: use softmmu fast path for unaligned accessesAurelien Jarno
2015-08-24tcg: Remove tcg_gen_trunc_i64_i32Richard Henderson
2015-08-24tcg: Split trunc_shr_i32 opcode into extr[lh]_i64_i32Richard Henderson
2015-08-24tcg: update README about size changing opsAurelien Jarno
2015-08-24tcg/optimize: add optimizations for ext_i32_i64 and extu_i32_i64 opsAurelien Jarno
2015-08-24tcg: implement real ext_i32_i64 and extu_i32_i64 opsAurelien Jarno
2015-08-24tcg: don't abuse TCG type in tcg_gen_trunc_shr_i64_i32Aurelien Jarno
2015-08-24tcg: rename trunc_shr_i32 into trunc_shr_i64_i32Aurelien Jarno
2015-08-24tcg/optimize: allow constant to have copiesAurelien Jarno
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