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2012-10-09tcg-sparc: Support GUEST_BASE.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-sparc: Fix qemu_ld/st to handle 32-bit host.Richard Henderson
At the same time, split out the tlb load logic to a new function. Fixes the cases of two data registers and two address registers. Fixes the signature of, and adds missing, qemu_ld/st opcodes. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-sparc: Assume v9 cpu always, i.e. force v8plus in 32-bit mode.Richard Henderson
Current code doesn't actually work in 32-bit mode at all. Since no one really noticed, drop the complication of v7 and v8 cpus. Eliminate the --sparc_cpu configure option and standardize macro testing on TCG_TARGET_REG_BITS / HOST_LONG_BITS Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-sparc: Don't MAP_FIXED on top of the programRichard Henderson
The address we pick in sparc64.ld is also 0x60000000, so doing a fixed map on top of that is guaranteed to blow up. Choosing 0x40000000 is exactly right for the max of code_gen_buffer_size set below. No need to ever use MAP_FIXED. While getting our desired address helps optimize the generated code, we won't fail if we don't get it. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-sparc: Fix ADDX opcode.Richard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-sparc: Hack in qemu_ld/st64 for 32-bit.Richard Henderson
Not actually implemented, but at least we avoid the tcg assert at startup. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/ppc32: Implement movcond32malc
Thanks to Richard Henderson Signed-off-by: malc <av1474@comtv.ru> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09w64: Fix TCG helper functions with 5 argumentsStefan Weil
TCG uses 6 registers for function arguments on 64 bit Linux hosts, but only 4 registers on W64 hosts. Commit 2999a0b20074a7e4a58f56572bb1436749368f59 increased the number of arguments for some important helper functions from 4 to 5 which triggered a bug for W64 hosts: QEMU aborts when executing helper_lcall_real in the guest's BIOS because function tcg_target_get_call_iarg_regs_count always returned 6. As W64 has only 4 registers for arguments, the 5th argument must be passed on the stack using a correct stack offset. Signed-off-by: Stefan Weil <sw@weilnetz.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/README: document tcg_gen_goto_tb restrictionsMax Filippov
See http://lists.nongnu.org/archive/html/qemu-devel/2012-09/msg03196.html for the whole story. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: add constant folding for depositAurelien Jarno
Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg: remove #ifdef #endif around TCGOpcode testsAurelien Jarno
Commit 25c4d9cc changed all TCGOpcode enums to be available, so we don't need to #ifdef #endif the one that are available only on some targets. This makes the code easier to read. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: prefer the "op a, a, b" form for commutative opsAurelien Jarno
The "op a, a, b" form is better handled on non-RISC host than the "op a, b, a" form, so swap the arguments to this form when possible, and when b is not a constant. This reduces the number of generated instructions by a tiny bit. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: further optimize brcond/movcond/setcondAurelien Jarno
When both argument of brcond/movcond/setcond are the same or when one of the two values is a constant equal to zero, it's possible to do further optimizations. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: optimize "op r, a, a => movi r, 0"Aurelien Jarno
Now that it's possible to detect copies, we can optimize the case the "op r, a, a => movi r, 0". This helps in the computation of overflow flags when one of the two args is 0. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: optimize "op r, a, a => mov r, a"Aurelien Jarno
Now that we can easily detect all copies, we can optimize the "op r, a, a => mov r, a" case a bit more. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: do copy propagation for all operationsAurelien Jarno
It is possible to due copy propagation for all operations, even the one that have side effects or clobber arguments (it only concerns input arguments). That said, the call operation should be handled differently due to the variable number of arguments. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: rework copy progagationAurelien Jarno
The copy propagation pass tries to keep track what is a copy of what and what has copy of what, and in addition it keep a circular list of of all the copies. Unfortunately this doesn't fully work: a mov from a temp which has a state "COPY" changed it into a state "HAS_COPY". Later when this temp is used again, it is considered has not having copy and thus no propagation is done. This patch fixes that by removing the hiearchy between copies, and thus only keeping a "COPY" state both meaning "is a copy" and "has a copy". The decision of which copy to use is deferred to the actual temp replacement. At this stage there is not one best choice to do, but only better choices than others. For doing the best choice the operation would have to be parsed in reversed to know if a temp is going to be used later or not. That what is done by the liveness analysis. At this stage it is known that globals will be always live, that local temps will be dead at the end of the translation block, and that the temps will be dead at the end of the basic block. This means that this stage should try to replace temps by local temps or globals and local temps by globals. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: check types in copy propagationAurelien Jarno
The copy propagation doesn't check the types of the temps during copy propagation. However TCG is using the mov_i32 for the i64 to i32 conversion and thus the two are not equivalent. With this patch tcg_opt_gen_mov() doesn't consider two temps of different type as copies anymore. So far it seems the optimization was not aggressive enough to trigger this bug, but it will be triggered later in this series once the copy propagation is improved. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: remove TCG_TEMP_ANYAurelien Jarno
TCG_TEMP_ANY has no different meaning than TCG_TEMP_UNDEF, so use the later instead. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: implement movcond op on MIPS32R2Aurelien Jarno
movcond operation can be implemented on MIPS32 Release 2 using the MOVN, MOVZ, SLT and SLTU instructions. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: implement deposit op on MIPS32R2Aurelien Jarno
deposit operations can be optimized on MIPS32 Release 2 using the INS instruction. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: implement rotl/rotr ops on MIPS32R2Aurelien Jarno
rotr operations can be optimized on MIPS32 Release 2 using the ROTR and ROTRV instructions. Also implemented rotl operations by subtracting the shift from 32. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: optimize bswap{16,16s,32} on MIPS32R2Aurelien Jarno
bswap operations can be optimized on MIPS32 Release 2 using the ROTR, WSBH and SEH instructions. We can't use the non-R2 code to implement the ops due to registers constraints, so don't define the corresponding TCG_TARGET_HAS_bswap* values. Also bswap16* operations are supposed to be called with the 16 high bits zeroed. This is the case everywhere (including for TCG by definition) except when called from the store helper. Remove the AND instructions from bswap16* and move it there. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: optimize brcond arg, 0Aurelien Jarno
MIPS has some conditional branch instructions when comparing with zero. Use them. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: use stack for TCG tempsAurelien Jarno
Use stack instead of temp_buf array in CPUState for TCG temps. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: don't use global pointerAurelien Jarno
Don't use the global pointer in TCG, in case helpers try access global variables. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: use TCGArg or TCGReg instead of intAurelien Jarno
Instead of int, use the correct TCGArg and TCGReg type: TCGReg when representing a TCG target register, TCGArg when representing the latter or a constant. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/mips: kill warnings in user modeAurelien Jarno
Recent versions of GCC emit warnings when compiling user mode targets. Kill them by reordering a bit the #ifdef. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-mips: fix wrong usage of 'Z' constraintAurelien Jarno
The 'Z' constraint has been introduced to map the zero register. However when the op also accept a constant, there is no point to accept the zero register in addition. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-hppa: Fix broken load/store helpersRichard Henderson
The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was not respecting the ABI requirement for 64-bit values being aligned in registers. Mirror the ARM port in use of helper functions to marshal arguments into the correct registers. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-hppa: Fix brcond2 and setcond2Richard Henderson
Neither of these functions were performing double-word compares properly. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg: Fix !USE_DIRECT_JUMPRichard Henderson
Commit 6375e09e changed the type of TranslationBlock.tb_next, but failed to change the type of TCGContext.tb_next. Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09gdbstub/sh4: fix build with USE_SOFTFLOAT_STRUCT_TYPESAurelien Jarno
We have to use different type to access float values when USE_SOFTFLOAT_STRUCT_TYPES is defined. Rework SH4 version of cpu_gdb_{read,write}_register() using a single case, and fixing the coding style. Use ldll_p() and stfl_p() to access float values. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg: Optimize two-address commutative operationsRichard Henderson
While swapping constants to the second operand, swap sources matching destinations to the first operand. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg: Optimize movcond for constant comparisonsRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg-i386: Implement movcondRichard Henderson
Signed-off-by: Richard Henderson <rth@twiddle.net> Reviewed-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-alpha: Use movcondRichard Henderson
For proper cmov insns, as well as the non-goto-tb case of conditional branch. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg: Introduce movcondRichard Henderson
Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-xtensa: don't emit extra tcg_gen_goto_tbMax Filippov
Unconditional gen_check_loop_end at the end of disas_xtensa_insn can emit tcg_gen_goto_tb with slot id already used in the TB (e.g. when TB ends at LEND with a branch). Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: malc <av1474@comtv.ru> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-xtensa: fix extui shift amountMax Filippov
extui opcode only uses lowermost op1 bit for sa4. Reported-by: malc <av1474@comtv.ru> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: malc <av1474@comtv.ru> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/optimize: fix end of basic block detectionAurelien Jarno
Commit e31b0a7c050711884ad570fe73df806520953618 fixed copy propagation on 32-bit host by restricting the copy between different types. This was the wrong fix. The real problem is that the all temps states should be reset at the end of a basic block. This was done by adding such operations in the switch, but brcond2 was forgotten (that's why the crash was only observed on 32-bit hosts). Fix that by looking at the TCG_OPF_BB_END instead. We need to keep the case for op_set_label as temps might be modified through another path. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-mips: Always evaluate debugging macro argumentsRichard Henderson
this will prevent some of the compilation errors with debugging enabled from creeping back in. Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-mips: Fix MIPS_DEBUG.Richard Henderson
The macro uses the DisasContext. Pass it around as needed. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-mips: Set opn in gen_ldst_multiple.Richard Henderson
Used by MIPS_DEBUG, when enabled. Signed-off-by: Richard Henderson <rth@twiddle.net> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09revert "TCG: fix copy propagation"Aurelien Jarno
Given the copy propagation breakage on 32-bit hosts has been fixed commit e31b0a7c050711884ad570fe73df806520953618 can be reverted. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg: mark set_label with TCG_OPF_BB_END flagAurelien Jarno
set_label is effectively the end of a basic block, as no optimization can be made accross it. It was treated as such in the liveness analysis code, but as a special case. Mark it with TCG_OPF_BB_END flag so that this information can be used by other parts of the TCG code, and remove the special case in the liveness analysis code. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09tcg/i386: allow constants in load/store opsAurelien Jarno
On x86, it is possible to move a constant value to memory. Add code to handle a constant argument to load/store ops. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09Remove unused CONFIG_TCG_PASS_AREG0 and dead codeBlue Swirl
Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets, remove dead code and support for !CONFIG_TCG_PASS_AREG0 case. Remove dyngen-exec.h and all references to it. Although included by hw/spapr_hcall.c, it does not seem to use it. Remove unused HELPER_CFLAGS. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-mips: switch to AREG0 free modeBlue Swirl
Add an explicit CPUState parameter instead of relying on AREG0 and switch to AREG0 free mode. Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
2012-10-09target-sh4: switch to AREG0 free modeBlue Swirl
Add an explicit CPUState parameter instead of relying on AREG0 and switch to AREG0 free mode. Acked-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
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