Age | Commit message (Expand) | Author |
2017-09-07 | target/arm: Make MPU_RBAR, MPU_RLAR banked for v8M | Peter Maydell |
2017-09-07 | target/arm: Make MPU_MAIR0, MPU_MAIR1 registers banked for v8M | Peter Maydell |
2017-09-07 | target/arm: Make VTOR register banked for v8M | Peter Maydell |
2017-09-07 | nvic: Add NS alias SCS region | Peter Maydell |
2017-09-07 | target/arm: Make CONTROL register banked for v8M | Peter Maydell |
2017-09-07 | target/arm: Make FAULTMASK register banked for v8M | Peter Maydell |
2017-09-07 | target/arm: Make PRIMASK register banked for v8M | Peter Maydell |
2017-09-07 | target/arm: Make BASEPRI register banked for v8M | Peter Maydell |
2017-09-07 | target/arm: Add MMU indexes for secure v8M | Peter Maydell |
2017-09-07 | target/arm: Register second AddressSpace for secure v8M CPUs | Peter Maydell |
2017-09-07 | target/arm: Add state field, feature bit and migration for v8M secure state | Peter Maydell |
2017-09-07 | target/arm: Implement new PMSAv8 behaviour | Peter Maydell |
2017-09-07 | target/arm: Implement ARMv8M's PMSAv8 registers | Peter Maydell |
2017-09-07 | hw/arm/allwinner-a10: Mark the allwinner-a10 device with user_creatable = false | Thomas Huth |
2017-09-07 | xilinx_axidma: Convert to DEFINE_PROP_LINK | Fam Zheng |
2017-09-07 | xilinx_axienet: Convert to DEFINE_PROP_LINK | Fam Zheng |
2017-09-07 | xlnx_zynqmp: Convert to DEFINE_PROP_LINK | Fam Zheng |
2017-09-07 | gicv3: Convert to DEFINE_PROP_LINK | Fam Zheng |
2017-09-07 | armv7m: Convert armv7m.memory to DEFINE_PROP_LINK | Fam Zheng |
2017-09-07 | armv7m: Convert bitband.source-memory to DEFINE_PROP_LINK | Fam Zheng |
2017-09-07 | Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170906' into staging | Peter Maydell |
2017-09-07 | Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging | Peter Maydell |
2017-09-07 | Merge remote-tracking branch 'remotes/juanquintela/tags/tests/20170906' into ... | Peter Maydell |
2017-09-06 | migration: dump str in migrate_set_state trace | Peter Xu |
2017-09-06 | nbd: Use new qio_channel_*_all() functions | Eric Blake |
2017-09-06 | io: Add new qio_channel_read{, v}_all_eof functions | Eric Blake |
2017-09-06 | io: Yield rather than wait when already in coroutine | Eric Blake |
2017-09-06 | target/arm: Perform per-insn cross-page check only for Thumb | Richard Henderson |
2017-09-06 | target/arm: Split out thumb_tr_translate_insn | Richard Henderson |
2017-09-06 | target/arm: Move ss check to init_disas_context | Richard Henderson |
2017-09-06 | target/arm: [a64] Move page and ss checks to init_disas_context | Richard Henderson |
2017-09-06 | target/arm: [tcg] Port to generic translation framework | Lluís Vilanova |
2017-09-06 | target/arm: [tcg,a64] Port to disas_log | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to disas_log | Lluís Vilanova |
2017-09-06 | target/arm: [tcg,a64] Port to tb_stop | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to tb_stop | Lluís Vilanova |
2017-09-06 | target/arm: [tcg,a64] Port to translate_insn | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to translate_insn | Lluís Vilanova |
2017-09-06 | target/arm: [tcg,a64] Port to breakpoint_check | Lluís Vilanova |
2017-09-06 | target/arm: [tcg,a64] Port to insn_start | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to insn_start | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to tb_start | Lluís Vilanova |
2017-09-06 | target/arm: [tcg,a64] Port to init_disas_context | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to init_disas_context | Lluís Vilanova |
2017-09-06 | target/arm: [tcg] Port to DisasContextBase | Lluís Vilanova |
2017-09-06 | target/i386: [tcg] Port to generic translation framework | Lluís Vilanova |
2017-09-06 | target/i386: [tcg] Port to disas_log | Lluís Vilanova |
2017-09-06 | target/i386: [tcg] Port to tb_stop | Lluís Vilanova |
2017-09-06 | target/i386: [tcg] Port to translate_insn | Lluís Vilanova |
2017-09-06 | target/i386: [tcg] Port to breakpoint_check | Lluís Vilanova |