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2020-03-06docs: Stop building qemu-docPeter Maydell
Stop building the old texinfo qemu-doc; all its contents are now available in the Sphinx-generated manuals and manpages. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-32-peter.maydell@linaro.org
2020-03-06ui/cocoa.m: Update documentation file and pathnamePeter Maydell
We want to stop generating the old qemu-doc.html; first we must update places that refer to it so they instead go to our top level index.html documentation landing page. The Cocoa UI has a menu option to bring up the documentation; make it point to the new top level index.html instead. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-31-peter.maydell@linaro.org
2020-03-06docs: Generate qemu.1 manpage with SphinxPeter Maydell
Generate the qemu.1 manpage using Sphinx; we do this with a new top-level rst source file which is just the skeleton of the manpage and which includes .rst.inc fragments where it needs to incorporate sections from the larger HTML manuals. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-30-peter.maydell@linaro.org
2020-03-06docs: Split out sections for the manpage into .rst.inc filesPeter Maydell
Sphinx doesn't have very good facilities for marking chunks of documentation as "put this in the manpage only". So instead we move the parts we want to put into both the HTML manuals and the manpage into their own .rst.inc files, which we can include from both the main manual rst files and a new toplevel rst file that will be the skeleton of the qemu.1 manpage. In this commit, just split out the parts of the documentation that go in the manpage. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-29-peter.maydell@linaro.org
2020-03-06qemu-options.hx: Fix up the autogenerated rSTPeter Maydell
This commit contains hand-written fixes for some issues with the autogenerated rST fragments in qemu-options.hx: * Sphinx complains about the UTF-8 art table in the documentation of the -drive option. Replace it with a proper rST format table. * rST does not like definition list entries with no actual definition, but it is possible to work around this by putting a single escaped literal space as the definition line. * The "-g widthxheight" option documentation suffers particularly badly from losing the distinction between italics and fixed-width as a result of the auto conversion, so put it back in again. * The script missed some places that use the |qemu_system| etc macros and need to be marked up as parsed-literal blocks. * The script autogenerated an expanded out version of the contents of qemu-option-trace.texi; replace it with an qemu-option-trace.rst.inc include. This is sufficient that we can enable inclusion of the option documentation from invocation.rst. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-28-peter.maydell@linaro.org
2020-03-06qemu-options.hx: Add rST documentation fragmentsPeter Maydell
Add the rST versions of the documentation fragments to qemu-options.hx. This is entirely autogenerated using scripts/hxtool-conv.pl. The result is not quite valid rST in all places; the following commit will have the manual adjustments needed. Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06scripts/hxtool-conv: Archive script used in qemu-options.hx conversionPeter Maydell
This commit archives the perl script used to do conversion of the STEXI/ETEXI blocks in qemu-options.hx. (The other .hx files were manually converted, but qemu-options.hx is complicated enough that I felt I needed some scripting.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-26-peter.maydell@linaro.org
2020-03-06docs: Roll -prom-env and -g target-specific info into qemu-options.hxPeter Maydell
The SPARC and PPC targets currently have a fragment of target-specific information about the -g and -prom options which would be better placed as part of the general documentation of those options in qemu-options.hx. Move the relevant information to those locations. SPARC also has a bit of text about the -M option which is out of date and provides no useful information over the generic documentation of that option, so just delete it. The motivation here is again to avoid having to awkwardly include this text into the rST version of the qemu.1 manpage. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-25-peter.maydell@linaro.org
2020-03-06docs: Roll semihosting option information into qemu-options.hxPeter Maydell
Currently the per-target documentation for those targets that implement semihosting includes a bit of text that goes into both the manual and the manpage about options specific to the target. This text is redundant with the earlier generic option description of the semihosting option produced from qemu-options.hx. To avoid having to create a lot of stub include files to include into the rST generated qemu.1 manpage, roll target-specific bits of information into the qemu-options.hx text, so the user doesn't have to look in two places for this information. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-24-peter.maydell@linaro.org
2020-03-06doc/scripts/hxtool.py: Strip trailing ':' from DEFHEADING/ARCHHEADINGPeter Maydell
In hxtool files, section headings defined with the DEFHEADING and ARCHHEADING macros have a trailing ':' DEFHEADING(Standard options:) This is for the benefit of the --help output. For consistency with the rest of the rST documentation, strip any trailing ':' when we construct headings with the Sphinx hxtool extension. This makes the table of contents look neater. This only affects generation of documentation from qemu-options.hx, which we will start doing in a later commit. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-23-peter.maydell@linaro.org
2020-03-06hmp-commands-info.hx: Add rST documentation fragmentsPeter Maydell
Add the rST versions of the documentation fragments. Once we've converted fully from Texinfo to rST we can remove the ETEXI fragments; for the moment we need both. Note that most of the SRST fragments are 2-space indented so that the 'info foo' documentation entries appear as a sublist under the 'info' entry in the top level list. Again, all we need to do to put the documentation in the Sphinx manual is a one-line hxtool-doc invocation. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-22-peter.maydell@linaro.org
2020-03-06hmp-commands.hx: Add rST documentation fragmentsPeter Maydell
Add the rST versions of the documentation fragments. Once we've converted fully from Texinfo to rST we can remove the ETEXI fragments; for the moment we need both. Since the only consumer of the hmp-commands hxtool documentation is the HTML manual, all we need to do for the monitor command documentation to appear in the Sphinx system manual is add the one line that invokes the hxtool extension on the .hx file. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-21-peter.maydell@linaro.org
2020-03-06docs/system: convert Texinfo documentation to rSTPaolo Bonzini
Apart from targets.rst, which was written by hand, this is an automated conversion obtained with the following command: makeinfo --force -o - --docbook \ -D 'qemu_system_x86 QEMU_SYSTEM_X86_MACRO' \ -D 'qemu_system QEMU_SYSTEM_MACRO' \ $texi | pandoc -f docbook -t rst+smart | perl -e ' $/=undef; $_ = <>; s/^- − /- /gm; s/QEMU_SYSTEM_MACRO/|qemu_system|/g; s/QEMU_SYSTEM_X86_MACRO/|qemu_system_x86|/g; s/(?=::\n\n +\|qemu)/.. parsed-literal/g; s/:\n\n::$/::/gm; print' > $rst In addition, the following changes were made manually: - target-i386.rst and target-mips.rst: replace CPU model documentation with an include directive - monitor.rst: replace the command section with a comment - images.rst: add toctree - target-arm.rst: Replace use of :math: (which Sphinx complains about) with :sup:, and hide it behind |I2C| and |I2C| substitutions. Content that is not @included remains exclusive to qemu-doc.texi. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-20-peter.maydell@linaro.org Message-id: 20200226113034.6741-19-pbonzini@redhat.com [PMM: Fixed target-arm.rst use of :math:; remove out of date note about images.rst from commit message; fixed expansion of |qemu_system_x86|; use parsed-literal in invocation.rst when we want to use |qemu_system_x86|; fix incorrect subsection level for "OS requirements" in target-i386.rst; fix incorrect syntax for making links to other sections of the manual] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06docs/system: convert the documentation of deprecated features to rST.Peter Maydell
We put the whole of this document into the system manual, though technically a few parts of it apply to qemu-img or qemu-nbd which are otherwise documented in tools/. We only make formatting fixes, except for one use of 'appendix' which we change to 'section' because this isn't an appendix in the Sphinx manual. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-19-peter.maydell@linaro.org Message-id: 20200226113034.6741-18-pbonzini@redhat.com
2020-03-06docs/system: convert managed startup to rST.Peter Maydell
Fix one typo in the process and format more option and command names as literal text, but make no significant changes to the content. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-18-peter.maydell@linaro.org Message-id: 20200226113034.6741-17-pbonzini@redhat.com
2020-03-06docs/system: Convert security.texi to rST formatPeter Maydell
security.texi is included from qemu-doc.texi but is not used in the qemu.1 manpage. So we can do a straightforward conversion of the contents, which go into the system manual. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-17-peter.maydell@linaro.org Message-id: 20200226113034.6741-16-pbonzini@redhat.com
2020-03-06docs/system: Convert qemu-cpu-models.texi to rSTKashyap Chamarthy
This doc was originally written by Daniel P. Berrangé <berrange@redhat.com>, introduced via commit[1]: 2544e9e4aa (docs: add guidance on configuring CPU models for x86, 2018-06-27). In this patch: - 1-1 conversion of Texinfo to rST, besides a couple of minor tweaks that are too trivial to mention. (Thanks to Stephen Finucane on IRC for the suggestion to use rST "definition lists" instead of bullets in some places.) Further modifications will be done via a separate patch. - rST and related infra changes: manual page generation, Makefile fixes, clean up references to qemu-cpu-models.texi, update year in the copyright notice, etc. [1] https://git.qemu.org/?p=qemu.git;a=commit;h=2544e9e4aa As part of the conversion, we use a more generic 'author' attribution for the manpage than we previously had, as agreed with the original author Dan Berrange. Signed-off-by: Kashyap Chamarthy <kchamart@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-16-peter.maydell@linaro.org Message-id: 20200226113034.6741-15-pbonzini@redhat.com [Move macros to defs.rst.inc, split in x86 and MIPS parts, make qemu-cpu-models.rst a standalone document. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> [PMM: Move defs.rst.inc setup to its own commit; fix minor issues with MAINTAINERS file updates; drop copyright date change; keep capitalization of "QEMU Project developers" consistent with other uses; minor Makefile fixups] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06docs: Create defs.rst.inc as a place to define substitutionsPeter Maydell
Rather than accumulating generally useful rST substitution definitions in individual rST files, create a defs.rst.inc where we can define these. To start with it has the |qemu_system| definition from qemu-block-drivers.rst. Add a comment noting a pitfall where putting literal markup in the definition of |qemu_system| makes it misrender manpage output; this means the point-of-use must handle the literal markup (which is almost always done by having it inside a parsed-literal block). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Kashyap Chamarthy <kchamart@redhat.com> Tested-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 20200228153619.9906-15-peter.maydell@linaro.org
2020-03-06docs/system: put qemu-block-drivers body in an included filePaolo Bonzini
This removes the "only" directives, and lets us use the conventional "DESCRIPTION" section in the manpage. This temporarily drops the qemu-block-drivers documentation from the system manual, but it will be put back (in the right place in the toctree) in a later commit. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-14-peter.maydell@linaro.org Message-id: 20200226113034.6741-14-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: Added commit message note about temporarily losing qemu-block-drivers from the system manual] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: remove indices other than findexPaolo Bonzini
These indices are not well-maintained, and pandoc also chokes on the directives. Just nuke them. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-13-peter.maydell@linaro.org Message-id: 20200226113034.6741-13-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: move included files to docs/systemPaolo Bonzini
Since qemu-doc.texi is mostly including files from docs/system, move the existing include files there for consistency. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-12-peter.maydell@linaro.org Message-id: 20200226113034.6741-12-pbonzini@redhat.com [PMM: update MAINTAINERS line for qemu-option-trace.texi] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: move qemu-tech.texi into main sectionPaolo Bonzini
The only remaining content in qemu-tech.texi is a few paragraphs about managed start up options. Move them in the main section about full system emulation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-11-peter.maydell@linaro.org Message-id: 20200226113034.6741-11-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: Remove the "CPU emulation" part of the "Implementation notes"Peter Maydell
The "CPU emulation" part of the "Implementation notes" in qemu-tech.texi looks like it is documenting what features of various CPUs we do or don't emulate. However: * it covers only six of our 21 guest architectures * the last time anybody updated it for actual content was in 2011/2012 for Xtensa; the content for the other five architectures is even older, being from 2008 or before! What we have is out of date, misleading and incomplete. Just delete this part of the document rather than trying to convert it to rST. (It would be nice eventually to have documentation of the scope and limitations of our emulation; but we will want to separate out the generic "system emulation" information from the parts that are specific to linux-user anyway, as they will be in different manuals.) Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Message-id: 20200228153619.9906-10-peter.maydell@linaro.org Message-id: 20200226113034.6741-10-pbonzini@redhat.com Message-Id: <20200225154121.21116-3-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2020-03-06qemu-doc: split target sections to separate filesPaolo Bonzini
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-9-peter.maydell@linaro.org Message-id: 20200226113034.6741-9-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: move system requirements chapter inside PC sectionPaolo Bonzini
The system requirements documented in this chapter are limited to x86 KVM targets. Clean them up and move them to the target section. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-8-peter.maydell@linaro.org Message-id: 20200226113034.6741-8-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: extract common system emulator documentation from the PC sectionPaolo Bonzini
Move the section on PC peripherals together with other targets. While some x86-specific information remains in the main system emulation chapter, it can be tackled more easily a section at a time. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-7-peter.maydell@linaro.org Message-id: 20200226113034.6741-7-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: split qemu-doc.texi in multiple filesPaolo Bonzini
In order to facilitate the reorganization of qemu-doc.texi content, as well as the conversion to rST/Sphinx, split it in multiple .texi files that are included from docs/system. The "other devices" section is renamed to ivshmem and placed last. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-6-peter.maydell@linaro.org Message-id: 20200226113034.6741-6-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: split CPU models doc between MIPS and x86 partsPaolo Bonzini
The MIPS CPU models end up in the middle of the PC documentation. Move them to a separate file so that they can be placed in the right section. The man page still includes both x86 and MIPS content. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-5-peter.maydell@linaro.org Message-id: 20200226113034.6741-5-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06texi2pod: parse @include directives outside "@c man" blocksPaolo Bonzini
This enables splitting the huge qemu-doc.texi file and keeping parallel Texinfo and rST versions of the documentation. texi2pod is not going to live much longer and hardly anyone cares about its upstream status, so the temporary fork should be acceptable. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-4-peter.maydell@linaro.org Message-id: 20200226113034.6741-4-pbonzini@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: remove target OS documentationPaolo Bonzini
This section covers OSes up to Windows 2000, and as such it is mostly obsolete. Zap it. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-3-peter.maydell@linaro.org Message-id: 20200226113034.6741-3-pbonzini@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-06qemu-doc: convert user-mode emulation to a separate Sphinx manualPaolo Bonzini
The final addition to the set of QEMU manuals is the user-mode emulation manual, which right now is included in qemu-doc.texi. Extract it and convert it to rST, so that qemu-doc.texi covers only full system emulation. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200228153619.9906-2-peter.maydell@linaro.org Message-id: 20200226113034.6741-2-pbonzini@redhat.com [PMM: Fix makefile conflicts; add user manual to index.rst and index.html.in; don't specify empty man_pages list; fixed a few comments to say 'user' rather than 'system'] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05Merge remote-tracking branch 'remotes/palmer/tags/riscv-for-master-5.0-sf4' ↵Peter Maydell
into staging A single RISC-V fixup This is just a single patch, which fixes a bug found by Coverity. # gpg: Signature made Thu 05 Mar 2020 20:05:03 GMT # gpg: using RSA key 2B3C3747446843B24A943A7A2E1319F35FBB1889 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmerdabbelt@google.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 # Subkey fingerprint: 2B3C 3747 4468 43B2 4A94 3A7A 2E13 19F3 5FBB 1889 * remotes/palmer/tags/riscv-for-master-5.0-sf4: RISC-V: Add a missing "," in riscv_excp_names Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05RISC-V: Add a missing "," in riscv_excp_namesPalmer Dabbelt
This would almost certainly cause the exception names to be reported incorrectly. Coverity found the issue (CID 1420223). As per Peter's suggestion, I've also added a comma at the end of the list to avoid the issue reappearing in the future. Fixes: ab67a1d07a ("target/riscv: Add support for the new execption numbers") Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-03-05Merge remote-tracking branch ↵Peter Maydell
'remotes/stefanberger/tags/pull-tpm-2020-03-04-2' into staging Merge tpm 2020/03/04 v2 # gpg: Signature made Thu 05 Mar 2020 17:21:05 GMT # gpg: using RSA key B818B9CADF9089C2D5CEC66B75AD65802A0B4211 # gpg: Good signature from "Stefan Berger <stefanb@linux.vnet.ibm.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B818 B9CA DF90 89C2 D5CE C66B 75AD 6580 2A0B 4211 * remotes/stefanberger/tags/pull-tpm-2020-03-04-2: test: tpm-tis: Add Sysbus TPM-TIS device test test: tpm-tis: Get prepared to share tests between ISA and sysbus devices test: tpm: pass optional machine options to swtpm test functions docs/specs/tpm: Document TPM_TIS sysbus device for ARM hw/arm/virt: vTPM support tpm: Add the SysBus TPM TIS device tpm: Separate TPM_TIS and TPM_TIS_ISA configs tpm: Separate tpm_tis common functions from isa code tpm: Use TPMState as a common struct tpm: rename TPM_TIS into TPM_TIS_ISA Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05test: tpm-tis: Add Sysbus TPM-TIS device testEric Auger
The tests themselves are the same as the ISA device ones. Only the main() changes as the "tpm-tis-device" device gets instantiated. Also the base address of the device is not 0xFED40000 anymore but matches the base address of the ARM virt platform bus. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20200305165149.618-11-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05test: tpm-tis: Get prepared to share tests between ISA and sysbus devicesEric Auger
ISA and sysbus TPM-TIS devices will share their tests. Only the main() will change (instantiation option is different). Also the base address of the TPM-TIS device is going to be different. on x86 it is located at 0xFED40000 while on ARM it can be located at any location, discovered through the device tree description. So we put shared test functions in a new object module. Each test needs to set tpm_tis_base_addr global variable. Also take benefit of this move to fix "block comments using a leading */ on a separate line" checkpatch warnings. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20200305165149.618-10-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05test: tpm: pass optional machine options to swtpm test functionsEric Auger
We plan to use swtpm test functions on ARM for testing the sysbus TPM-TIS device. However on ARM there is no default machine type. So we need to explictly pass some machine options on startup. Let's allow this by adding a new parameter to both swtpm test functions and update all call sites. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20200305165149.618-9-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05docs/specs/tpm: Document TPM_TIS sysbus device for ARMEric Auger
Update the documentation with recent changes related to the sysbus TPM_TIS device addition and add the command line to be used with arm VIRT. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Message-id: 20200305165149.618-8-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05hw/arm/virt: vTPM supportEric Auger
Let the TPM TIS SYSBUS device be dynamically instantiable in ARM virt. A device tree node is dynamically created (TPM via MMIO). The TPM Physical Presence interface (PPI) is not supported. To run with the swtmp TPM emulator, the qemu command line must be augmented with: -chardev socket,id=chrtpm,path=swtpm-sock \ -tpmdev emulator,id=tpm0,chardev=chrtpm \ -device tpm-tis-device,tpmdev=tpm0 \ swtpm/libtpms command line example: swtpm socket --tpm2 -t -d --tpmstate dir=/tmp/tpm \ --ctrl type=unixio,path=swtpm-sock Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20200305165149.618-7-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05tpm: Add the SysBus TPM TIS deviceEric Auger
Introduce the tpm-tis-device which is a sysbus device and is bound to be used on ARM. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20200305165149.618-6-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05tpm: Separate TPM_TIS and TPM_TIS_ISA configsEric Auger
Let's separate the compilation of tpm_tis_common.c from the compilation of tpm_tis_isa.c The common part will be also compiled along with the tpm_tis_sysbus device. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20200305165149.618-5-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05tpm: Separate tpm_tis common functions from isa codeEric Auger
Move the device agnostic code into tpm_tis_common.c and put the ISA device specific code into tpm_tis_isa.c Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20200305165149.618-4-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05tpm: Use TPMState as a common structEric Auger
As we plan to introduce a SysBus TPM TIS device, let's make the TPMState a common struct usable by both the ISADevice and the SysBusDevice. TPMStateISA embeds the struct and inherits from the ISADevice. The prototype of functions bound to be used by both the ISA and SysBus devices is changed to take TPMState handle. A bunch of structs also are renamed to be specialized for the ISA device. Besides those transformations, no functional change is expected. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20200305165149.618-3-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05tpm: rename TPM_TIS into TPM_TIS_ISAEric Auger
As we plan to introduce a sysbus TPM_TIS, let's rename TPM_TIS into TPM_TIS_ISA. Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Stefan Berger <stefanb@linux.ibm.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Message-id: 20200305165149.618-2-eric.auger@redhat.com Signed-off-by: Stefan Berger <stefanb@linux.ibm.com>
2020-03-05Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20200305' into staging * versal: Implement ADMA * Implement (trivially) ARMv8.2-TTCNP * hw/arm/smmu-common: a fix to smmu_find_smmu_pcibus * Remove unnecessary endianness-handling on some boards * Avoid minor memory leaks from timer_new in some devices * Honour more of the HCR_EL2 trap bits * Complain rather than ignoring bad command line options for cubieboard * Honour TBI for DC ZVA and exception return # gpg: Signature made Thu 05 Mar 2020 16:30:17 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20200305: (37 commits) target/arm: Clean address for DC ZVA target/arm: Use DEF_HELPER_FLAGS for helper_dc_zva target/arm: Move helper_dc_zva to helper-a64.c target/arm: Apply TBI to ESR_ELx in helper_exception_return target/arm: Introduce core_to_aa64_mmu_idx target/arm: Optimize cpu_mmu_index target/arm: Replicate TBI/TBID bits for single range regimes hw/arm/cubieboard: report error when using unsupported -bios argument hw/arm/cubieboard: restrict allowed RAM size to 512MiB and 1GiB hw/arm/cubieboard: restrict allowed CPU type to ARM Cortex-A8 hw/arm/cubieboard: use ARM Cortex-A8 as the default CPU in machine definition tests/tcg/aarch64: Add newline in pauth-1 printf target/arm: Honor the HCR_EL2.TTLB bit target/arm: Honor the HCR_EL2.TPU bit target/arm: Honor the HCR_EL2.TPCP bit target/arm: Honor the HCR_EL2.TACR bit target/arm: Honor the HCR_EL2.TSW bit target/arm: Honor the HCR_EL2.{TVM,TRVM} bits target/arm: Improve masking in arm_hcr_el2_eff target/arm: Remove EL2 and EL3 setup from user-only ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05target/arm: Clean address for DC ZVARichard Henderson
This data access was forgotten when we added support for cleaning addresses of TBI information. Fixes: 3a471103ac1823ba Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200302175829.2183-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05target/arm: Use DEF_HELPER_FLAGS for helper_dc_zvaRichard Henderson
The function does not write registers, and only reads them by implication via the exception path. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200302175829.2183-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05target/arm: Move helper_dc_zva to helper-a64.cRichard Henderson
This is an aarch64-only function. Move it out of the shared file. This patch is code movement only. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20200302175829.2183-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05target/arm: Apply TBI to ESR_ELx in helper_exception_returnRichard Henderson
We missed this case within AArch64.ExceptionReturn. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200302175829.2183-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2020-03-05target/arm: Introduce core_to_aa64_mmu_idxRichard Henderson
If by context we know that we're in AArch64 mode, we need not test for M-profile when reconstructing the full ARMMMUIdx. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20200302175829.2183-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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