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2018-10-19hyperv: add synic message deliveryRoman Kagan
Add infrastructure to deliver SynIC messages to the SynIC message page. Note that KVM may also want to deliver (SynIC timer) messages to the same message slot. The problem is that the access to a SynIC message slot is controlled by the value of its .msg_type field which indicates if the slot is being owned by the hypervisor (zero) or by the guest (non-zero). This leaves no room for synchronizing multiple concurrent producers. The simplest way to deal with this for both KVM and QEMU is to only deliver messages in the vcpu thread. KVM already does this; this patch makes it for QEMU, too. Specifically, - add a function for posting messages, which only copies the message into the staging buffer if its free, and schedules a work on the corresponding vcpu to actually deliver it to the guest slot; - instead of a sint ack callback, set up the sint route with a message status callback. This function is called in a bh whenever there are updates to the message slot status: either the vcpu made definitive progress delivering the message from the staging buffer (succeeded or failed) or the guest issued EOM; the status is passed as an argument to the callback. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-6-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: make overlay pages for SynICRoman Kagan
Per Hyper-V spec, SynIC message and event flag pages are to be implemented as so called overlay pages. That is, they are owned by the hypervisor and, when mapped into the guest physical address space, overlay the guest physical pages such that 1) the overlaid guest page becomes invisible to the guest CPUs until the overlay page is turned off 2) the contents of the overlay page is preserved when it's turned off and back on, even at a different address; it's only zeroed at vcpu reset This particular nature of SynIC message and event flag pages is ignored in the current code, and guest physical pages are used directly instead. This happens to (mostly) work because the actual guests seem not to depend on the features listed above. This patch implements those pages as the spec mandates. Since the extra RAM regions, which introduce migration incompatibility, are only added at SynIC object creation which only happens when hyperv_synic_kvm_only == false, no extra compat logic is necessary. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-5-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: only add SynIC in compatible configurationsRoman Kagan
Certain configurations do not allow SynIC to be used in QEMU. In particular, - when hyperv_vpindex is off, SINT routes can't be used as they refer to the destination vCPU by vp_index - older KVM (which doesn't expose KVM_CAP_HYPERV_SYNIC2) zeroes out SynIC message and event pages on every msr load, breaking migration OTOH in-KVM users of SynIC -- SynIC timers -- do work in those configurations, and we shouldn't stop the guest from using them. To cover both scenarios, introduce an X86CPU property that makes CPU init code to skip creation of the SynIC object (and thus disables any SynIC use in QEMU) but keeps the KVM part of the SynIC working. The property is clear by default but is set via compat logic for older machine types. As a result, when hv_synic and a modern machine type are specified, QEMU will refuse to run unless vp_index is on and the kernel is recent enough. OTOH with an older machine type QEMU will run fine with hv_synic=on against an older kernel and/or without vp_index enabled but will disallow the in-QEMU uses of SynIC (in e.g. VMBus). Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-4-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: qom-ify SynICRoman Kagan
Make Hyper-V SynIC a device which is attached as a child to a CPU. For now it only makes SynIC visibile in the qom hierarchy, and maintains its internal fields in sync with the respecitve msrs of the parent cpu (the fields will be used in followup patches). Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-3-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv:synic: split capability testing and settingRoman Kagan
Put a bit more consistency into handling KVM_CAP_HYPERV_SYNIC capability, by checking its availability and determining the feasibility of hv-synic property first, and enabling it later. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082217.29481-2-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19i386: add hyperv-stub for CONFIG_HYPERV=nRoman Kagan
This will allow to build slightly leaner QEMU that supports some HyperV features of KVM (e.g. SynIC timers, PV spinlocks, APIC assists, etc.) but nothing else on the QEMU side. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-6-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19default-configs: collect CONFIG_HYPERV* in hyperv.makRoman Kagan
Accumulate HYPERV config options in a dedicated file. There are only two so far; more will be added later. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-5-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: factor out arch-independent API into hw/hypervRoman Kagan
A significant part of hyperv.c is not actually tied to x86, and can be moved to hw/. This will allow to maintain most of Hyper-V and VMBus target-independent, and to avoid conflicts with inclusion of arch-specific headers down the road in VMBus implementation. Also this stuff can now be opt-out with CONFIG_HYPERV. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-4-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: make hyperv_vp_index inlineRoman Kagan
Also make the inverse function, hyperv_find_vcpu, static as it's not used outside hyperv.c This paves the way to making hyperv.c built optionally. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-3-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: split hyperv-proto.h into x86 and arch-independent partsRoman Kagan
Some parts of the Hyper-V hypervisor-guest interface appear to be target-independent, so move them into a proper header. Not that Hyper-V ARM64 emulation is around the corner but it seems more conveninent to have most of Hyper-V and VMBus target-independent, and allows to avoid conflicts with inclusion of arch-specific headers down the road in VMBus implementation. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921082041.29380-2-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: rename kvm_hv_sint_route_set_sintRoman Kagan
There's nothing kvm-specific in it so follow the suite and replace "kvm_hv" prefix with "hyperv". Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-9-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: make HvSintRoute reference-countedRoman Kagan
Multiple entities (e.g. VMBus devices) can use the same SINT route. To make their lives easier in maintaining SINT route ownership, make it reference-counted. Adjust the respective API names accordingly. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-8-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: address HvSintRoute by X86CPU pointerRoman Kagan
Use X86CPU pointer to refer to the respective HvSintRoute instead of vp_index. This is more convenient and also paves the way for future enhancements. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-7-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: allow passing arbitrary data to sint ack callbackRoman Kagan
Make sint ack callback accept an opaque pointer, that is stored on sint_route at creation time. This allows for more convenient interaction with the callback. Besides, nothing outside hyperv.c should need to know the layout of HvSintRoute fields any more so its declaration can be removed from the header. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-6-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: synic: only setup ack notifier if there's a callbackRoman Kagan
There's no point setting up an sint ack notifier if no callback is specified. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-5-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv: cosmetic: g_malloc -> g_newRoman Kagan
Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-4-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv_testdev: drop unnecessary includesRoman Kagan
Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-3-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hyperv_testdev: refactor for better maintainabilityRoman Kagan
Make hyperv_testdev slightly easier to follow and enhance in future. For that, put the hyperv sint routes (wrapped in a helper structure) on a linked list rather than a fixed-size array. Besides, this way HvSintRoute can be treated as an opaque structure, allowing for easier refactoring of the core Hyper-V SynIC code in followup pathches. Signed-off-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20180921081836.29230-2-rkagan@virtuozzo.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19scsi-disk: fix rerror/werror=ignorePaolo Bonzini
rerror=ignore was returning true from scsi_handle_rw_error but the callers were not calling scsi_req_complete when rerror=ignore returns true (this is the correct thing to do when true is returned after executing a passthrough command). Fix this by calling it in scsi_handle_rw_error. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19scsi-disk: fix double completion of failing passthrough requestsPaolo Bonzini
If a command fails with a sense that scsi_sense_buf_to_errno converts to ECANCELED/EAGAIN/ENOTCONN or with a unit attention, scsi_req_complete is called twice. This caused a crash. Reported-by: Wangguang <wang.guangA@h3c.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19hw: edu: drop DO_UPCASTLi Qiang
Signed-off-by: Li Qiang <liq3ea@163.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19call HotplugHandler->plug() as the last step in device realizationIgor Mammedov
When [2] was fixed it was agreed that adding and calling post_plug() callback after device_reset() was low risk approach to hotfix issue right before release. So it was merged instead of moving already existing plug() callback after device_reset() is called which would be more risky and require all plug() callbacks audit. Looking at the current plug() callbacks, it doesn't seem that moving plug() callback after device_reset() is breaking anything, so here goes agreed upon [3] proper fix which essentially reverts [1][2] and moves plug() callback after device_reset(). This way devices always comes to plug() stage, after it's been fully initialized (including being reset), which fixes race condition [2] without need for an extra post_plug() callback. 1. (25e897881 "qdev: add HotplugHandler->post_plug() callback") 2. (8449bcf94 "virtio-scsi: fix hotplug ->reset() vs event race") 3. https://www.mail-archive.com/qemu-devel@nongnu.org/msg549915.html Signed-off-by: Igor Mammedov <imammedo@redhat.com> Message-Id: <1539696820-273275-1-git-send-email-imammedo@redhat.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com> Tested-by: Pierre Morel<pmorel@linux.ibm.com> Acked-by: Pierre Morel<pmorel@linux.ibm.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19vl, qapi: offset calculation in RTC_CHANGE event revertedArtem Pisarenko
Return value of qemu_timedate_diff(), used for calculation offset in QAPI 'RTC_CHANGE' event, restored to keep compatibility. Since it wasn't documented that difference is relative to host clock advancement, this change also adds important note to 'RTC_CHANGE' event description to highlight established implementation specifics. Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <1fc12c77e8b7115d3842919a8b586d9cbe4efca6.1539846575.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19Fixes RTC bug with base datetime shifts in clock=vmArtem Pisarenko
This makes all current "-rtc" option parameters combinations produce fixed/unambiguous RTC timedate reference for hardware emulation frontends. It restores determinism of guest execution when used with clock=vm and specified base <datetime> value. Buglink: https://bugs.launchpad.net/qemu/+bug/1797033 Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <1d963c3e013dfedafa1f6edb9fb219b7e49e39da.1539846575.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19vl: refactor -rtc option referencesArtem Pisarenko
Improve code readability and prepare for fixing bug #1797033 Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <9330a48899f997431a34460014886d118a7c0960.1539846575.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19vl: improve/fix documentation related to RTC functionArtem Pisarenko
Documentation describing -rtc option updated to better match current implementation and highlight some important specifics. Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <1b245c6c0803d4bf11dcbf9eb32f34af8c2bd0b4.1539846575.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19i386: hvf: Remove hvf_disabledRoman Bolshakov
accel_init_machine sets *(acc->allowed) to true if acc->init_machine(ms) succeeds. There's no need to have both hvf_allowed and hvf_disabled. Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20181018143051.48508-1-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19i386: hvf: Fix register refs if REX is presentRoman Bolshakov
According to Intel(R)64 and IA-32 Architectures Software Developer's Manual, the following one-byte registers should be fetched when REX prefix is present (sorted by reg encoding index): AL, CL, DL, BL, SPL, BPL, SIL, DIL, R8L - R15L The first 8 are fetched if REX.R is zero, the last 8 if non-zero. The following registers should be fetched for instructions without REX prefix (also sorted by reg encoding index): AL, CL, DL, BL, AH, CH, DH, BH Current emulation code doesn't handle accesses to SPL, BPL, SIL, DIL when REX is present, thefore an instruction 40883e "mov %dil,(%rsi)" is decoded as "mov %bh,(%rsi)". That caused an infinite loop in vp_reset: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03293.html Signed-off-by: Roman Bolshakov <r.bolshakov@yadro.com> Message-Id: <20181018134401.44471-1-r.bolshakov@yadro.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19i386/kvm: add support for Hyper-V IPI sendVitaly Kuznetsov
Hyper-V PV IPI support is merged to KVM, enable the feature in Qemu. When enabled, this allows Windows guests to send IPIs to other vCPUs with a single hypercall even when there are >64 vCPUs in the request. Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Reviewed-by: Roman Kagan <rkagan@virtuozzo.com> Message-Id: <20181009130853.6412-3-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19replay: don't process events at virtual clock checkpointPavel Dovgalyuk
As QEMU becomes more multi-threaded and non-synchronized, checkpoints move from thread to thread. And the event queue that processed at checkpoints should belong to the same thread in both record and replay executions. This patch disables asynchronous event processing at virtual clock checkpoint, because it may be invoked in different threads at record and replay. This patch is temporary fix until the checkpoints are completely refactored. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Message-Id: <20181018063345.7433.11678.stgit@pasha-VirtualBox> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19target-i386: add q35 0xcf8 port as coalesced_pioPeng Hao
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> Message-Id: <1539795177-21038-6-git-send-email-peng.hao2@zte.com.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19target-i386: add i440fx 0xcf8 port as coalesced_pioPeng Hao
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> Message-Id: <1539795177-21038-5-git-send-email-peng.hao2@zte.com.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19target-i386: add rtc 0x70 port as coalesced_pioPeng Hao
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> Message-Id: <1539890353-30273-1-git-send-email-peng.hao2@zte.com.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19target-i386 : add coalesced_pio APIPeng Hao
the primary API realization. Signed-off-by: Peng Hao <peng.hao2@zte.com.cn> Reviewed-by: Eduardo Habkost <ehabkost@redhat.com> Message-Id: <1539795177-21038-3-git-send-email-peng.hao2@zte.com.cn> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19linux-headers: update to 4.20-rc1Paolo Bonzini
This brings in eVMCS and coalesced PIO support, as well as other features we do not support yet. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19target-i386: kvm: do not initialize padding fieldsPaolo Bonzini
The exception.pad field is going to be renamed to pending in an upcoming header file update. Remove the unnecessary initialization; it was introduced to please valgrind (commit 7e680753cfa2) but they were later rendered unnecessary by commit 076796f8fd27f4d, which added the "= {}" initializer to the declaration of "events". Therefore the patch does not change behavior in any way. Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19qemu-timer: avoid checkpoints for virtual clock timers in external subsystemsArtem Pisarenko
Adds EXTERNAL attribute definition to qemu timers subsystem and assigns it to virtual clock timers, used in slirp (ICMP IPv6) and ui (key queue). Virtual clock processing in rr mode can use this attribute instead of a separate clock type. Fixes: 87f4fe7653baf55b5c2f2753fe6003f473c07342 Fixes: 775a412bf83f6bc0c5c02091ee06cf649b34c593 Fixes: 9888091404a702d7ec79d51b088d994b9fc121bd Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <e771f96ab94e86b54b9a783c974f2af3009fe5d1.1539764043.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19qemu-timer: introduce timer attributesArtem Pisarenko
Attributes are simple flags, associated with individual timers for their whole lifetime. They intended to be used to mark individual timers for special handling when they fire. New/init functions family in timer interface updated and refactored (new 'attribute' argument added, timer_list replaced with timer_list_group+type combinations, comments improved to avoid info duplication). Also existing aio interface extended with attribute-enabled variants of functions, which create/initialize timers. Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <f47b81dbce734e9806f9516eba8ca588e6321c2f.1539764043.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19Revert some patches from recent [PATCH v6] "Fixing record/replay and adding ↵Artem Pisarenko
reverse debugging" That patch series introduced new virtual clock type for use in external subsystems. It breaks desired behavior in non-record/replay usage scenarios due to a small change to existing behavior. Processing of virtual timers belonging to new clock type is kicked off to the main loop, which makes these timers asynchronous with vCPU thread and, in icount mode, with whole guest execution. This breaks expected determinism in non-record/replay icount mode of emulation where these "external subsystems" are isolated from the host (i.e. they are external only to guest core, not to the entire emulation environment). Example for slirp ("user" backend for network device): User runs qemu in icount mode with rtc clock=vm without any external communication interfaces but with "-netdev user,restrict=on". It expects deterministic execution, because network services are emulated inside qemu and isolated from host. There are no reasons to get reply from DHCP server with different delay or something like that. The next patches revert reimplements the same changes in a better way. This reverts commit 87f4fe7653baf55b5c2f2753fe6003f473c07342. This reverts commit 775a412bf83f6bc0c5c02091ee06cf649b34c593. This reverts commit 9888091404a702d7ec79d51b088d994b9fc121bd. Signed-off-by: Artem Pisarenko <artem.k.pisarenko@gmail.com> Message-Id: <18b1e7c8f155fe26976f91be06bde98eef6f8751.1539764043.git.artem.k.pisarenko@gmail.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-19es1370: more fixes for ADC_FRAMEADR and ADC_FRAMECNTPaolo Bonzini
They are not consecutive with DAC1_FRAME* and DAC2_FRAME*; Coverity still complains about es1370_read, while es1370_write was fixed in commit cf9270e5220671f49cc238deaf6136669cc07ae1. Fixes: 154c1d1f960c5147a3f8ef00907504112f271cd8 Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2018-10-18Merge remote-tracking branch ↵Peter Maydell
'remotes/huth-gitlab/tags/pull-request-2018-10-17' into staging - Updates for qtest entries in test/Makefile.include - Simple updates for some shell scripts - Misc simple patches for files without regular subsystem pull requests # gpg: Signature made Wed 17 Oct 2018 08:20:35 BST # gpg: using RSA key 2ED9D774FE702DB5 # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" # gpg: aka "Thomas Huth <thuth@redhat.com>" # gpg: aka "Thomas Huth <huth@tuxfamily.org>" # gpg: aka "Thomas Huth <th.huth@posteo.de>" # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5 * remotes/huth-gitlab/tags/pull-request-2018-10-17: configure: remove glib_subprocess check hw/core/generic-loader: Compile only once, not for each target cpu: Provide a proper prototype for target_words_bigendian() in a header hw/core/generic-loader: Set a category for the generic-loader device qemu/compiler: Wrap __attribute__((flatten)) in a macro mailmap: Fix Reimar Döffinger name show-fixed-bugs.sh: Modern shell scripting (use $() instead of ``) git-submodule.sh: Modern shell scripting (use $() instead of ``) archive-source.sh: Modern shell scripting (use $() instead of ``) MAINTAINERS: update block/sheepdog maintainers gdbstub: Remove unused include tests: remove gcov-files- variables tests: Prevent more accidental test disabling target/cris/translate: Get rid of qemu_log_separate() qemu-common.h: update copyright date to 2018 Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-18Merge remote-tracking branch 'remotes/rth/tags/pull-hppa-20181016' into stagingPeter Maydell
Queued hppa patch # gpg: Signature made Tue 16 Oct 2018 23:45:46 BST # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-hppa-20181016: target/hppa: Raise exception 26 on emulated hardware Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2018-10-17configure: remove glib_subprocess checkMarc-André Lureau
This should have been removed as part of commit 692fbdf9f4c6f6bafd0b3a4d4f94973effd3bbae. Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-17hw/core/generic-loader: Compile only once, not for each targetThomas Huth
The generic-loader is currently compiled target specific due to one single "#ifdef TARGET_WORDS_BIGENDIAN" in the file. We have already a function called target_words_bigendian() for this instead, so we can put the generic-loader into common-obj to save some compilation time. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-17cpu: Provide a proper prototype for target_words_bigendian() in a headerThomas Huth
We've got three places already that provide a prototype for this function in a .c file - that's ugly. Let's provide a proper prototype in a header instead, with a proper description why this function should not be used in most cases. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-17hw/core/generic-loader: Set a category for the generic-loader deviceThomas Huth
Each device that is instantiatable by the users should be marked with a category. Since the generic-loader does not fit anywhere else, put it into the MISC category. Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-17qemu/compiler: Wrap __attribute__((flatten)) in a macroThomas Huth
Older versions of Clang (before 3.5) and GCC (before 4.1) do not support the "__attribute__((flatten))" yet. We don't care about such old versions of GCC anymore, but since Clang 3.4 is still used in EPEL for RHEL7 / CentOS 7, we should not use this attribute directly but with a wrapper macro instead. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-17mailmap: Fix Reimar Döffinger namePhilippe Mathieu-Daudé
This probably happened when interpreting the utf8 name as latin1. Fixes dbbaaff6867 and f4e94dfefb6. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
2018-10-16target/hppa: Raise exception 26 on emulated hardwareHelge Deller
On PCXS chips (PA7000, pa 1.1a), trap #18 is raised on memory faults, while all later chips (>= PA7100) generate either trap #26, #27 or #28 (depending on the fault type). Since the current qemu emulation emulates a B160L machine (with a PA7300LC PCX-L2 chip, we should raise trap #26 (EXCP_DMAR) instead of #18 (EXCP_DMP) on access faults by the Linux kernel to page zero. With the patch we now get the correct output (I tested against real hardware): Kernel Fault: Code=26 (Data memory access rights trap) instead of: Kernel Fault: Code=18 (Data memory protection/unaligned access trap) Signed-off-by: Helge Deller <deller@gmx.de> Message-Id: <20181007205153.GA30270@ls3530.fritz.box> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2018-10-16Merge remote-tracking branch ↵Peter Maydell
'remotes/pmaydell/tags/pull-target-arm-20181016-1' into staging target-arm queue: * hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART * target/arm: Fix aarch64_sve_change_el wrt EL0 * target/arm: Define fields of ISAR registers * target/arm: Align cortex-r5 id_isar0 * target/arm: Fix cortex-a7 id_isar0 * net/cadence_gem: Fix various bugs, add support for new features that will be used by the Xilinx Versal board * target-arm: powerctl: Enable HVC when starting CPUs to EL2 * target/arm: Add the Cortex-A72 * target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO * target/arm: Mask PMOVSR writes based on supported counters * target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write * coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls # gpg: Signature made Tue 16 Oct 2018 17:42:01 BST # gpg: using RSA key 3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20181016-1: coccinelle: new inplace-byteswaps.cocci to remove inplace-byteswapping calls target/arm: Initialize ARMMMUFaultInfo in v7m_stack_read/write target/arm: Mask PMOVSR writes based on supported counters target/arm: Mark PMINTENCLR and PMINTENCLR_EL1 accesses as possibly doing IO target/arm: Add the Cortex-A72 target-arm: powerctl: Enable HVC when starting CPUs to EL2 net: cadence_gem: Implement support for 64bit descriptor addresses net: cadence_gem: Add support for selecting the DMA MemoryRegion net: cadence_gem: Add support for extended descriptors net: cadence_gem: Add macro with max number of descriptor words net: cadence_gem: Use uint32_t for 32bit descriptor words net: cadence_gem: Disable TSU feature bit target/arm: Fix cortex-a7 id_isar0 target/arm: Align cortex-r5 id_isar0 target/arm: Define fields of ISAR registers target/arm: Fix aarch64_sve_change_el wrt EL0 hw/arm/virt: add DT property /secure-chosen/stdout-path indicating secure UART Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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