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-rw-r--r--tests/tcg/xtensa/Makefile2
-rw-r--r--tests/tcg/xtensa/test_interrupt.S27
-rw-r--r--tests/tcg/xtensa/test_sr.S1
-rw-r--r--tests/tcg/xtensa/test_timer.S105
4 files changed, 94 insertions, 41 deletions
diff --git a/tests/tcg/xtensa/Makefile b/tests/tcg/xtensa/Makefile
index 7f9f2d96c3..2882c431e4 100644
--- a/tests/tcg/xtensa/Makefile
+++ b/tests/tcg/xtensa/Makefile
@@ -5,7 +5,7 @@ CROSS=xtensa-$(CORE)-elf-
ifndef XT
SIM = ../../../xtensa-softmmu/qemu-system-xtensa
-SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting $(EXTFLAGS) -kernel
+SIMFLAGS = -M sim -cpu $(CORE) -nographic -semihosting -icount 7 $(EXTFLAGS) -kernel
SIMDEBUG = -s -S
else
SIM = xt-run
diff --git a/tests/tcg/xtensa/test_interrupt.S b/tests/tcg/xtensa/test_interrupt.S
index 334ddab287..876683518e 100644
--- a/tests/tcg/xtensa/test_interrupt.S
+++ b/tests/tcg/xtensa/test_interrupt.S
@@ -1,5 +1,7 @@
#include "macros.inc"
+#define LSBIT(v) ((v) ^ ((v) & ((v) - 1)))
+
test_suite interrupt
.macro clear_interrupts
@@ -46,14 +48,17 @@ test soft_disabled
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intclear
esync
rsr a3, interrupt
+ and a3, a3, a4
assert eqi, a3, 0
j 2f
1:
@@ -65,10 +70,12 @@ test soft_intenable
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
rsil a3, 0
wsr a2, intenable
@@ -82,10 +89,12 @@ test soft_rsil
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intenable
rsil a3, 0
@@ -99,10 +108,12 @@ test soft_waiti
set_vector kernel, 1f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intenable
waiti 0
@@ -116,10 +127,12 @@ test soft_user
set_vector user, 2f
clear_interrupts
- movi a2, 0x80
+ movi a2, LSBIT(XCHAL_INTTYPE_MASK_SOFTWARE)
wsr a2, intset
esync
rsr a3, interrupt
+ movi a4, ~XCHAL_INTTYPE_MASK_TIMER
+ and a3, a3, a4
assert eq, a2, a3
wsr a2, intenable
@@ -139,7 +152,7 @@ test soft_priority
set_vector level3, 2f
clear_interrupts
- movi a2, 0x880
+ movi a2, XCHAL_INTTYPE_MASK_SOFTWARE
wsr a2, intenable
rsil a3, 0
esync
@@ -161,7 +174,7 @@ test eps_epc_rfi
clear_interrupts
reset_ps
- movi a2, 0x880
+ movi a2, XCHAL_INTTYPE_MASK_SOFTWARE
wsr a2, intenable
rsil a3, 0
rsr a3, ps
diff --git a/tests/tcg/xtensa/test_sr.S b/tests/tcg/xtensa/test_sr.S
index 4fac46e80f..42e3e5e386 100644
--- a/tests/tcg/xtensa/test_sr.S
+++ b/tests/tcg/xtensa/test_sr.S
@@ -44,6 +44,7 @@ test_end
test_sr acchi, 1
test_sr acclo, 1
+test_sr /*memctl*/97, 0
test_sr_mask /*atomctl*/99, 0, 0
test_sr_mask /*br*/4, 0, 0
test_sr_mask /*cacheattr*/98, 0, 0
diff --git a/tests/tcg/xtensa/test_timer.S b/tests/tcg/xtensa/test_timer.S
index f8c6f7423a..6cda71adbb 100644
--- a/tests/tcg/xtensa/test_timer.S
+++ b/tests/tcg/xtensa/test_timer.S
@@ -1,12 +1,56 @@
#include "macros.inc"
+#define CCOUNT_SHIFT 4
+#define WAIT_LOOPS 20
+
+.macro make_ccount_delta target, delta
+ rsr \delta, ccount
+ rsr \target, ccount
+ sub \delta, \target, \delta
+ slli \delta, \delta, CCOUNT_SHIFT
+ add \target, \target, \delta
+.endm
+
test_suite timer
test ccount
rsr a3, ccount
rsr a4, ccount
- sub a3, a4, a3
- assert eqi, a3, 1
+ assert ne, a3, a4
+test_end
+
+test ccount_write
+ rsr a3, ccount
+ rsr a4, ccount
+ sub a4, a4, a3
+ movi a2, 0x12345678
+ wsr a2, ccount
+ esync
+ rsr a3, ccount
+ sub a3, a3, a2
+ slli a4, a4, 2
+ assert ltu, a3, a4
+test_end
+
+test ccount_update_deadline
+ movi a2, 0
+ wsr a2, intenable
+ rsr a2, interrupt
+ wsr a2, intclear
+ movi a2, 0
+ wsr a2, ccompare1
+ wsr a2, ccompare2
+ movi a2, 0x12345678
+ wsr a2, ccompare0
+ rsr a3, interrupt
+ assert eqi, a3, 0
+ movi a2, 0x12345677
+ wsr a2, ccount
+ esync
+ nop
+ rsr a2, interrupt
+ movi a3, 1 << XCHAL_TIMER0_INTERRUPT
+ assert eq, a2, a3
test_end
test ccompare
@@ -18,18 +62,18 @@ test ccompare
wsr a2, ccompare1
wsr a2, ccompare2
- movi a3, 20
- rsr a2, ccount
- addi a2, a2, 20
+ make_ccount_delta a2, a15
wsr a2, ccompare0
- rsr a2, interrupt
- assert eqi, a2, 0
- loop a3, 1f
- rsr a3, interrupt
- bnez a3, 2f
1:
- test_fail
+ rsr a3, interrupt
+ rsr a4, ccount
+ rsr a5, interrupt
+ sub a4, a4, a2
+ bgez a4, 2f
+ assert eqi, a3, 0
+ j 1b
2:
+ assert nei, a5, 0
test_end
test ccompare0_interrupt
@@ -42,15 +86,14 @@ test ccompare0_interrupt
wsr a2, ccompare1
wsr a2, ccompare2
- movi a3, 20
- rsr a2, ccount
- addi a2, a2, 20
+ movi a3, WAIT_LOOPS
+ make_ccount_delta a2, a15
wsr a2, ccompare0
rsync
rsr a2, interrupt
assert eqi, a2, 0
- movi a2, 0x40
+ movi a2, 1 << XCHAL_TIMER0_INTERRUPT
wsr a2, intenable
rsil a2, 0
loop a3, 1f
@@ -72,14 +115,13 @@ test ccompare1_interrupt
wsr a2, ccompare0
wsr a2, ccompare2
- movi a3, 20
- rsr a2, ccount
- addi a2, a2, 20
+ movi a3, WAIT_LOOPS
+ make_ccount_delta a2, a15
wsr a2, ccompare1
rsync
rsr a2, interrupt
assert eqi, a2, 0
- movi a2, 0x400
+ movi a2, 1 << XCHAL_TIMER1_INTERRUPT
wsr a2, intenable
rsil a2, 2
loop a3, 1f
@@ -99,14 +141,13 @@ test ccompare2_interrupt
wsr a2, ccompare0
wsr a2, ccompare1
- movi a3, 20
- rsr a2, ccount
- addi a2, a2, 20
+ movi a3, WAIT_LOOPS
+ make_ccount_delta a2, a15
wsr a2, ccompare2
rsync
rsr a2, interrupt
assert eqi, a2, 0
- movi a2, 0x2000
+ movi a2, 1 << XCHAL_TIMER2_INTERRUPT
wsr a2, intenable
rsil a2, 4
loop a3, 1f
@@ -125,17 +166,16 @@ test ccompare_interrupt_masked
movi a2, 0
wsr a2, ccompare2
- movi a3, 40
- rsr a2, ccount
- addi a2, a2, 20
+ movi a3, 2 * WAIT_LOOPS
+ make_ccount_delta a2, a15
wsr a2, ccompare1
- addi a2, a2, 20
+ add a2, a2, a15
wsr a2, ccompare0
rsync
rsr a2, interrupt
assert eqi, a2, 0
- movi a2, 0x40
+ movi a2, 1 << XCHAL_TIMER0_INTERRUPT
wsr a2, intenable
rsil a2, 0
loop a3, 1f
@@ -156,17 +196,16 @@ test ccompare_interrupt_masked_waiti
movi a2, 0
wsr a2, ccompare2
- movi a3, 40
- rsr a2, ccount
- addi a2, a2, 20
+ movi a3, 2 * WAIT_LOOPS
+ make_ccount_delta a2, a15
wsr a2, ccompare1
- addi a2, a2, 20
+ add a2, a2, a15
wsr a2, ccompare0
rsync
rsr a2, interrupt
assert eqi, a2, 0
- movi a2, 0x40
+ movi a2, 1 << XCHAL_TIMER0_INTERRUPT
wsr a2, intenable
waiti 0
test_fail