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-rw-r--r--tcg/README4
-rw-r--r--tcg/tcg-op.h14
2 files changed, 18 insertions, 0 deletions
diff --git a/tcg/README b/tcg/README
index b4d07b6f42..2eeb669c27 100644
--- a/tcg/README
+++ b/tcg/README
@@ -269,6 +269,10 @@ Truncate t1 (64 bit) to t0 (32 bit)
Construct t0 (64-bit) taking the low half from t1 (32 bit) and the high half
from t2 (32 bit).
+* concat32_i64 t0, t1, t2
+Construct t0 (64-bit) taking the low half from t1 (64 bit) and the high half
+from t2 (64 bit).
+
********* Load/Store
* ld_i32/i64 t0, t1, offset
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 7b39fe865a..acb0dffed6 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1412,6 +1412,18 @@ static inline void tcg_gen_concat_i32_i64(TCGv dest, TCGv low, TCGv high)
#endif
}
+static inline void tcg_gen_concat32_i64(TCGv dest, TCGv low, TCGv high)
+{
+#if TCG_TARGET_REG_BITS == 32
+ tcg_gen_concat_i32_i64(dest, low, high);
+#else
+ TCGv tmp = tcg_temp_new(TCG_TYPE_I64);
+ tcg_gen_shli_i64(tmp, high, 32);
+ tcg_gen_or_i64(dest, low, tmp);
+ tcg_temp_free(tmp);
+#endif
+}
+
/***************************************/
/* QEMU specific operations. Their type depend on the QEMU CPU
type. */
@@ -1664,6 +1676,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i64
#define tcg_gen_ext32u_tl tcg_gen_ext32u_i64
#define tcg_gen_ext32s_tl tcg_gen_ext32s_i64
+#define tcg_gen_concat_tl_i64 tcg_gen_concat32_i64
#define tcg_const_tl tcg_const_i64
#else
#define TCG_TYPE_TL TCG_TYPE_I32
@@ -1715,6 +1728,7 @@ static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index)
#define tcg_gen_ext16s_tl tcg_gen_ext16s_i32
#define tcg_gen_ext32u_tl tcg_gen_mov_i32
#define tcg_gen_ext32s_tl tcg_gen_mov_i32
+#define tcg_gen_concat_tl_i64 tcg_gen_concat_i32_i64
#define tcg_const_tl tcg_const_i32
#endif