diff options
Diffstat (limited to 'tcg/tcg-opc.h')
-rw-r--r-- | tcg/tcg-opc.h | 98 |
1 files changed, 50 insertions, 48 deletions
diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index ebf4f82fb8..4d91d117db 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -40,10 +40,12 @@ DEF2(macro_start, 0, 0, 2, 0) DEF2(macro_end, 0, 0, 2, 0) DEF2(macro_goto, 0, 0, 3, 0) +DEF2(discard, 1, 0, 0, 0) + DEF2(set_label, 0, 0, 1, 0) -DEF2(call, 0, 1, 2, 0) /* variable number of parameters */ -DEF2(jmp, 0, 1, 0, TCG_OPF_BB_END) -DEF2(br, 0, 0, 1, TCG_OPF_BB_END) +DEF2(call, 0, 1, 2, TCG_OPF_SIDE_EFFECTS) /* variable number of parameters */ +DEF2(jmp, 0, 1, 0, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) +DEF2(br, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) DEF2(mov_i32, 1, 1, 0, 0) DEF2(movi_i32, 1, 0, 1, 0) @@ -53,9 +55,9 @@ DEF2(ld8s_i32, 1, 1, 1, 0) DEF2(ld16u_i32, 1, 1, 1, 0) DEF2(ld16s_i32, 1, 1, 1, 0) DEF2(ld_i32, 1, 1, 1, 0) -DEF2(st8_i32, 0, 2, 1, 0) -DEF2(st16_i32, 0, 2, 1, 0) -DEF2(st_i32, 0, 2, 1, 0) +DEF2(st8_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) +DEF2(st16_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) +DEF2(st_i32, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) /* arith */ DEF2(add_i32, 1, 2, 0, 0) DEF2(sub_i32, 1, 2, 0, 0) @@ -77,11 +79,11 @@ DEF2(shl_i32, 1, 2, 0, 0) DEF2(shr_i32, 1, 2, 0, 0) DEF2(sar_i32, 1, 2, 0, 0) -DEF2(brcond_i32, 0, 2, 2, TCG_OPF_BB_END) +DEF2(brcond_i32, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) #if TCG_TARGET_REG_BITS == 32 DEF2(add2_i32, 2, 4, 0, 0) DEF2(sub2_i32, 2, 4, 0, 0) -DEF2(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END) +DEF2(brcond2_i32, 0, 4, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) DEF2(mulu2_i32, 2, 2, 0, 0) #endif #ifdef TCG_TARGET_HAS_ext8s_i32 @@ -105,10 +107,10 @@ DEF2(ld16s_i64, 1, 1, 1, 0) DEF2(ld32u_i64, 1, 1, 1, 0) DEF2(ld32s_i64, 1, 1, 1, 0) DEF2(ld_i64, 1, 1, 1, 0) -DEF2(st8_i64, 0, 2, 1, 0) -DEF2(st16_i64, 0, 2, 1, 0) -DEF2(st32_i64, 0, 2, 1, 0) -DEF2(st_i64, 0, 2, 1, 0) +DEF2(st8_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) +DEF2(st16_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) +DEF2(st32_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) +DEF2(st_i64, 0, 2, 1, TCG_OPF_SIDE_EFFECTS) /* arith */ DEF2(add_i64, 1, 2, 0, 0) DEF2(sub_i64, 1, 2, 0, 0) @@ -130,7 +132,7 @@ DEF2(shl_i64, 1, 2, 0, 0) DEF2(shr_i64, 1, 2, 0, 0) DEF2(sar_i64, 1, 2, 0, 0) -DEF2(brcond_i64, 0, 2, 2, TCG_OPF_BB_END) +DEF2(brcond_i64, 0, 2, 2, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) #ifdef TCG_TARGET_HAS_ext8s_i64 DEF2(ext8s_i64, 1, 1, 0, 0) #endif @@ -146,82 +148,82 @@ DEF2(bswap_i64, 1, 1, 0, 0) #endif /* QEMU specific */ -DEF2(exit_tb, 0, 0, 1, TCG_OPF_BB_END) -DEF2(goto_tb, 0, 0, 1, TCG_OPF_BB_END) +DEF2(exit_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) +DEF2(goto_tb, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_SIDE_EFFECTS) /* Note: even if TARGET_LONG_BITS is not defined, the INDEX_op constants must be defined */ #if TCG_TARGET_REG_BITS == 32 #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld8u, 1, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld8u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld8s, 1, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld8s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld16u, 1, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld16u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld16s, 1, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld16s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld32u, 1, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld32u, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld32s, 1, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld32s, 1, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_ld64, 2, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld64, 2, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_ld64, 2, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld64, 2, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_st8, 0, 3, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st8, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_st16, 0, 3, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st16, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_st32, 0, 3, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st32, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #if TARGET_LONG_BITS == 32 -DEF2(qemu_st64, 0, 3, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st64, 0, 3, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #else -DEF2(qemu_st64, 0, 4, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st64, 0, 4, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif #else /* TCG_TARGET_REG_BITS == 32 */ -DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_ld64, 1, 1, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_ld8u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_ld8s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_ld16u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_ld16s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_ld32u, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_ld32s, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_ld64, 1, 1, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) -DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER) -DEF2(qemu_st64, 0, 2, 1, TCG_OPF_CALL_CLOBBER) +DEF2(qemu_st8, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_st16, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_st32, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) +DEF2(qemu_st64, 0, 2, 1, TCG_OPF_CALL_CLOBBER | TCG_OPF_SIDE_EFFECTS) #endif /* TCG_TARGET_REG_BITS != 32 */ |