diff options
Diffstat (limited to 'tcg/mips/tcg-target.inc.c')
| -rw-r--r-- | tcg/mips/tcg-target.inc.c | 12 |
1 files changed, 2 insertions, 10 deletions
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c index 7cafd4a790..ef6633587e 100644 --- a/tcg/mips/tcg-target.inc.c +++ b/tcg/mips/tcg-target.inc.c @@ -1202,14 +1202,6 @@ static int tcg_out_call_iarg_reg2(TCGContext *s, int i, TCGReg al, TCGReg ah) return i; } -/* We expect tlb_mask to be before tlb_table. */ -QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) < - offsetof(CPUArchState, tlb_mask)); - -/* We expect tlb_mask to be "near" tlb_table. */ -QEMU_BUILD_BUG_ON(offsetof(CPUArchState, tlb_table) - - offsetof(CPUArchState, tlb_mask) >= 0x8000); - /* * Perform the tlb comparison operation. * The complete host address is placed in BASE. @@ -1223,8 +1215,8 @@ static void tcg_out_tlb_load(TCGContext *s, TCGReg base, TCGReg addrl, unsigned s_bits = opc & MO_SIZE; unsigned a_bits = get_alignment_bits(opc); int mem_index = get_mmuidx(oi); - int mask_off = offsetof(CPUArchState, tlb_mask[mem_index]); - int table_off = offsetof(CPUArchState, tlb_table[mem_index]); + int mask_off = offsetof(CPUArchState, tlb_.f[mem_index].mask); + int table_off = offsetof(CPUArchState, tlb_.f[mem_index].mask); int add_off = offsetof(CPUTLBEntry, addend); int cmp_off = (is_load ? offsetof(CPUTLBEntry, addr_read) : offsetof(CPUTLBEntry, addr_write)); |